MAX32600 User’s Guide
Communication Peripherals
7.2 SPI
Bit
Mnemonic
Description
[3:2]
Size Units
Units used to interpret the size field.
• 0 = Bits
• 1 = Bytes
• 2 = Pages (See
for page size definition)
[8:4]
Size
Size of transaction in terms of units. 1 = 1, 2 = 2, ...
Note 0 = 32 units
[10:9]
Width
Number of SDIO I/O to use for the transaction. This has no effect on the size of the transaction, just the time required to complete it.
• Note:
• 0 = 1-bit wide
• 1 = 2-bits wide
• 2 = 4-bits wide
[11]
Alt Timing
RESERVED
[12]
Flow Control
When set to 1, use selected slave flow control input to moderate traffic movement.
[13]
Deassert SS
When set to 1, deassert selected slave select at the completion of this transaction.
7.2.7
Interrupts
Interrupt logic is provided to allow efficient servicing of the SPI Master function by firmware or the
. Interrupts may be grouped into two categories:
• Keeping the transaction FIFO full.
• Keeping the results FIFO empty. Programmable levels in the FIFO allow interrupt events to be issued if the transaction FIFO falls below a certain level, or if the
results FIFO fills above a certain level. See
for details.
7.2.8
SPI: FIFOs
SPI Master FIFO AHB Address Ranges
FIFO Write Points for Transaction Setup
Rev.1.3 April 2015
Maxim Integrated
Page 268
Содержание MAX32600
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