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11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
Condition Flags
These instructions do not affect the flags.
Examples
BFC
R4, #8, #12
; Clear bit 8 to bit 19 (12 bits) of R4 to 0
BFI
R9, R2, #8, #12
; Replace bit 8 to bit 19 (12 bits) of R9 with
; bit 0 to bit 11 from R2.
11.6.9.2
SBFX and UBFX
Signed Bit Field Extract and Unsigned Bit Field Extract.
Syntax
SBFX{cond} Rd, Rn, #lsb, #width
UBFX{cond} Rd, Rn, #lsb, #width
where:
Operation
SBFX
extracts a bitfield from one register, sign extends it to 32 bits, and writes the result to the
destination register.
UBFX
extracts a bitfield from one register, zero extends it to 32 bits, and writes the result to the
destination register.
Restrictions
Do not use SP and do not use PC
.
Condition Flags
These instructions do not affect the flags.
Examples
SBFX
R0, R1, #20, #4
; Extract bit 20 to bit 23 (4 bits) from R1 and sign
; extend to 32 bits and then write the result to R0.
UBFX
R8, R11, #9, #10 ; Extract bit 9 to bit 18 (10 bits) from R11 and
; zero, extend to 32 bits and then write the result
; to R8.
cond
is an optional condition code, see
Rd
is the destination register.
Rn
is the source register.
lsb
is the position of the least significant bit of the bitfield.
lsb
must be in the range 0 to 31.
width
is the width of the bitfield and must be in the range 1 to 32-
lsb
.
Summary of Contents for SAM4S Series
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