214
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
• UNSTKERR: Bus Fault on Unstacking for a Return From Exception
This is part of
“BFSR: Bus Fault Status Subregister”
.
0: No unstacking fault.
1: Unstack for an exception return has caused one or more bus faults.
This fault is chained to the handler. This means that when the processor sets this bit to 1, the original return stack is still
present. The processor does not adjust the SP from the failing return, does not performed a new save, and does not write
a fault address to the BFAR.
• STKERR: Bus Fault on Stacking for Exception Entry
This is part of
“BFSR: Bus Fault Status Subregister”
.
0: No stacking fault.
1: Stacking for an exception entry has caused one or more bus faults.
When the processor sets this bit to 1, the SP is still adjusted but the values in the context area on the stack might be incor-
rect. The processor does not write a fault address to the SCB_BFAR register.
• BFARVALID: Bus Fault Address Register (BFAR) Valid flag
This is part of
“BFSR: Bus Fault Status Subregister”
.
0: The value in SCB_BFAR is not a valid fault address.
1: SCB_BFAR holds a valid fault address.
The processor sets this bit to 1 after a bus fault where the address is known. Other faults can set this bit to 0, such as a
memory management fault occurring later.
If a bus fault occurs and is escalated to a hard fault because of priority, the hard fault handler must set this bit to 0. This pre-
vents problems if returning to a stacked active bus fault handler whose SCB_BFAR value has been overwritten.
• UNDEFINSTR: Undefined Instruction Usage Fault
This is part of
“UFSR: Usage Fault Status Subregister”
.
0: no undefined instruction usage fault.
1: the processor has attempted to execute an undefined instruction.
When this bit is set to 1, the PC value stacked for the exception return points to the undefined instruction.
An undefined instruction is an instruction that the processor cannot decode.
• INVSTATE: Invalid State Usage Fault
This is part of
“UFSR: Usage Fault Status Subregister”
.
0: No invalid state usage fault.
1: The processor has attempted to execute an instruction that makes illegal use of the EPSR.
When this bit is set to 1, the PC value stacked for the exception return points to the instruction that attempted the illegal use
of the EPSR.
This bit is not set to 1 if an undefined instruction uses the EPSR.
Summary of Contents for SAM4S Series
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