Atmel SAM4S Series, Preliminary Data Sheet

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11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
27.2.10 Programmable Clock Output Controller
The PMC controls 3 signals to be output on external pins, PCKx. Each signal can be indepen-
dently programmed via the Programmable Clock Registers (PMC_PCKx).
PCKx can be independently selected between the Slow Clock (SLCK), the Main Clock
(MAINCK), the PLLA Clock (PLLACK), the PLLB Clock (PLLBCK) and the Master Clock (MCK)
by writing the CSS field in PMC_PCKx. Each output signal can also be divided by a power of 2
between 1 and 64 by writing the PRES (Prescaler) field in PMC_PCKx.
Each output signal can be enabled and disabled by writing 1 in the corresponding bit, PCKx of
PMC_SCER and PMC_SCDR, respectively. Status of the active programmable output clocks
are given in the PCKx bits of PMC_SCSR (System Clock Status Register).
Moreover, like the PCK, a status bit in PMC_SR indicates that the Programmable Clock is actu-
ally what has been programmed in the Programmable Clock registers.
As the Programmable Clock Controller does not manage with glitch prevention when switching
clocks, it is strongly recommended to disable the Programmable Clock before any configuration
change and to re-enable it after the change is actually performed.
27.2.11 Fast Startup
The device allows the processor to restart in less than 10 microseconds while the device is in
Wait Mode.
The system enters Wait Mode by writing the WAITMODE bit at 1 in the PMC Clock Generator
Main Oscillator Register (CKGR_MOR). Waiting for MOSCRCEN bit to be cleared is strongly
recommended to ensure that the core will not execute undesired instructions.
Important: Prior to instructing the system to enter in Wait Mode, the internal sources of wakeup
provided by RTT, RTC and USB must be cleared and verified too, that none of the enabled
external wakeup inputs (WKUP) hold an active polarity.
A Fast Startup is enabled upon the detection of a programmed level on one of the 16 wake-up
inputs (WKUP) or upon an active alarm from the RTC, RTT and USB Controller. The polarity of
the 16 wake-up inputs is programmable by writing the PMC Fast Startup Polarity Register
(PMC_FSPR).
The Fast Restart circuitry, as shown in Figure 27-8 , is fully asynchronous and provides a fast
startup signal to the Power Management Controller. As soon as the fast startup signal is
asserted, the embedded 4/8/12 MHz Fast RC oscillator restarts automatically.
When entering the Wait Mode, the embedded flash can be placed in low power mode depending
on the configuration of the FLPM in PMC_FSMR register. This bitfield can be programmed any-
time and will be taken into account at the next time the system enters Wait Mode.
The power consumption reduction is optimal when configuring 1 (deep power down mode) in
FLPM. If 0 is programmed (standby mode), the power consumption is slightly higher as com-
pared to the deep power down mode.
When programming 2 in FLPM, the Wait Mode flash power consumption is equivalent to the
active mode when there is no read access on the flash.