947
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
37.7.14
PWM Interrupt Disable Register 2
Name:
PWM_IDR2
Address:
0x40020038
Access:
Write-only
• WRDY: Write Ready for Synchronous Channels Update Interrupt Disable
• ENDTX: PDC End of TX Buffer Interrupt Disable
• TXBUFE: PDC TX Buffer Empty Interrupt Disable
• UNRE: Synchronous Channels Update Underrun Error Interrupt Disable
• CMPMx: Comparison x Match Interrupt Disable
• CMPUx: Comparison x Update Interrupt Disable
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
CMPU7
CMPU6
CMPU5
CMPU4
CMPU3
CMPU2
CMPU1
CMPU0
15
14
13
12
11
10
9
8
CMPM7
CMPM6
CMPM5
CMPM4
CMPM3
CMPM2
CMPM1
CMPM0
7
6
5
4
3
2
1
0
–
–
–
–
UNRE
TXBUFE
ENDTX
WRDY
Summary of Contents for SAM4S Series
Page 44: ...44 11100B ATARM 31 Jul 12 SAM4S Series Preliminary ...
Page 412: ...412 11100B ATARM 31 Jul 12 SAM4S Series Preliminary ...
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Page 1143: ...1143 11100B ATARM 31 Jul 12 SAM4S Series Preliminary Figure 43 4 64 lead LQFP Package Drawing ...
Page 1145: ...1145 11100B ATARM 31 Jul 12 SAM4S Series Preliminary Figure 43 5 64 lead QFN Package Drawing ...