Atmel SAM4S Series, Preliminary Data Sheet

Page: 121 / 1163

121
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
; Adds top halfword of R5 to bottom halfword of R3 and
; writes halved result to bottom halfword of R0.
11.6.5.12 SHSUB16 and SHSUB8
Signed Halving Subtract 16 and Signed Halving Subtract 8
Syntax
op{cond}{Rd,} Rn, Rm
where:
Operation
Use these instructions to add 16-bit and 8-bit data and then to halve the result before writing the
result to the destination register:
The
SHSUB16
instruction:
1. Subtracts each halfword of the second operand from the corresponding halfwords of
the first operand.
2. Shuffles the result by one bit to the right, halving the data.
3. Writes the halved halfword results in the destination register.
The
SHSUBB8
instruction:
1. Subtracts each byte of the second operand from the corresponding byte of the first
operand,
2. Shuffles the result by one bit to the right, halving the data,
3. Writes the corresponding signed byte results in the destination register.
Restrictions
Do not use SP and do not use PC
.
Condition Flags
These instructions do not change the flags.
Examples
SHSUB16 R1, R0 ; Subtracts halfwords in R0 from corresponding halfword
; of R1 and writes to corresponding halfword of R1
SHSUB8 R4, R0, R5 ; Subtracts bytes of R0 from corresponding byte in R5,
; and writes to corresponding byte in R4.
op is any of:
SHSUB16
Signed Halving Subtract 16
SHSUB8 Signed Halving Subtract 8
cond is an optional condition code, see “Conditional Execution” .
Rd is the destination register.
Rn is the first operand register.
Rm is the second operand register