160
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
11.6.8.2
SXT and UXT
Sign extend and Zero extend.
Syntax
op{cond} {Rd,} Rm {, ROR #n}
op{cond} {Rd}, Rm {, ROR #n}
where:
Operation
These instructions do the following:
1.
Rotate the value from
Rm
right by 0, 8, 16 or 24 bits.
2.
Extract bits from the resulting value:
–
SXTB
extracts bits[7:0] and sign extends to 32 bits.
–
UXTB
extracts bits[7:0] and zero extends to 32 bits.
–
SXTH
extracts bits[15:0] and sign extends to 32 bits.
–
UXTH
extracts bits[15:0] and zero extends to 32 bits.
–
SXTB16
extracts bits[7:0] and sign extends to 16 bits,
and extracts bits [23:16] and sign extends to 16 bits.
–
UXTB16
extracts bits[7:0] and zero extends to 16 bits,
and extracts bits [23:16] and zero extends to 16 bits.
Restrictions
Do not use SP and do not use PC.
Condition Flags
These instructions do not affect the flags.
Examples
SXTH
R4, R6, ROR #16
; Rotates R6 right by 16 bits, obtains bottom
; halfword of result, sign extends to 32 bits and
; writes to R4
UXTB
R3, R10
; Extracts lowest byte of value in R10, zero extends,
; and writes to R3.
op
is one of:
SXTB
Sign extends an 8-bit value to a 32-bit value.
SXTH
Sign extends a 16-bit value to a 32-bit value.
SXTB16
Sign extends two 8-bit values to two 16-bit values.
UXTB
Zero extends an 8-bit value to a 32-bit value.
UXTH
Zero extends a 16-bit value to a 32-bit value.
UXTB16
Zero extends two 8-bit values to two 16-bit values.
cond
is an optional condition code, see
Rd
is the destination register.
Rm
is the register holding the value to extend.
ROR #n
is one of:
ROR #8
Value from
Rm
is rotated right 8 bits.
ROR #16
Value from
Rm
is rotated right 16 bits.
ROR #24
Value from
Rm
is rotated right 24 bits.
If
ROR #n
is omitted, no rotation is performed.
Summary of Contents for SAM4S Series
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Page 1143: ...1143 11100B ATARM 31 Jul 12 SAM4S Series Preliminary Figure 43 4 64 lead LQFP Package Drawing ...
Page 1145: ...1145 11100B ATARM 31 Jul 12 SAM4S Series Preliminary Figure 43 5 64 lead QFN Package Drawing ...