Atmel SAM4S Series, Preliminary Data Sheet

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1124
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
Figure 42-14. SPI Slave Mode with (CPOL = NCPHA = 0) or (CPOL= NCPHA= 1)
42.11.3.1 Maximum SPI Frequency
The following formulas give maximum SPI frequency in Master read and write modes and in
Slave read and write modes.
Master Write Mode
The SPI is only sending data to a slave device such as an LCD, for example. The limit is
given by SPI
2
(or SPI
5
) timing. Since it gives a maximum frequency above the maximum pad
speed (see Section 42.11.2 “I/O Characteristics” ), the max SPI frequency is the one from the
pad.
Master Read Mode
T
valid
is the slave time response to output data after detecting an SPCK edge. For Atmel SPI
DataFlash (AT45DB642D), T
valid
(or T
v
) is 12 ns Max.
In the formula above, F
SPCK
Max = 33.0 MHz @ VDDIO = 3.3V.
Slave Read Mode
In slave mode, SPCK is the input clock for the SPI. The max SPCK frequency is given by
setup and hold timings SPI
7
/SPI
8
(or SPI
10
/SPI
11
). Since this gives a frequency well above
the pad limit, the limit in slave read mode is given by SPCK pad.
Slave Write Mode
For 3.3V I/O domain and SPI6, F
SPCK
Max = 25 MHz. T
setup
is the setup time from the master
before sampling data.
SPCK
MISO
MOSI
SPI
9
SPI
10
SPI
11
NPCS0
SPI
14
SPI
15
f
SPCK
Max
1
SPI
0
orSPI
3
( )
T
valid
+
-------------------------------------------------------- =
f
SPCK
Max
1
2 x S
(
PI
6 max
orSPI
9 max
( )
T
setup
)
+
---------------------------------------------------------------------------------------- =