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11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
Figure 11-6. Exception Stack Frame
Immediately after stacking, the stack pointer indicates the lowest address in the stack frame.
The alignment of the stack frame is controlled via the STKALIGN bit of the Configuration Control
Register (CCR).
The stack frame includes the return address. This is the address of the next instruction in the
interrupted program. This value is restored to the PC at exception return so that the interrupted
program resumes.
In parallel to the stacking operation, the processor performs a vector fetch that reads the excep-
tion handler start address from the vector table. When stacking is complete, the processor starts
executing the exception handler. At the same time, the processor writes an EXC_RETURN
value to the LR. This indicates which stack pointer corresponds to the stack frame and what
operation mode the processor was in before the entry occurred.
If no higher priority exception occurs during the exception entry, the processor starts executing
the exception handler and automatically changes the status of the corresponding pending inter-
rupt to active.
If another higher priority exception occurs during the exception entry, the processor starts exe-
cuting the exception handler for this exception and does not change the pending status of the
earlier exception. This is the late arrival case.
Pre-IRQ top of stack
xPSR
PC
LR
R12
R3
R2
R1
R0
{aligner}
IRQ top of stack
Decreasing
memory
address
xPSR
PC
LR
R12
R3
R2
R1
R0
S7
S6
S5
S4
S3
S2
S1
S0
S9
S8
FPSCR
S15
S14
S13
S12
S11
S10
{aligner}
IRQ top of stack
...
Exception frame with
floating-point storage
Exception frame without
floating-point storage
Pre-IRQ top of stack
...
Summary of Contents for SAM4S Series
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