650
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
shows a block diagram of the SPI when operating in Slave Mode.
Figure 31-12. Slave Mode Functional Bloc Diagram
31.7.5
Write Protected Registers
To prevent any single software error that may corrupt SPI behavior, the registers listed below
can be write-protected by setting the WPEN bit in the SPI Write Protection Mode Register
(SPI_WPMR).
If a write access in a write-protected register is detected, then the WPVS flag in the SPI Write
Protection Status Register (SPI_WPSR) is set and the field WPVSRC indicates in which register
the write access has been attempted.
The WPVS flag is automatically reset after reading the SPI Write Protection Status Register
(SPI_WPSR).
List of the write-protected registers:
Section 31.8.2 ”SPI Mode Register”
Section 31.8.9 ”SPI Chip Select Register”
Shift Register
SPCK
SPIENS
LSB
MSB
NSS
MOSI
SPI_RDR
RD
SPI
Clock
TDRE
SPI_TDR
TD
RDRF
OVRES
SPI_CSR0
CPOL
NCPHA
BITS
SPIEN
SPIDIS
MISO
Summary of Contents for SAM4S Series
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