Atmel SAM4S Series, Preliminary Data Sheet

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11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
Figure 33-10. Transmitter Control
33.5.4 Peripheral DMA Controller
Both the receiver and the transmitter of the UART are connected to a Peripheral DMA Controller
(PDC) channel.
The peripheral data controller channels are programmed via registers that are mapped within
the UART user interface from the offset 0x100. The status bits are reported in the UART status
register (UART_SR) and can generate an interrupt.
The RXRDY bit triggers the PDC channel data transfer of the receiver. This results in a read of
the data in UART_RHR. The TXRDY bit triggers the PDC channel data transfer of the transmit-
ter. This results in a write of data in UART_THR.
33.5.5 Test Modes
The UART supports three test modes. These modes of operation are programmed by using the
field CHMODE (Channel Mode) in the mode register (UART_MR).
The Automatic Echo mode allows bit-by-bit retransmission. When a bit is received on the URXD
line, it is sent to the UTXD line. The transmitter operates normally, but has no effect on the
UTXD line.
The Local Loopback mode allows the transmitted characters to be received. UTXD and URXD
pins are not used and the output of the transmitter is internally connected to the input of the
receiver. The URXD pin level has no effect and the UTXD line is held high, as in idle state.
The Remote Loopback mode directly connects the URXD pin to the UTXD line. The transmitter
and the receiver are disabled and have no effect. This mode allows a bit-by-bit retransmission.
UART_THR
Shift Register
UTXD
TXRDY
TXEMPTY
Data 0 Data 1
Data 0
Data 0
Data 1
Data 1 S
S
P P
Write Data 0
in UART_THR
Write Data 1
in UART_THR
stop
stop