Atmel SAM4S Series, Preliminary Data Sheet

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11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
the user can force a specific instruction size by using an instruction width suffix. The .W suffix
forces a 32-bit instruction encoding. The .N suffix forces a 16-bit instruction encoding.
If the user specifies an instruction width suffix and the assembler cannot generate an instruction
encoding of the requested width, it generates an error.
Note: In some cases, it might be necessary to specify the .W suffix, for example if the operand is the
label of an instruction or literal data, as in the case of branch instructions. This is because the
assembler might not automatically generate the right size encoding.
To use an instruction width suffix, place it immediately after the instruction mnemonic and condi-
tion code, if any. The example below shows instructions with the instruction width suffix.
BCS.W label ; creates a 32-bit instruction even for a short branch
ADDS.W R0, R0, R1 ; creates a 32-bit instruction even though the same
; operation can be done by a 16-bit instruction
11.6.4 Memory Access Instructions
The table below shows the memory access instructions:
Table 11-17. Memory Access Instructions
Mnemonic Description
ADR Load PC-relative address
CLREX Clear Exclusive
LDM{mode} Load Multiple registers
LDR{type} Load Register using immediate offset
LDR{type} Load Register using register offset
LDR{type}T Load Register with unprivileged access
LDR Load Register using PC-relative address
LDRD Load Register Dual
LDREX{type} Load Register Exclusive
POP Pop registers from stack
PUSH Push registers onto stack
STM{mode} Store Multiple registers
STR{type} Store Register using immediate offset
STR{type} Store Register using register offset
STR{type}T Store Register with unprivileged access
STREX{type} Store Register Exclusive