Atmel SAM4S Series, Preliminary Data Sheet

Page: 733 / 1163

733
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
34.6.3 Interrupt
The USART interrupt line is connected on one of the internal sources of the Interrupt Controller.
Using the USART interrupt requires the Interrupt Controller to be programmed first. Note that it is
not recommended to use the USART interrupt line in edge sensitive mode.
34.7 Functional Description
The USART is capable of managing several types of serial synchronous or asynchronous
communications.
It supports the following communication modes:
• 5- to 9-bit full-duplex asynchronous serial communication
– MSB- or LSB-first
– 1, 1.5 or 2 stop bits
– Parity even, odd, marked, space or none
– By 8 or by 16 over-sampling receiver frequency
– Optional hardware handshaking
– Optional modem signals management
– Optional break management
– Optional multidrop serial communication
• High-speed 5- to 9-bit full-duplex synchronous serial communication
– MSB- or LSB-first
– 1 or 2 stop bits
– Parity even, odd, marked, space or none
– By 8 or by 16 over-sampling frequency
– Optional hardware handshaking
– Optional modem signals management
– Optional break management
– Optional multidrop serial communication
• RS485 with driver control signal
• ISO7816, T0 or T1 protocols for interfacing with smart cards
– NACK handling, error counter with repetition and iteration limit, inverted data.
• InfraRed IrDA Modulation and Demodulation
• SPI Mode
– Master or Slave
– Serial Clock Programmable Phase and Polarity
– SPI Serial Clock (SCK) Frequency up to Internal Clock Frequency MCK/6
• Test modes
– Remote loopback, local loopback, automatic echo
Table 34-4. Peripheral IDs
Instance ID
USART0 14
USART1 15