NXP Semiconductors LPC84x, Руководство пользователя

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UM11029 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
User manual Rev. 1.0 — 16 June 2017 85 of 515
NXP Semiconductors
UM11029
Chapter 8: LPC84x System configuration (SYSCON)
8.5.2 Power control of analog components
The system control block controls the power to the analog components such as the
oscillators and PLL, the BOD, and the analog comparator. For details, see the following
registers:
Section 8.6.45 “Deep-sleep mode configuration register”
Section 8.6.2 “System PLL control register”
Section 8.6.5 “Watchdog oscillator control register”
Fig 9. UM11029 clock generation (continued)
set_fro_frequency() API
Divide by 2
Divide by 8
Divide by 2
fro_oscout
30/24/18 MHz
(default = 24 MHz)
FAIM word0,
low power boot bit
FROOSCCTRL[17]
FRO_DIRECT bit
aaa-027256
fro
0
1
0
1
FRO
Oscillator
fro_div
Table 124. Clocking diagram signal name descriptions
Name Description
sys_osc_clk This is the internal clock that comes from external crystal oscillator through dedicated pins.
frg_clk The output of the Fractional Rate Generator. The FRG and its source selection are shown in Figure 8
“UM11029 clock generation (continued)” .
fro The output of the currently selected on-chip FRO oscillator. See UM11029 User manual.
fro_div The FRO output. This may be either 15 MH, 12 MHz, or 9 MHz. See UM11029 User manual.
main_clk The main clock used by the CPU and AHB bus, and potentially many others. The main clock and its source
selection are shown in
Figure 7 “LPC84x clock generation” .
“none” A tied-off source that should be selected to save power when the output of the related multiplexer is not
used.
sys_pll0_clk The output of the System PLL. The System PLL and its source selection are shown in Figure 7 “LPC84x
clock generation” .
wdt_osc_clk The output of the watchdog oscillator, which has a selectable target frequency. It must also be enabled in
the PDRINCFG0 register. See UM11029 User manual.
xtalin Input of the main oscillator. If used, this is connected to an external crystal and load capacitor.
xtalout Output of the main oscillator. If used, this is connected to an external crystal and load capacitor.
clk_in This is the internal clock that comes from the main CLK_IN pin function. Connect that function to the pin by
selecting it in the IOCON block.
external_clk This is the internal clock that comes from the external crystal oscillator or the CLK_IN pin.