UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
79 of 515
8.1 How to read this chapter
The system configuration block is identical for all LPC84x parts.
8.2 Features
•
Clock control
–
Configure the system PLL.
–
Configure system oscillator, watchdog oscillator, and FRO oscillator.
–
Enable clocks to individual peripherals and memories.
–
Configure clock output.
–
Configure clock dividers, digital filter clock, and USART baud rate clock.
–
Configure ADC, SCT clock.
•
Monitor and release reset to individual peripherals.
•
Select pins for external pin interrupts and pattern match engine.
•
Configuration of reduced power modes.
•
Wake-up control.
•
BOD configuration.
•
MTB trace start and stop.
•
Interrupt latency control.
•
Select a source for the NMI.
•
Calibrate system tick timer.
8.3 Basic configuration
Configure the SYSCON block as follows:
•
The SYSCON uses the CLKIN, CLKOUT, RESET, and XTALIN/OUT pins. Configure
the pin functions through the switch matrix. See
•
No clock configuration is needed. The clock to the SYSCON block is always enabled.
By default, the SYSCON block is clocked by the FRO.
8.3.1 Set up the FRO
The FRO provides a selectable fro_oscout of 18 MHz, 24 MHz, and 30 MHz outputs that
can be used as a system clock. Also, the fro_oscout can be divided down to provide
frequencies of 1.125 MHz, 1.5 MHz, 1.875 MHz, 9 MHz, 12 MHz, or 15 MHz for system
clock.
By default, the fro_oscout is 24 MHz and is divided by 2 to provide a default system (CPU)
clock frequency of 12 MHz.
UM11029
Chapter 8: LPC84x System configuration (SYSCON)
Rev. 1.0 — 16 June 2017
User manual
