UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
81 of 515
NXP Semiconductors
UM11029
Chapter 8: LPC84x System configuration (SYSCON)
–
External clock input: It can be external crystal oscillator using the
XTALIN/XTALOUT pins or CLKIN from external pin.
–
Watchdog oscillator.
–
FRO DIV: 6 MHz (default).
Section 8.6.12 “Main clock PLL source update enable register”
2. Update the main clock source.
Section 8.6.14 “Main clock source update enable register”
3. Select the main clock. You have the following options:
–
Main clock pre PLL.
–
PLL output: You must configure the PLL to use the PLL output.
Section 8.6.9 “System PLL clock source select register”
4. Update the main clock PLL source.
Section 8.6.14 “Main clock source update enable register”
5. Select the divider value for the system clock. A divider value of 0 disables the system
clock.
Section 8.6.15 “System clock divider register”
6. Select the memories and peripherals that are operating in your application and
therefore must have an active clock. The core is always clocked.
Section 8.6.21 “System clock control 0 register”
Section 8.6.22 “System clock control 1 register”
8.3.4 Set up the system oscillator using XTALIN and XTALOUT
To use the system oscillator with the LPC84x, assign the XTALIN and XTALOUT pins,
which connect to the external crystal, through the fixed-pin function in the switch matrix.
XTALIN and XTALOUT can only be assigned to pins PIO0_8 and PIO0_9.
1. In the IOCON block, remove the pull-up and pull-down resistors in the IOCON
registers for pins PIO0_8 and PIO0_9.
2. In the switch matrix block, enable the 1-bit functions for XTALIN and XTALOUT.
3. In the SYSOSCCTRL register, disable the BYPASS bit and select the oscillator
frequency range according to the desired oscillator output clock.
4. Set SYSOSC_PD bit to 0 in PDRUNCFG register to turn on the system oscillator.
5. Wait 500
s for the system oscillator to stabilize.
Related registers:
Table 212 “PIO0_8 register (PIO0_8, address 0x4004 4038) bit description”
Table 211 “PIO0_9 register (PIO0_9, address 0x4004 4034) bit description”
Table 195 “Pin enable register 0 (PINENABLE0, address 0x4000 C1C0) bit description”
Table 129 “System oscillator control register (SYSOSCCTRL, address 0x4004 8020) bit
description”