UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
480 of 515
29.1 How to read this chapter
The CRC engine is available on all LPC84x parts.
29.2 Features
•
Supports three common polynomials CRC-CCITT, CRC-16, and CRC-32.
–
CRC-CCITT: x
16
+ x
12
+ x
5
+ 1
–
CRC-16: x
16
+ x
15
+ x
2
+ 1
–
CRC-32: x
32
+ x
26
+ x
23
+ x
22
+ x
16
+ x
12
+ x
11
+ x
10
+ x
8
+ x
7
+ x
5
+ x
4
+ x
2
+ x + 1
•
Bit order reverse and 1’s complement programmable setting for input data and CRC
sum.
•
Programmable seed number setting.
•
Accept any size of data width per write: 8, 16 or 32-bit.
–
8-bit write: 1-cycle operation
–
16-bit write: 2-cycle operation (8-bit x 2-cycle)
–
32-bit write: 4-cycle operation (8-bit x 4-cycle)
29.3 Basic configuration
Enable the clock to the CRC engine in the SYSAHBCLKCTRL register (
, bit 13).
29.4 Pin description
The CRC engine has no configurable pins.
29.5 General description
The Cyclic Redundancy Check (CRC) generator with programmable polynomial settings
supports several CRC standards commonly used.
UM11029
Chapter 29: LPC84x CRC engine
Rev. 1.0 — 16 June 2017
User manual