UM11029
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User manual
Rev. 1.0 — 16 June 2017
209 of 515
NXP Semiconductors
UM11029
Chapter 12: LPC84x General Purpose I/O (GPIO)
12.5.4 GPIO port mask registers
These registers affect writing and reading the MPORT registers. Zeroes in these registers
enable reading and writing; ones disable writing and result in zeros in corresponding
positions when reading.
12.5.5 GPIO port pin registers
Reading these registers returns the current state of the pins read, regardless of direction,
masking, or alternate functions, except that pins configured as analog I/O always read as
0s. Writing these registers loads the output bits of the pins written to, regardless of the
Mask register.
12.5.6 GPIO masked port pin registers
These registers are similar to the PORT registers, except that the value read is masked by
ANDing with the inverted contents of the corresponding MASK register, and writing to one
of these registers only affects output register bits that are enabled by zeros in the
corresponding MASK register
Table 258. GPIO mask port register (MASK[0:1], address 0xA000 2080(MASK0) to
0xA0002084(MASK1)) bit description
Bit
Symbol
Description
Reset
value
Access
31:0
MASKP
Controls which bits corresponding to PIOm_n are active in
the MPORT register (bit 0 = PIOm_0, bit 1 = PIOm_1, ..., bit
31 = PIOm_31). m = port 0 to 1; n = pin 0 to 31 for port 0 and
pin 0 to 21 for port 1.
0 = Read MPORT: pin state; write MPORT: load output bit.
1 = Read MPORT: 0; write MPORT: output bit not affected.
0
R/W
Table 259. GPIO port pin register (PIN[0:1], address 0xA000 2100(PIN0) to 0xA0000 2104
(PIN1)) bit description
Bit
Symbol Description
Reset
value
Access
31:0
PORT
Reads pin states or loads output bits (bit 0 = PIOm_0, bit 1 =
PIOm_1, ..., bit 31 = PIOm_31). m = port 0 to 1; n = pin 0 to
31 for port 0 and pin 0 to 21 for port 1.
0 = Read: pin is low; write: clear output bit.
1 = Read: pin is high; write: set output bit.
ext
R/W
Table 260. GPIO masked port pin register (MPIN[0:1], address 0xA000 2180(MPIN0) to
0xA0000 2184(MPIN1)) bit description
Bit
Symbol
Description
Reset
value
Access
31:0
MPORTP
Masked port register (bit 0 = PIOm_0, bit 1 =PIOm_1, ...,
bit 31 = PIOm_31). m = port 0 to 1; n = pin 0 to 31 for port
0 and pin 0 to 21 for port 1.
0 = Read: pin is LOW and/or the corresponding bit in the
MASK register is 1; write: clear output bit if the
corresponding bit in the MASK register is 0.
1 = Read: pin is HIGH and the corresponding bit in the
MASK register is 0; write: set output bit if the
corresponding bit in the MASK register is 0.
ext
R/W
