UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
428 of 515
NXP Semiconductors
UM11029
Chapter 24: LPC84x Multi-Rate Timer (MRT)
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.
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Bus-stall mode.
The modes for each timer are set in the timer’s control register. See
24.5.1 Repeat interrupt mode
The repeat interrupt mode generates repeated interrupts after a selected time interval.
This mode can be used for software-based PWM or PPM applications.
When the timer n is in idle state, writing a non-zero value IVALUE to the INTVALn register
immediately loads the time interval value IVALUE - 1, and the timer begins to count down
from this value. When the timer reaches zero, an interrupt is generated, the value in the
INTVALn register IVALUE - 1 is reloaded automatically, and the timer starts to count down
again.
While the timer is running in repeat interrupt mode, you can perform the following actions:
•
Change the interval value on the next timer cycle by writing a new value (>0) to the
INTVALn register and setting the LOAD bit to 0. An interrupt is generated when the
timer reaches zero. On the next cycle, the timer counts down from the new value.
•
Change the interval value on-the-fly immediately by writing a new value (>0) to the
INTVALn register and setting the LOAD bit to 1. The timer immediately starts to count
down from the new timer interval value. An interrupt is generated when the timer
reaches 0.
•
Stop the timer at the end of time interval by writing a 0 to the INTVALn register and
setting the LOAD bit to 0. An interrupt is generated when the timer reaches zero.
•
Stop the timer immediately by writing a 0 to the INTVALn register and setting the
LOAD bit to 1. No interrupt is generated when the INTVALn register is written.
Fig 58. MRT block diagram
BUS
-1 DEC
STAT
IRQ_GEN
TIMER
CONTROL
ZEROS
INTVAL
MUX
CHANNEL0
CHANNEL[1:3]
IRQ0
IRQ[1:3]
D
Q
D
Q
