NXP Semiconductors LPC84x, Руководство пользователя

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UM11029 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
User manual Rev. 1.0 — 16 June 2017 380 of 515
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Chapter 21: LPC84x SCTimer/PWM
CAP0 to CAP7 R/W 0x100 to 0x11C SCT capture register of capture channel 0 to 7;
REGMODE0 to REGMODE7 = 1
0x0000 0000 21.6.21
CAP0_L to
CAP7_L R/W 0x100 to 0x11C SCT capture register of capture channel 0 to 7; low
counter 16-bit; REGMODE0_L to REGMODE7_L =
1
0x0000 0000 21.6.21
CAP0_H to
CAP7_H R/W 0x102 to 0x11E SCT capture register of capture channel 0 to 7;
high counter 16-bit; REGMODE0_H to
REGMODE7_H = 1
0x0000 0000 21.6.21
MATCHREL0 to
MATCHREL7 R/W 0x200 to 0x21C SCT match reload value register 0 to 7;
REGMODE0 = 0 to REGMODE7 = 0
0x0000 0000 21.6.22
MATCHREL0_L to
MATCHREL7_L R/W 0x200 to 0x21C SCT match reload value register 0 to 7; low
counter 16-bit; REGMODE0_L = 0 to
REGMODE7_L = 0
0x0000 0000 21.6.22
MATCHREL0_H to
MATCHREL7_H R/W 0x202 to 0x21E SCT match reload value register 0 to 7; high
counter 16-bit; REGMODE0_H = 0 to
REGMODE7_H = 0
0x0000 0000 21.6.22
CAPCTRL0 to
CAPCTRL7 R/W 0x200 to 0x21C SCT capture control register 0 to 7; REGMODE0 =
1 to REGMODE7 = 1
0x0000 0000 21.6.23
CAPCTRL0_L to
CAPCTRL7_L R/W 0x200 to 0x21C SCT capture control register 0 to 7; low counter
16-bit; REGMODE0_L = 1 to REGMODE7_L = 1
0x0000 0000 21.6.23
CAPCTRL0_H to
CAPCTRL7_H R/W 0x202 to 0x21E SCT capture control register 0 to 7; high counter
16-bit; REGMODE0 = 1 to REGMODE7 = 1
0x0000 0000 21.6.23
EV0_STATE R/W 0x300 SCT event state register 0 0x0000 0000 21.6.24
EV0_CTRL R/W 0x304 SCT event control register 0 0x0000 0000 21.6.25
EV1_STATE R/W 0x308 SCT event state register 1 0x0000 0000 21.6.24
EV1_CTRL R/W 0x30C SCT event control register 1 0x0000 0000 21.6.25
EV2_STATE R/W 0x310 SCT event state register 2 0x0000 0000 21.6.24
EV2_CTRL R/W 0x314 SCT event control register 2 0x0000 0000 21.6.25
EV3_STATE R/W 0x318 SCT event state register 3 0x0000 0000 21.6.24
EV3_CTRL R/W 0x31C SCT event control register 3 0x0000 0000 21.6.25
EV4_STATE R/W 0x320 SCT event state register 4 0x0000 0000 21.6.24
EV4_CTRL R/W 0x324 SCT event control register4 0x0000 0000 21.6.25
EV5_STATE R/W 0x328 SCT event state register 5 0x0000 0000 21.6.24
EV5_CTRL R/W 0x32C SCT event control register 5 0x0000 0000 21.6.25
EV6_STATE R/W 0x330 SCT event state register 6 0x0000 0000 21.6.24
EV6_CTRL R/W 0x334 SCT event control register 6 0x0000 0000 21.6.25
EV7_STATE R/W 0x338 SCT event state register 7 0x0000 0000 21.6.24
EV7_CTRL R/W 0x33C SCT event control register 7 0x0000 0000 21.6.25
OUT0_SET R/W 0x500 SCT output 0 set register 0x0000 0000 21.6.26
OUT0_CLR R/W 0x504 SCT output 0 clear register 0x0000 0000 21.6.27
OUT1_SET R/W 0x508 SCT output 1 set register 0x0000 0000 21.6.26
OUT1_CLR R/W 0x50C SCT output 1 clear register 0x0000 0000 21.6.27
OUT2_SET R/W 0x510 SCT output 2 set register 0x0000 0000 21.6.26
OUT2_CLR R/W 0x514 SCT output 2 clear register 0x0000 0000 21.6.27
Table 385. Register overview: SCTimer/PWM (base address 0x5000 4000)
…continued
Name Access Address offset Description Reset value Section