UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
427 of 515
24.1 How to read this chapter
The MRT is available on all LPC84x parts.
24.2 Features
•
31-bit interrupt timer
•
Four channels independently counting down from individually set values
•
Repeat, bus-stall, and one-shot interrupt modes
24.3 Basic configuration
Configure the MRT using the following registers:
•
In the SYSAHBCLKCTRL register, set bit 10 (
) to enable the clock to the
register interface.
•
Clear the MRT reset using the PRESETCTRL register (
).
•
The global MRT interrupt is connected to interrupt #10 in the NVIC.
24.4 Pin description
The MRT has no configurable pins.
24.5 General description
The Multi-Rate Timer (MRT) provides a repetitive interrupt timer with four channels. Each
channel can be programmed with an independent time interval.
Each channel operates independently from the other channels in one of the following
modes:
•
Repeat interrupt mode. See
UM11029
Chapter 24: LPC84x Multi-Rate Timer (MRT)
Rev. 1.0 — 16 June 2017
User manual
Fig 57. MRT clocking
MRT
SYSCON
system clock
SYSAHBCLKCTRL[10]
(MRT clock enable)
MRT_PCLK
TIMER[0:3]
