UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
455 of 515
NXP Semiconductors
UM11029
Chapter 26: LPC84x 12-bit Analog-to-Digital Converter (ADC)
The information presented in the DAT registers always pertains to the most recent
conversion completed on that channel regardless of what sequence requested the
conversion or which trigger caused it.
The OVERRUN fields for each channel are also replicated in the FLAGS register.
Table 448. A/D Data Registers (DAT[0:11], address 0x4001 C020 (DAT0) to 0x4001 C04C (DAT11)) bit description
Bit
Symbol
Description
Reset
value
3:0
-
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
NA
15:4
RESULT
This field contains the 12-bit A/D conversion result from the last conversion performed
on this channel. This will be a binary fraction representing the voltage on the AD0[n]
pin, as it falls within the range of V
REFP
to V
REFN
. Zero in the field indicates that the
voltage on the input pin was less than, equal to, or close to that on V
REFN
, while 0xFFF
indicates that the voltage on the input was close to, equal to, or greater than that on
V
REFP
.
NA
17:16 THCMPRANGE Threshold Range Comparison result.
0x0 = In Range: The last completed conversion was greater than or equal to the value
programmed into the designated LOW threshold register (THRn_LOW) but less than or
equal to the value programmed into the designated HIGH threshold register
(THRn_HIGH).
0x1 = Below Range: The last completed conversion on was less than the value
programmed into the designated LOW threshold register (THRn_LOW).
0x2 = Above Range: The last completed conversion was greater than the value
programmed into the designated HIGH threshold register (THRn_HIGH).
0x3 = Reserved.
NA
19:18 THCMPCROSS Threshold Crossing Comparison result.
0x0 = No threshold Crossing detected:
The most recent completed conversion on this channel had the same relationship
(above or below) to the threshold value established by the designated LOW threshold
register (THRn_LOW) as did the previous conversion on this channel.
0x1 = Reserved.
0x2 = Downward Threshold Crossing Detected. Indicates that a threshold crossing in
the downward direction has occurred - i.e. the previous sample on this channel was
above the threshold value established by the designated LOW threshold register
(THRn_LOW) and the current sample is below that threshold.
0x3 = Upward Threshold Crossing Detected. Indicates that a threshold crossing in the
upward direction has occurred - i.e. the previous sample on this channel was below the
threshold value established by the designated LOW threshold register (THRn_LOW)
and the current sample is above that threshold.
NA
25:20 -
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
NA
