NXP Semiconductors LPC84x, Руководство пользователя

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UM11029 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
User manual Rev. 1.0 — 16 June 2017 214 of 515
13.1 How to read this chapter
The pin interrupt generator and the pattern match engine are available on all LPC84x
parts.
13.2 Features
•
Pin interrupts
–
Up to eight pins can be selected from all GPIO pins as edge- or level-sensitive
interrupt requests. Each request creates a separate interrupt in the NVIC.
–
Edge-sensitive interrupt pins can interrupt on rising or falling edges or both.
–
Level-sensitive interrupt pins can be HIGH- or LOW-active.
•
Pattern match engine
–
Up to eight pins can be selected from all GPIO pins to contribute to a boolean
expression. The boolean expression consists of specified levels and/or transitions
on various combinations of these pins.
–
Each bit slice minterm (product term) comprising the specified boolean expression
can generate its own, dedicated interrupt request.
–
Any occurrence of a pattern match can be programmed to also generate an RXEV
notification to the ARM CPU. The RXEV signal can be connected to a pin.
–
Pattern match can be used, in conjunction with software, to create complex state
machines based on pin inputs.
13.3 Basic configuration
•
Pin interrupts:
–
Select up to eight external interrupt pins from all GPIO port pins in the SYSCON
block (
Table 167 ). The pin selection process is the same for pin interrupts and the
pattern match engine. The two features are mutually exclusive.
–
Enable the clock to the pin interrupt register block in the SYSAHBCLKCTRL
register (
Table 146 , bit 28).
–
If you want to use the pin interrupts to wake up the part from deep-sleep mode or
power-down mode, enable the pin interrupt wake-up feature in the STARTERP0
register (
Table 168 ).
–
Each selected pin interrupt is assigned to one interrupt in the NVIC (interrupts #24
to #31 for pin interrupts 0 to 7).
• Pattern match engine:
–
Select up to eight external pins from all GPIO port pins in the SYSCON block
(
Table 167 ). The pin selection process is the same for pin interrupts and the pattern
match engine. The two features are mutually exclusive.
UM11029
Chapter 13: LPC84x Pin interrupts/pattern match engine
Rev. 1.0 — 16 June 2017 User manual