UM11029
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User manual
Rev. 1.0 — 16 June 2017
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NXP Semiconductors
UM11029
Chapter 25: LPC84x System tick timer (SysTick)
The SysTick timer is an integral part of the Cortex-M0+. The SysTick timer is intended to
generate a fixed 10 millisecond interrupt for use by an operating system or other system
management software.
Since the SysTick timer is a part of the Cortex-M0+, it facilitates porting of software by
providing a standard timer that is available on Cortex-M0 based devices. The SysTick
timer can be used for:
•
An RTOS tick timer which fires at a programmable rate (for example 100 Hz) and
invokes a SysTick routine.
•
A high-speed alarm timer using the core clock.
•
A simple counter. Software can use this to measure time to completion and time used.
•
An internal clock source control based on missing/meeting durations. The
COUNTFLAG bit-field in the control and status register can be used to determine if an
action completed within a set duration, as part of a dynamic clock management
control loop.
for details.
25.6 Register description
The SysTick timer registers are located on the ARM Cortex-M0+ private peripheral bus
(see
), and are part of the ARM Cortex-M0+ core peripherals. For details, see
[1]
Reset Value reflects the data stored in used bits only. It does not include content of reserved bits.
25.6.1 System Timer Control and status register
The SYST_CSR register contains control information for the SysTick timer and provides a
status flag. This register is part of the ARM Cortex-M0+ core system timer register block.
For a bit description of this register, see
This register determines the clock source for the system tick timer.
Table 433. Register overview: SysTick timer (base address 0xE000 E000)
Name
Access
Address
offset
Description
Reset value
SYST_CSR
R/W
0x010
System Timer Control and status register
0x000 0000
SYST_RVR
R/W
0x014
System Timer Reload value register
0
SYST_CVR
R/W
0x018
System Timer Current value register
0
SYST_CALIB
R/W
0x01C
System Timer Calibration value register
0x4