UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
441 of 515
NXP Semiconductors
UM11029
Chapter 26: LPC84x 12-bit Analog-to-Digital Converter (ADC)
26.3.4 Hardware self-calibration
The A/D converter includes a built-in, hardware self-calibration mode. In order to achieve
the specified ADC accuracy, the A/D converter must be recalibrated, at a minimum,
following every chip reset before initiating normal ADC operation.
The calibration voltage level is VREFP - VREFN.
To calibrate the ADC follow these steps:
1. Save the current contents of the ADC CTRL register if different from default.
2. In a single write to the ADC CTRL register, do the following to start the calibration:
–
Set the calibration mode bit CALMODE.
–
Write a divider value to the CLKDIV bit field that divides the system clock to yield
an ADC clock of about 500 kHz.
–
Clear the LPWR bit.
3. Poll the CALMODE bit until it is cleared.
Before launching a new A/D conversion, restore the contents of the CTRL register or use
the default values.
A calibration cycle requires approximately 290
μ
s to complete. While calibration is in
progress, normal ADC conversions cannot be launched, and the ADC Control Register
must not be written to. The calibration procedure does not use the CPU or memory, so
other processes can be executed during calibration.
26.4 Pin description
The ADC cell can measure the voltage on any of the input signals on the analog input
channel. Digital signals are disconnected from the ADC input pins when the ADC function
is selected on that pin in the IOCON register.
Remark:
If the ADC is used, signal levels on analog input pins must not be above the
level of V
DD
at any time. Otherwise, ADC readings will be invalid. If the ADC is not used in
an application, then the pins associated with ADC inputs can be configured as digital I/O
pins and are 5 V tolerant.
Table 439. ADC hardware trigger inputs
Input #
Source
Description
0
-
No hardware trigger.
1
PININT0_IRQ
GPIO_INT interrupt 0.
2
PININT1_IRQ
GPIO_INT interrupt 1.
3
SCT0_OUT3
SCT output 3.
4
SCT0_OUT4
SCT output 4.
5
T0_MAT3
CTIMER match 3.
6
CMP0_OUT_ADC
Analog comparator output.
7
GPIO_INT_BMAT
GPIO_INT bmatch.
8
ARM_TXEV
ARM core TXEV event.
