UM11029
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© NXP Semiconductors N.V. 2017. All rights reserved.
User manual
Rev. 1.0 — 16 June 2017
218 of 515
NXP Semiconductors
UM11029
Chapter 13: LPC84x Pin interrupts/pattern match engine
The detect logic of each slice can detect the following events on the selected input:
•
Edge with memory (sticky): A rising edge, a falling edge, or a rising or falling edge that
is detected at any time after the edge-detection mechanism has been cleared. The
input qualifies as detected (the detect logic output remains HIGH) until the pattern
match engine detect logic is cleared again.
•
Event (non-sticky): Every time an edge (rising or falling) is detected, the detect logic
output for this pin goes HIGH. This bit is cleared after one clock cycle, and the detect
logic can detect another edge,
•
Level: A HIGH or LOW level on the selected input.
shows the details of the edge detection logic for each slice.
You can combine a sticky event with non-sticky events to create a pin interrupt whenever
a rising or falling edge occurs after a qualifying edge event.
You can create a time window during which rising or falling edges can create a pin
interrupt by combining a level detect with an event detect. See
for details.
13.5.2.1 Inputs and outputs of the pattern match engine
The connections between the pins and the pattern match engine are shown in
All inputs to the pattern match engine are selected in the SYSCON block and can be
GPIO port pins or another pin function depending on the switch matrix configuration.
Fig 17. Pattern match bit slice with detect logic
MUX
IN0
PMSRC
Intr_Req(i)
Rise Detect
(sticky with synch
clear)
IN1
IN2
IN3
IN4
IN5
IN6
IN7
Fall Detect
(sticky with synch
clear)
Rise Detect
(non-sticky)
Fall Detect
(non-sticky)
MUX
PMCFG
0
1
2
3
4
5
6
7
From Previous
Slice
Prod_Endpts(i)
To Next Slice
CFG(i)
SRC(i)
PMCFG
Pattern_Match(i)
