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279
Timer and Counter Instructions
Section 3-6
Operand Specifications
Description
The counter PV is incremented by 1 every time that the increment input goes
from OFF to ON and it is decremented by 1 every time that the decrement
input goes from OFF to ON. The PV can fluctuate between 0 and the SV.
When incrementing, the Completion Flag will be turned ON when the PV is
incremented from the SV back to 0 and it will be turned OFF again when the
PV is incremented from 0 to 1.
Area
N
S
CIO Area
---
CIO 0000 to CIO 6143
Work Area
---
W000 to W511
Holding Bit Area
---
H000 to H511
Auxiliary Bit
Area
---
A000 to A959
Timer Area
---
T0000 to T4095
Counter Area
0000 to 4095 (decimal)
C0000 to C4095
DM Area
---
D00000 to D32767
EM Area with-
out bank
---
E00000 to E32767
EM Area with
bank
---
En_00000 to En_32767
(n = 0 to C)
Indirect DM/EM
addresses in
binary
---
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in
BCD
---
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
---
BCD:
#0000 to 9999 (BCD)
“&” cannot be used.
Binary:
&0 to &65535 (decimal)
#0000 to #FFFF (hex)
Data Registers
---
DR0 to DR15
Index Registers
---
---
Indirect address-
ing using Index
Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
Increment input
Counter PV
Decrement input
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...