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351
Data Movement Instructions
Section 3-8
Variations
Applicable Program Areas
Operand Specifications
Description
XCHG(073) exchanges the contents of E1+1 and E1 with the contents of
E2+1 and E2.
To exchange 3 or more words, use XFER(070) to transfer the words to a third
set of words (a buffer) as shown in the following diagram.
Variations
Executed Each Cycle for ON Condition
XCGL(562)
Executed Once for Upward Differentiation
@XCGL(562)
Executed Once for Downward Differentiation Not supported
Immediate Refreshing Specification
Not supported
Block program areas
Step program areas
Subroutines
Interrupt tasks
OK
OK
OK
OK
Area
E1
E2
CIO Area
CIO 0000 to CIO 6142
Work Area
W000 to W510
Holding Bit Area
H000 to H510
Auxiliary Bit Area
A448 to A958
Timer Area
T0000 to T4094
Counter Area
C0000 to C4094
DM Area
D00000 to D32766
EM Area without bank
E00000 to E32766
EM Area with bank
En_00000 to En_32766
(n = 0 to C)
Indirect DM/EM
addresses in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
---
---
Data Registers
---
Index Registers
IR0 to IR15
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047, IR0 to –2048 to +2047, IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –) IR0 to, –(– –) IR15
E2
E1
E1+1
E2+1
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...