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1315
CJ-series Instruction Execution Times and Number of Steps
Section 4-2
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
4-2-3
Sequence Control Instructions
DIFFEREN-
TIATE
DOWN
DIFD
14
2
0.21
0.24
0.40
0.54
0.50
0.50
---
SET
SET
---
1
0.016
0.02
0.06
0.21
0.30
0.30
---
!SET
---
2
+21.37
+21.37
+21.37
+21.37
+23.17
+28.60
Increase for immedi-
ate refresh
RESET
RSET
---
1
0.016
0.02
0.06
0.21
0.30
0.30
Word specified
!RSET
---
2
+21.37
+21.37
+21.37
+21.37
+23.17
+28.60
Increase for immedi-
ate refresh
MULTIPLE
BIT SET
SETA
530
4
5.8
5.8
6.1
7.8
11.8
11.8
With 1-bit set
25.7
25.7
27.2
38.8
64.1
64.1
With 1,000-bit set
MULTIPLE
BIT RESET
RSTA
531
4
5.7
5.7
6.1
7.8
11.8
11.8
With 1-bit reset
25.8
25.8
27.1
38.8
64.0
64.0
With 1,000-bit reset
SINGLE BIT
SET
SETB
532
2
0.19
0.24
0.34
---
0.5
0.5
---
!SETB
3
+21.44
+21.44
+21.54
---
+23.31
+23.31
---
SINGLE BIT
RESET
RSTB
533
2
0.19
0.24
0.34
---
0.5
0.5
---
!RSTB
3
+21.44
+21.44
+21.54
---
+23.31
+23.31
---
SINGLE BIT
OUTPUT
OUTB
534
2
0.19
0.22
0.32
---
0.45
0.45
---
!OUTB
3
+21.42
+21.42
+21.52
---
+23.22
+23.22
---
Instruction
Mne-
monic
Code
Length
(steps)
(See
note 1.)
ON execution time (
µ
s)
Conditions
CPU6
@
H-R
CPU6
@
H
CPU4
@
H
CPU4
@
CJ1M
exclud-
ing
CPU11/
21
CJ1M
CPU11
/21
END
END
001
1
5.5
5.5
6.0
4.0
7.9
7.9
---
NO OPER-
ATION
NOP
000
1
0.016
0.02
0.04
0.12
0.05
0.05
---
INTER-
LOCK
IL
002
1
0.048
0.06
0.06
0.12
0.15
0.15
---
INTER-
LOCK
CLEAR
ILC
003
1
0.048
0.06
0.06
0.12
0.15
0.15
---
MULTI-
INTER-
LOCK DIF-
FERENTIAT
ION HOLD
(See note
2.)
MILH
517
3
6.1
6.1
6.5
---
10.3
11.7
During interlock
7.5
7.5
7.9
---
13.3
14.6
Not during interlock
and interlock not set
8.9
8.9
9.7
---
16.6
18.3
Not during interlock
and interlock set
MULTI-
INTER-
LOCK DIF-
FERENTIAT
ION
RELEASE
(See note
2.)
MILR
518
3
6.1
6.1
6.5
---
10.3
11.7
During interlock
7.5
7.5
7.9
---
13.3
14.6
Not during interlock
and interlock not set
8.9
8.9
9.7
---
16.6
18.3
Not during interlock
and interlock set
Instruction
Mne-
monic
Code Length
(steps)
(See
note.)
ON execution time (
µ
s)
Conditions
CPU6
@
H-R
CPU6
@
H
CPU4
@
H
CPU4
@
CJ1M
exclud-
ing
CPU11/
21
CJ1M
CPU11/
21
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...