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Sequence Input Instructions
Section 3-3
3-3-10 Operation Timing for I/O Instructions
The following chart shows the differences in the timing of instruction opera-
tions for a program configured from LD and OUT.
3-3-11 TR Bits
TR bits are used to temporarily retain the ON/OFF status of execution condi-
tions in a program when programming in mnemonic code. They are not used
when programming directly in ladder program form because the processing is
automatically executed by the Peripheral Device. The following diagram
shows a simple application using two TR bits.
↓
↑
!
!
!
!
!
!
!
!
!
↓
!
↑
!
↓
↑
!
↓
!
↑
I/O refreshing
Instruction execution
CPU
processing
Input
received
Input
received
Input
received
Input
received
Input
received
Input
received
Input
received
Input
received
Input
received
Input
received
Input received
Input
received
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...