Omron SYSMAC CS Series, Reference Manual, Page: 398 / 1405

358
Data Movement Instructions
Section 3-8
Flags
Note In CS1-H, CJ1-H, CJ1M, and CS1D (for Single-CPU System) CPU Units,
these Flags are left unchanged.
In CS1 and CJ1 CPU Units, these Flags are turned OFF.
Precautions MOVR(560) cannot set the PLC memory addresses of timer/counter PVs.
Use MOVRW(561) to set the PLC memory addresses of timer/counter PVs.
The contents of an index register in an interrupt task is not predictable until it
is set. Be sure to set a register using MOVR(560) in an interrupt task before
using the register.
Any changes to the contents of an IR or DR made in an interrupt task will not
affect the contents of the register in a cyclic task.
Example When CIO 000000 is ON in the following example, MOVR(560) writes the
PLC memory address of CIO 0020 to IR0.
3-8-15 MOVE TIMER/COUNTER PV TO REGISTER: MOVRW(561)
Purpose Sets the PLC memory address of the specified timer or counter’s PV in the
specified Index Register. (Use MOVR(560) to set the PLC memory address of
a word, bit, or timer/counter Completion Flag in an Index Register.)
Ladder Symbol
Variations
Applicable Program Areas
Operands D: Destination
The destination must be an Index Register (IR0 to IR15).
Name Label Operation
Error Flag ER Unchanged (See note.)
Equals Flag = Unchanged (See note.)
Negative Flag N Unchanged (See note.)
S: 0020
D: IR0
1 4
1 4
Internal I/O memory address
Internal I/O memory
address of CIO 0020
S
D
MOVRW(561)
S
: Source (desired TC number)
D
: Destination (Index Register)
Variations Executed Each Cycle for ON Condition MOVR(561)
Executed Once for Upward Differentiation @MOVR(561)
Executed Once for Downward Differentiation Not supported
Immediate Refreshing Specification Not supported
Block program areas Step program areas Subroutines Interrupt tasks
OK OK OK OK