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1345

CJ-series Instruction Execution Times and Number of Steps

Section 4-2

Note When a double-length operand is used, add 1 to the value shown in the length

column in the following table.

4-2-31 Text String Processing Instructions

Loop Control

LEND
(relay
number)

810

9.9

10.7

14.4

17.5

19.9

LEND condi-
tion satisfied

8.9

10.3

13.0

21.6

24.5

LEND condi-
tion not satis-
fied

Loop Control

LEND
NOT
(relay
number)

810

10.2

11.2

14.8

21.9

24.9

LEND condi-
tion satisfied

9.3

10.8

13.5

17.8

20.4

LEND condi-
tion not satis-
fied

HUNDRED-MS
TIMER WAIT

TIMW

813

22.3

25.2

33.1

47.4

52.0

Default setting

24.9

27.8

35.7

46.2

53.4

Normal execu-
tion

TIMWX

816

22.3

25.2

33.1

47.4

52.0

Default setting

24.9

27.8

35.7

46.2

53.4

Normal execu-
tion

Instruction

Mne-

monic

Code

Length
(steps)

(See

note.)

ON execution time (

Conditions

CPU6

H-R

CPU6

CPU4

CJ1M

exclud-

ing

CPU11/

CJ1M

CPU11

/21

MOV
STRING

MOV$

664

45.6

66.0

84.3

79.3

72.7

Transferring 1 char-
acter

CONCATE-
NATE
STRING

656

86.5

126.0

167.8

152.0

137.0

1 cha 1
character

GET
STRING
LEFT

LEFT$

652

53.0

77.4

94.3

93.6

84.8

Retrieving 1 charac-
ter from 2 charac-
ters

GET
STRING
RIGHT

RGHT$

653

52.2

76.3

94.2

92.1

83.3

Retrieving 1 charac-
ter from 2 charac-
ters

GET
STRING
MIDDLE

MID$

654

56.5

84.6

230.2

93.7

84.0

Retrieving 1 charac-
ter from 3 charac-
ters

FIND IN
STRING

FIND$

660

51.4

77.5

94.1

89.1

96.7

Searching for 1
character from 2
characters

STRING
LENGTH

LEN$

650

19.8

28.9

33.4

33.8

30.1

Detecting 1 charac-
ter

REPLACE
IN STRING

RPLC$

661

175.1

258.7

479.5

300.7

267.7

Replacing the first of
2 characters with 1
character

DELETE
STRING

DEL$

658

63.4

94.2

244.6

11.3

99.3

Deleting the leading
character of 2 char-
acters

Instruction

Mne-

monic

Code

Length
(steps)

(See

note.)

ON execution time (

Conditions

CPU6

H-R

CPU6

CPU4

CJ1M

exclud-

ing

CPU11

/21

CJ1M

CPU11

/21

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Summary of Contents for SYSMAC CS Series

Page 1: ...Cat No W340 E1 16 Programmable Controllers SYSMAC CS Series SYSMAC CJ Series SYSMAC One NSJ Series REFERENCE MANUAL ...

Page 2: ......

Page 3: ...CS1G H CPU EV1 CS1G H CPU H CS1D CPU H CS1D CPU S SYSMAC CJ Series CJ1H CPU H R CJ1G CPU CJ1G H CPU H CJ1G CPU P CJ1M CPU SYSMAC One NSJ Series Programmable Controllers Instructions Reference Manual Revised August 2008 ...

Page 4: ...iv ...

Page 5: ...n some OMRON products often means word and is abbreviated Wd in documentation in this sense The abbreviation PLC means Programmable Controller PC is used how ever in some Programming Device displays to mean Programmable Control ler Visual Aids The following headings appear in the left column of the manual to help you locate different types of information Note Indicates information of particular in...

Page 6: ...1 1 CPU Units for which a unit version is not given are called Pre Ver CPU Units such as Pre Ver 2 0 CPU Units and Pre Ver 1 1 CPU Units Confirming Unit Versions with Support Software CX Programmer version 4 0 can be used to confirm the unit version using one of the following two methods Using the PLC Information Using the Unit Manufacturing Information This method can be used for Special I O Unit...

Page 7: ... the unit version of the CPU Unit Unit Manufacturing Information In the IO Table Window right click and select Unit Manufacturing informa tion CPU Unit The following Unit Manufacturing information Dialog Box will be displayed Unit version ...

Page 8: ...e CPU Unit connected online Using the Unit Version Labels The following unit version labels are provided with the CPU Unit These labels can be attached to the front of previous CPU Units to differenti ate between CPU Units of different unit versions Unit version ...

Page 9: ...en Ver Designating individual CPU Units e g the CS1H CPU67H Pre Ver 2 0 CS1 H CPU Units CS1H CPU67H CPU Unit Ver Designating groups of CPU Units e g the CS1 H CPU Units Pre Ver 2 0 CS1 H CPU Units CS1 H CPU Units Ver Designating an entire series of CPU Units e g the CS series CPU Units Pre Ver 2 0 CS series CPU Units CS series CPU Units Ver Lot No XXXXXX XXXX OMRON Corporation MADE IN JAPAN Lot No...

Page 10: ...U S Unit version 2 0 CS1 CPU Units CS1 CPU No unit version CS1 Version 1 CPU Units CS1 CPU V1 No unit version Units Models Unit version CJ1 H CPU Units CJ1H CPU H R Unit version 4 0 CJ1 CPU H CJ1 CPU P Unit version 4 0 Unit version 3 0 Unit version 2 0 Pre Ver 2 0 CJ1M CPU Units CJ1M CPU12 13 CJ1M CPU22 23 Unit version 4 0 Unit version 3 0 Unit version 2 0 Pre Ver 2 0 CJ1M CPU11 21 Unit version 4 ...

Page 11: ...r earlier a program error will occur when oper ation is started or when the unit version 4 0 function is executed and CPU Unit operation will stop Function CS1 CPU H Unit version 4 0 or later Other unit versions Online editing of function blocks Note This function cannot be used for simulations on the CX Sim ulator OK Input output variables in function blocks OK Text strings in function blocks OK ...

Page 12: ...ion block instructions GETID 286 OK Additional instruction func tions TXD 235 and RXD 236 instructions support no protocol communications with Serial Commu nications Boards with unit version 1 2 or later OK Function CJ1H CPU H R CJ1 CPU H CJ1G CPU P CJ1M CPU Unit version 3 0 or later Other unit versions Function blocks OK Serial Gateway converting FINS commands to CompoWay F commands at the built ...

Page 13: ...ttempt is made to download programs containing unit version 3 0 functions to a CPU Unit with a unit version of 2 0 or earlier and the download will not be possible If an object program file OBJ using these functions is transferred to a CPU Unit with a unit version of 2 0 or earlier a program error will occur when oper ation is started or when the unit version 3 0 function is executed and CPU Unit ...

Page 14: ...hout I O Tables OK Communications through a Maximum of 8 Net work Levels OK Connecting Online to PLCs via NS series PTs OK OK from lot number 030201 Setting First Slot Words OK for up to 64 groups OK for up to 8 groups Automatic Transfers at Power ON without a Parameter File OK Automatic Detection of I O Allocation Method for Automatic Transfer at Power ON Operation Start End Times OK New Applicat...

Page 15: ... Improved Read Protection Using Passwords OK Write Protection from FINS Commands Sent to CPU Units via Networks OK Online Network Connections without I O Tables OK Communications through a Maximum of 8 Network Levels OK Connecting Online to PLCs via NS series PTs OK Setting First Slot Words OK for up to 64 groups Automatic Transfers at Power ON without a Parameter File OK Automatic Detection of I ...

Page 16: ...ported if I O tables are automatically generated at startup OK Supported if I O tables are automatically generated at startup OK Communications through a Maximum of 8 Network Levels OK OK OK Connecting Online to PLCs via NS series PTs OK OK from lot number 030201 OK OK from lot number 030201 OK Setting First Slot Words OK for up to 64 groups OK for up to 8 groups OK for up to 64 groups OK for up t...

Page 17: ...t program file OBJ using these functions is transferred to a Pre Ver 2 0 CPU Unit a program error will occur when operation is started or when the unit version 2 0 function is executed and CPU Unit operation will stop ...

Page 18: ... functional im provements made for unit version 4 0 of the CS CJ series CPU Units With CX Programmer version 7 2 or higher you can use even more expanded functionality CPU Unit Functions See note 1 CX Programmer Program ming Con sole Ver 3 3 or lower Ver 4 0 Ver 5 0 Ver 6 0 Ver 7 0 or higher CS CJ series unit Ver 4 0 Functions added for unit version 4 0 Using new functions OK See note 2 and 3 No r...

Page 19: ...ing CPU types CPU67 R CPU66 R CPU65 R or CPU64 R Series CPU Unit group CPU Unit model Device type setting on CX Programmer Ver 4 0 or higher CS Series CS1 H CPU Units CS1G CPU H CS1G H CS1H CPU H CS1H H CS1D CPU Units for Duplex CPU Systems CS1D CPU H CS1D H or CS1H H CS1D CPU Units for Single CPU Systems CS1D CPU S CS1D S CJ Series CJ1 H CPU Units CJ1G CPU H CJ1G CPU P CJ1G H CJ1H CPU H R See not...

Page 20: ...e to a CPU Unit with a later unit version An attempt was to download a PLC Setup containing settings supported only by later unit ver sions or a CPU Unit to a previous unit version Check the settings in the PLC Setup or change to a CPU Unit with a later unit version is displayed in a program transferred from the PLC to the CX Programmer An attempt was made to upload a program containing instructio...

Page 21: ...ation and Layout of Instruction Descriptions 155 3 2 Instruction Upgrades and New Instructions 158 3 3 Sequence Input Instructions 161 3 4 Sequence Output Instructions 185 3 5 Sequence Control Instructions 206 3 6 Timer and Counter Instructions 242 3 7 Comparison Instructions 291 3 8 Data Movement Instructions 331 3 9 Data Shift Instructions 360 3 10 Increment Decrement Instructions 409 3 11 Symbo...

Page 22: ...bugging Instructions 1136 3 30 Failure Diagnosis Instructions 1140 3 31 Other Instructions 1165 3 32 Block Programming Instructions 1186 3 33 Text String Processing Instructions 1220 3 34 Task Control Instructions 1255 3 35 Model Conversion Instructions Unit Ver 3 0 or Later 1261 SECTION 4 Instruction Execution Times and Number of Steps 1281 4 1 CS series Instruction Execution Times and Number of ...

Page 23: ...city 1280 points 640 points Program capacity 60 Ksteps 20 Ksteps No of Expansion Racks 3 max 1 max EM Area 32 Kwords x 3 banks E0_00000 to E2_32767 None Function blocks Max No of definitions 1024 128 Max No of instances 2048 256 Capacity in built in file memory FB program memory 1024 KB 256 KB Variable tables 128 KB 64K KB CS1H CPU H CS1G CPU H CS1 H CPU Units CS Series CS1 CPU Units CS1H CPU V1 C...

Page 24: ... they support Section 2 provides various lists of instructions that can be used for reference Section 3 individually describes the instructions in the CS CJ series instruction set Section 4 provides instruction execution times and the number of steps for each CS CJ series instruc tion ...

Page 25: ...Programmable Controllers Operation Manual W393 Provides an outlines of and describes the design installation maintenance and other basic opera tions for the CJ series PLCs SYSMAC CJ Series CJ1M CPU21 22 23 Built in I O Functions Operation Manual W395 Describes the functions of the built in I O for CJ1M CPU Units SYSMAC CS Series CS1D CPU H CPU Units CS1D CPU S CPU Units CS1D DPL1 Duplex Unit CS1D ...

Page 26: ...tionality that is the same as that of the CX Programmer is described in W446 enclosed SYSMAC CS CJ Series CS1W SCB V1 CS1W SCU V1 CJ1W SCU V1 Serial Communications Boards Units Operation Manual W336 Describes the use of Serial Communications Unit and Boards to perform serial communications with external devices including the usage of stan dard system protocols for OMRON products SYSMAC WS02 PSTC1 ...

Page 27: ...HAS DETERMINED THAT THE PRODUCTS WILL SUITABLY MEET THE REQUIREMENTS OF THEIR INTENDED USE OMRON DISCLAIMS ALL OTHER WARRANTIES EXPRESS OR IMPLIED LIMITATIONS OF LIABILITY OMRON SHALL NOT BE RESPONSIBLE FOR SPECIAL INDIRECT OR CONSEQUENTIAL DAMAGES LOSS OF PROFITS OR COMMERCIAL LOSS IN ANY WAY CONNECTED WITH THE PRODUCTS WHETHER SUCH CLAIM IS BASED ON CONTRACT WARRANTY NEGLIGENCE OR STRICT LIABILI...

Page 28: ...ly that the uses listed may be suitable for the products Outdoor use uses involving potential chemical contamination or electrical interference or conditions or uses not described in this manual Nuclear energy control systems combustion systems railroad systems aviation systems medical equipment amusement machines vehicles safety equipment and installations subject to separate industry or governme...

Page 29: ...confirm actual specifications of purchased products DIMENSIONS AND WEIGHTS Dimensions and weights are nominal and are not to be used for manufacturing purposes even when tolerances are shown PERFORMANCE DATA Performance data given in this manual is provided as a guide for the user in determining suitability and does not constitute a warranty It may represent the result of OMRON s test conditions a...

Page 30: ...xxx ...

Page 31: ...s You must read this section and understand the information contained before attempting to set up or operate a PLC system 1 Intended Audience xxxii 2 General Precautions xxxii 3 Safety Precautions xxxii 4 Operating Environment Precautions xxxiv 5 Application Precautions xxxiv 6 Conformance to EC Directives xxxviii 6 1 Applicable Directives xxxviii 6 2 Concepts xxxviii 6 3 Conformance to EC Directi...

Page 32: ...e sure to read this manual before attempting to use the Unit and keep this man ual close at hand for reference during operation WARNING It is extremely important that a PLC and all PLC Units be used for the speci fied purpose and under the specified conditions especially in applications that can directly or indirectly affect human life You must consult with your OMRON representative before applyin...

Page 33: ...s external safety measures must be provided to ensure safety in the system Caution Confirm safety before transferring data files stored in the file memory Mem ory Card or EM file memory to the I O area CIO of the CPU Unit using a peripheral tool Otherwise the devices connected to the output unit may mal function regardless of the operation mode of the CPU Unit Caution Fail safe measures must be ta...

Page 34: ...ecified in the specifications Locations subject to condensation as the result of severe changes in tem perature Locations subject to corrosive or flammable gases Locations subject to dust especially iron dust or salts Locations subject to exposure to water oil or chemicals Locations subject to shock or vibration Caution Take appropriate and sufficient countermeasures when installing systems in the...

Page 35: ...ower supply to the CPU Unit when the BKUP indicator is lit The data will not be backed up if power is turned OFF When using a CS series CS1 CPU Unit for the first time install the CS1W BAT1 Battery provided with the Unit and clear all memory areas from a Programming Device before starting to program When using the internal clock turn ON power after installing the battery and set the clock from a P...

Page 36: ... mode Make sure that the external loads will not produce dangerous conditions when this occurs When operation stops for a fatal error including those produced with the FALS 007 instruction all outputs from Output Unit will be turned OFF and only the internal output status will be maintained The contents of the DM EM and HR Areas in the CPU Unit are backed up by a Battery If the Battery voltage dro...

Page 37: ...locks and connectors com pletely Be sure that the terminal blocks Memory Units expansion cables and other items with locking devices are properly locked into place Improper locking may result in malfunction Check switch settings the contents of the DM Area and other prepara tions before starting operation Starting operation without the proper set tings or data may result in an unexpected operation...

Page 38: ...es as they apply Have qualified specialists properly dis pose of used batteries as industrial waste With a CJ series PLC the sliders on the tops and bottoms of the Power Supply Unit CPU Unit I O Units Special I O Units and CPU Bus Units must be completely locked until they click into place The Unit may not operate properly if the sliders are not locked in place With a CJ series PLC always connect ...

Page 39: ...double insulation for the DC power supplies used for the communications power supply and I O power sup plies 3 CS CJ series PLCs complying with EC Directives also conform to the Common Emission Standard EN61000 6 4 Radiated emission charac teristics 10 m regulations may vary depending on the configuration of the control panel used other devices connected to the control panel wiring and other condi...

Page 40: ...s The diode connected in parallel with the load changes energy accumulated by the coil into a current which then flows into the coil so that the current will be converted into Joule heat by the resistance of the inductive load This time lag between the moment the circuit is opened and the moment the load is reset caused by this method is longer than that caused by the CR method The reversed dielec...

Page 41: ... 1 General Instruction Characteristics 2 1 1 1 Program Capacity 2 1 1 2 Differentiated Instructions 3 1 1 3 Instruction Variations 4 1 1 4 Instruction Location and Execution Conditions 5 1 1 5 Inputting Data in Operands 5 1 1 6 Data Formats 11 1 2 Instruction Execution Checks 13 1 2 1 Errors Occurring at Instruction Execution 13 1 2 2 Fatal Errors Program Errors 13 ...

Page 42: ... Series The following tables show the maximum number of steps that can be pro grammed in each CJ series CPU Unit Model Program capacity I O points CS1H CPU67H 250K steps 5 120 CS1H CPU66H 120K steps CS1H CPU65H 60K steps CS1H CPU64H 30K steps CS1H CPU63H 20K steps CS1G CPU45H 60K steps CS1G CPU44H 30K steps 1 280 CS1G CPU43H 20K steps 960 CS1G CPU42H 10K steps Model Program capacity I O points CS1...

Page 43: ... instruction is also increased by one step for each double length operand used in it For example MOVL 498 normally requires 3 steps but 4 steps will be required if a constant is specified for the source word oper and S Refer to SECTION 4 Instruction Execution Times and Number of Steps for the number of steps required for each instruction 1 1 2 Differentiated Instructions Most instructions in CS CJ...

Page 44: ...ons used as execution conditions The bit processing such as read comparison or test is performed every cycle The execution con dition is true for one cycle when the result goes from OFF to ON Downwardly differentiated with prefix Output instructions The instruction is exe cuted just once when the execution condition goes from ON to OFF Input instructions instructions used as execution conditions T...

Page 45: ...ally three kinds of operands Source operands destination oper ands and numbers MOV Instruction mnemonic Up differentiation variation Immediate refreshing variation Instruction type Location Execution condition Format Examples Input Instructions that start logic conditions At the left bus or at the start of an instruction block Not required LD LD TST and input com parison instructions such as LD Co...

Page 46: ...FF 00000 to 32 767 the corre sponding word between D00000 and D32767 is specified MOV 0001 D00300 Note The word address bit number format is not used for Timer Counter Completion Flags or Task Flags Bit number Word address To specify a bit address specify the word address and bit address directly 0001 02 Bit 02 Word CIO 0001 02 0001 To specify a word address specify the word address directly Word ...

Page 47: ... to 65 535 the corre sponding word between E0_00000 and E0_32767 in EM bank 0 is specified When the contents of En _ is between 0000 and 7FFF 00000 to 32 767 the corre sponding word between En _00000 and En _32767 is specified MOV 0001 E1_00200 When the contents of En _ is between 8000 and FFFF 32 768 to 65 535 the corre sponding word between E 1 _00000 and E 1 _32767 in the next EM bank is specif...

Page 48: ...dds 31 to the I O memory address contained in IR1 and moves 0001 to the word at that address DR offset The signed binary content of the Data Register is added to the I O memory address contained in IR and the resulting address is used as the operand DR0 IR0 DR0 IR1 LD DR0 IR0 Adds the content of DR0 to the I O memory address contained in IR0 and loads the status of the bit at that address MOV 0001...

Page 49: ... binary 0000 0000 to FFFF FFFF MOVL 12345678 D00000 Stores 12345678 hex in D00000 and D00001 Signed dec imal 2 147 483 648 to 2 147 483 647 MOVL 12345678 D00000 Stores 12345678 decimal in D00000 and D00001 Unsigned decimal 0 to 4 294 967 295 MOVL 12345678 D00000 Stores 12345678 decimal in D00000 and D00001 All BCD data and BCD data within a range BCD 0000 0000 to 9999 9999 MOVL 12345678 D00000 Sto...

Page 50: ...ructions LD LD NOT AND AND NOT OR OR NOT LD TST 350 LD TSTN 351 AND TST 350 AND TSTN 351 OR TST 350 OR TSTN 351 Sequence output instructions OUT OUT NOT DIFU 013 DIFD 014 Sequence control instructions JMP 004 FOR 512 Timer and counter instructions TIM TIMX 550 TIMH 015 TIMHX 551 TMHH 540 TMHHX 552 TIMU 541 TIMUX 556 TMUH 544 TMUHX 557 TTIM 087 TTIMX 555 TIML 542 TIMLX 553 MTIM 533 MTIMX 554 CNT CN...

Page 51: ...memory address 000013 1 1 6 Data Formats The following table shows the data formats that can be used in CS CJ series PLCs Block programming instructions BPPS 811 BPRS 812 EXIT 806 EXIT 806 NOT IF 802 IF 802 NOT WAIT 805 WAIT 805 NOT TIMW 813 TIMWX 816 CNTW 814 CNTWX 818 TMHW 815 TMHWX 817 LEND 810 LEND 810 NOT Text string processing instructions STRING COMPARISON LD AND OR etc function codes 670 t...

Page 52: ... not supported by the Programming Consoles As such users do not need to know this format although they do need to know that the formatting takes up two words The exponent includes 8 bits from bit 23 to bit 30 and indicates n plus 127 in 2n in binary The mantissa includes 23 bits from bit 00 to bit 22 and indicates this portion below the decimal point in 1 in binary 1 negative or 0 positive Sign of...

Page 53: ...tion will stop when an Access Error occurs Illegal Instruction Error The Illegal Instruction Error Flag A29514 will be turned ON and program execution will stop when this error occurs UM User Program Memory Overflow Error The UM Overflow Error Flag A29515 will be turned ON and program execu tion will stop when this error occurs 1 2 2 Fatal Errors Program Errors Program execution will be stopped wh...

Page 54: ...ccess error 1 Reading writing to the parameter area 2 Writing to memory that is not installed 3 Reading writing to an EM bank that is EM file memory 4 Writing to a read only area 5 The contents of a DM EM word was not BCD although the PLC is set for BCD indirect addressing If the PLC Setup has been set to treat instruction errors as fatal errors program errors the Illegal Access Error Flag A29510 ...

Page 55: ...2 15 Table Data Processing Instructions 75 2 2 16 Data Control Instructions 79 2 2 17 Subroutine Instructions 83 2 2 18 Interrupt Control Instructions 84 2 2 19 High speed Counter and Pulse Output Instructions CJ1M CPU21 22 23 Only 86 2 2 20 Step Instructions 88 2 2 21 Basic I O Unit Instructions 88 2 2 22 Serial Communications Instructions 92 2 2 23 Network Instructions 93 2 2 24 File Memory Inst...

Page 56: ...emonic Instruction Mnemonic Instruction Basic instructions Input LD LOAD LD NOT LOAD NOT AND AND AND NOT AND NOT OR OR OR NOT OR NOT AND LD AND LOAD OR LD OR LOAD Output OUT OUTPUT OUT NOT OUTPUT NOT Sequence input instructions NOT NOT UP CONDITION ON DOWN CONDITION OFF Bit test LD TST LD BIT TEST LD TSTN LD BIT TEST NOT AND TST AND BIT TEST NOT AND TSTN AND BIT TEST NOT OR TST OR BIT TEST OR TSTN...

Page 57: ...nsigned LD AND OR L Symbol com parison dou ble word unsigned LD AND OR S Symbol comparison signed LD AND OR SL Symbol com parison dou ble word signed LD AND OR DT DT DT DT DT DT See note 1 Time compari son Data comparison Condition Flags CMP UNSIGNED COMPARE CMPL DOUBLE UNSIGNED COMPARE CPS SIGNED BINARY COMPARE CPSL DOUBLE SIGNED BINARY COMPARE ZCP AREARANGE COMPARE ZCPL DOUBLE AREA RANGE COMPARE...

Page 58: ...IGHT RORL DOUBLE ROTATE RIGHT RRNC ROTATE RIGHT WITH OUT CARRY RRNL DOUBLE ROTATE RIGHT WITH OUT CARRY 1 digit shift SLD ONE DIGIT SHIFT LEFT SRD ONE DIGIT SHIFT RIGHT Shift n bit data NSFL SHIFT N BIT DATA LEFT NSFR SHIFT N BIT DATA RIGHT Shift n bit NASL SHIFT N BITS LEFT NSLL DOUBLE SHIFT N BITS LEFT NASR SHIFT N BITS RIGHT NSRL DOUBLE SHIFT N BITS RIGHT Increment decrement instructions BCD B I...

Page 59: ...C SIGNED BINARY SUBTRACT WITH CARRY CL DOUBLE SIGNED BINARY WITH CARRY BCD subtract B BCD SUBTRACT WITHOUT CARRY BL DOUBLE BCD SUBTRACT WITHOUT CARRY BC BCD SUBTRACT WITH CARRY BCL DOUBLE BCD SUBTRACT WITH CARRY Binary multiply SIGNED BINARY MULTIPLY L DOUBLE SIGNED BINARY MULTIPLY U UNSIGNED BINARY MULTIPLY UL DOUBLE UNSIGNED BINARY MULTIPLY BCD multiply B BCD MULTIPLY BL DOUBLE BCD MULTIPLY Bina...

Page 60: ...Y TO BCD BDSL DOUBLE SIGNED BINARY TO BCD GRY See note 1 GRAY CODE CONVER SION Number ASCII con versions STR4 FOUR DIGIT NUMBER TO ASCII STR8 EIGHT DIGIT NUMBER TO ASCII STR16 SIXTEEN DIGIT NUM BER TO ASCII NUM4 ASCII TO FOUR DIGIT NUMBER NUM8 ASCII TO EIGHT DIGIT NUMBER NUM16 ASCII TO SIX TEEN DIGIT NUMBER Logic instructions Logical AND OR ANDW LOGICAL AND ANDL DOUBLE LOGICAL AND ORW LOGICAL OR O...

Page 61: ... FLOATING POINT TO ASCII FVAL ASCII TO FLOATING POINT Single precision floating point move See note 2 MOVF MOVE FLOAT ING POINT SINGLE Double pre cision float ing point instruc tions Floating point binary convert FIXD DOUBLE FLOATING TO 16 BIT FIXLD DOUBLE FLOATING TO 32 BIT DBL 16 BIT TO DOUBLE FLOATING DBLL 32 BIT TO DOUBLE FLOATING Floating point basic math D DOUBLE FLOATING POINT ADD D DOUBLE ...

Page 62: ... RETURN GSBS GLOBAL SUBROU TINE CALL GSBN GLOBAL SUBROU TINE ENTRY GRET GLOBAL SUBROU TINE RETURN Interrupt control instructions MSKS SET INTERRUPT MASK MSKR READ INTER RUPT MASK CLI CLEAR INTERRUPT DI DISABLE INTERRUPTS EI ENABLE INTERRUPTS High speed counter pulse out put instruc tions INI MODE CON TROL PRV HIGH SPEED COUNTER PV READ PRV2 See note 2 COUNTER FREQUENCY CONVERT CTBL COMPARI SON TAB...

Page 63: ...READ READ DATA FILE FWRIT WRITE DATA FILE TWRIT WRITE TEXT FILE Clock instructions CADD CALENDAR ADD CSUB CALENDAR SUBTRACT SEC HOURS TO SECONDS HMS SECONDS TO HOURS DATE CLOCK ADJUST MENT Debugging instructions TRSM TRACE MEMORY SAMPLING Failure diagnosis instructions FAL FAILURE ALARM FALS SEVERE FAILURE ALARM FPD FAILURE POINT DETECTION Other instructions STC SET CARRY CLC CLEAR CARRY EMBC SELE...

Page 64: ...ess ONE CYCLE AND WAIT NOT input_condition WAIT ONE CYCLE AND WAIT Timer counter BCD TIMW HUNDRED MS TIMER WAIT CNTW COUNTER WAIT TMHW TEN MS TIMER WAIT Binary TIMWX HUNDRED MS TIMER WAIT CNTWX COUNTER WAIT TMHWX TEN MS TIMER WAIT Repeat LOOP LOOP BLOCK LEND bit_address LOOP BLOCK END LEND NOT bit_address LOOP BLOCK END NOT input_ condition LEND LOOP BLOCK END Text string processing instructions M...

Page 65: ... the ON OFF status of the specified operand bit Start of logic Not required 163 AND AND AND AND AND 1 AND 1 AND 1 Takes a logical AND of the status of the specified operand bit and the current execution condition Continues on rung Required 165 AND NOT AND NOT AND NOT 2 AND NOT 2 AND NOT 1 AND NOT 3 AND NOT 3 Reverses the status of the specified operand bit and takes a logical AND with the current ...

Page 66: ...nd ON when the bit is OFF Continues on rung Not required 182 BIT TEST AND TST 350 LD TST 350 AND TST 350 and OR TST 350 are used in the pro gram like LD AND and OR the execution condition is ON when the specified bit in the specified word is ON and OFF when the bit is OFF Continues on rung Required 182 BIT TEST AND TSTN 351 LD TSTN 351 AND TSTN 351 and OR TSTN 351 are used in the program like LD N...

Page 67: ...Function Location Execution condition Page TST 350 S N S Source word N Bit number TSTN 351 S N S Source word N Bit number Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page OUTPUT OUT OUT 1 Outputs the result execution condition of the logical processing to the specified bit Output Required 185 OUTPUT NOT OUT NOT OUT NOT 1 Reverses the result execution condition of...

Page 68: ...l Operand Function Location Execution condition Page DIFD 014 B B Bit Status of B One cycle DIFD 014 turns the designated bit ON for one cycle when the execution condition goes from ON to OFF falling edge Execution condition SET B B Bit Status of B SET turns the operand bit ON when the execution condition is ON Execution condition of SET RSET B B Bit Status of B RSET turns the operand bit OFF when...

Page 69: ...n a DM or EM word Output Required 201 SINGLE BIT OUTPUT CS1 H CJ1 H CJ1M or CS1D only OUTB OUTB OUTB 1 OUTB 534 outputs the result execution condition of the logical pro cessing to the specified bit Unlike the OUT instruction OUTB 534 can be used to control a bit in a DM or EM word Output Required 204 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page RSTB 533 D N ...

Page 70: ...cycle No instructions written after END 001 will be executed Execution proceeds to the program with the next task number When the program being executed has the highest task number in the program END 001 marks the end of the overall main program Task 1 Task 2 Program A Program B To the next task number To the next task number Task n Program Z End of the main program IL 002 Interlocks all outputs b...

Page 71: ...ock is cleared even if the differentiation condition of the instruction was established Output Required 214 MULTI INTER LOCK CLEAR MILC 519 CS CJ series CPU Unit Ver 2 0 or later only Clears an interlock started by an MILH 517 or MILR 518 with the same interlock number All outputs between MILH 517 MILR 518 and the corresponding MILC 519 with the same interlock number are interlocked when the execu...

Page 72: ...dition for CJP 004 is OFF program execution jumps directly to the first JME 005 in the program with the same jump number CJPN 511 and JME 005 are used in pairs Execution condition ON Execution condition OFF Instructions executed Instructions jumped Instructions in this section are not executed and out put status is maintained The instruction execution time for these instructions is eliminated JMP0...

Page 73: ...e Symbol Operand Function Location Execution condition Page FOR 512 N N Number of loops Repeated N times The instructions between FOR 512 and NEXT 513 are repeated a specified number of times FOR 512 and NEXT 513 are used in pairs Repeated program section BREAK 514 N repetitions Condition a ON Programmed in a FOR NEXT loop to cancel the execution of the loop for a given execution condition The rem...

Page 74: ...crementing timer with units of 1 ms The setting range for the set value SV is 0 to 9 999 s for BCD and 0 to 65 535 s for binary decimal or hexadecimal Output Required 253 TIM N S N Timer number S Set value SV SV Timer input Timer PV Timer input Timer PV TIM TIMX 550 operates a decrementing timer with units of 0 1 s The setting range for the set value SV is 0 to 999 9 s for BCD and 0 to 6 553 5 s f...

Page 75: ... BCD and 0 to 0 65535 s for binary decimal or hexadecimal Note The timer s present value cannot be accessed for a HUN DREDTH MS TIMER instruction Output Required 259 TMUHX 557 BCD Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page N Timer number S Set value TIMU 541 N S ON OFF 0 ON OFF Timer Input Turns OFF before Completion Flag Turns ON SV ON OFF 0 ON OFF Timer i...

Page 76: ...et input PV maintained Timing resumes TTIM 087 TTIMX 555 operates an incrementing timer with units of 0 1 s The setting range for the set value SV is 0 to 999 9 s for BCD and 0 to 6 553 5 s for binary decimal or hexadecimal TTIMX 555 N S N Timer number S Set value Reset input Timer input TIML 542 D1 D2 S D1 Completion Flag D2 PV word S SV word SV Timer input Timer PV Completion Flag Bit 00 of D1 T...

Page 77: ...it 2 Bit 1 Bit 0 MTIM 543 MTIMX 554 operates a 0 1 s incrementing timer with 8 independent SVs and Completion Flags The setting range for the set value SV is 0 to 999 9 s for BCD and 0 to 6 553 5 s for binary decimal or hexadecimal Completion Flags D1 MTIMX 554 D1 D2 S D1 Completion Flags D2 PV word S 1st SV word CNT N S Count input Reset input N Counter number S Set value SV Count input Counter P...

Page 78: ...f 9999 Output Required 282 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page CNTR 012 N S Incre ment input Decre ment input Reset input N Counter number S Set value SV 1 SV 1 Increment input Counter PV Decrement input Counter PV Completion Flag Counter PV Completion Flag CNTR 012 CNTRX 548 operates a reversible counter CNTRX 548 N S Incre ment input Decre ment inp...

Page 79: ...ired 291 Symbol Compari son Signed LD AND OR S 302 307 312 317 322 327 S1 Comparison data 1 S2 Comparison data 2 Symbol comparison instructions signed compare two values con stants and or the contents of specified words in signed 16 bit binary 4 digit hexadecimal and create an ON execution condition when the com parison condition is true There are three types of symbol comparison instructions LD L...

Page 80: ...D AND and OR Time values year month day hour minute and second can be masked unmasked in the comparison so it is easy to create cal endar timer functions LD Not required AND OR Required 297 UNSIGNED COM PARE CMP CMP 1 020 Output Required 303 DOUBLE UNSIGNED COMPARE CMPL 060 Output Required 306 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page S1 C S2 LD LOAD AND O...

Page 81: ...uts the result to the Arithmetic Flags in the Auxiliary Area Signed binary comparison Arithmetic Flags MCMP 019 S1 S2 R S1 1st word of set 1 S2 1st word of set 2 R Result word R Compares 16 consecutive words with another 16 consecutive words and turns ON the corresponding bit in the result word where the contents of the words are not equal Comparison 0 Words are equal 1 Words aren t equal TCMP 085...

Page 82: ... 326 DOUBLE AREA RANGE COM PARE ZCPL ZCPL 116 CS1 H CJ1 H CJ1M or CS1D only Compares the 32 bit unsigned binary value in CD and CD 1 word con tents or constant to the range defined by LL and UL and outputs the results to the Arithmetic Flags in the Auxiliary Area Output Required 329 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page BCMP2 502 S T R S Source data T ...

Page 83: ...ord of data to the specified word Source word Destination word Bit status not changed MOVL 498 S D S 1st source word D 1st destination word S D S 1 D 1 Bit status not changed Transfers two words of data to the specified words MVN 022 S D S Source D Destination Transfers the complement of a word of data to the specified word Source word Bit status inverted Destination word MVNL 499 S D S 1st source...

Page 84: ...tination word Transfers the specified digit or digits Each digit is made up of 4 bits XFRB 062 C S D C Control word S 1st source word D 1st destination word Transfers the specified number of consecutive bits XFER 070 N S D N Number of words S 1st source word D 1st destination word S N 1 D N 1 to to N words Transfers the specified number of consecutive words BSET 071 S St E S Source word St Startin...

Page 85: ...ding an offset value to the base address COLL 081 Bs Of D Bs Source base address Of Offset D Destination word Bs Bs n Of Transfers the source word calculated by adding an offset value to the base address to the destination word MOVR 560 S D S Source desired word or bit D Destination Index Register Sets the internal I O memory address of the specified word bit or timer counter Completion Flag in th...

Page 86: ... St 2 St Lost Status of data input for each shift input Operates a shift register SFTR 084 C St E C Control word St Starting word E End word E E Data input St St Creates a shift register that shifts data to either the right or the left Shift direc tion Data input ASFT 017 C St E C Control word St Starting word E End word E E St St Clear Shift Shift Non zero data Zero data Shift enabled Shift direc...

Page 87: ...Wd Word Wd Wd Wd 1 Shifts the contents of Wd and Wd 1 one bit to the left ASR 026 Wd Wd Word Shifts the contents of Wd one bit to the right ASRL 571 Wd Wd Word Wd Wd 1 Shifts the contents of Wd and Wd 1 one bit to the right ROL 027 Wd Wd Word Shifts all Wd bits one bit to the left including the Carry Flag CY ROLL 572 Wd Wd Word Shifts all Wd and Wd 1 bits one bit to the left including the Carry Fl...

Page 88: ...f Wd shifts to the leftmost bit and to the Carry Flag CY RRNL 577 Wd Wd Word Wd 1 Wd Shifts all Wd and Wd 1 bits one bit to the right not including the Carry Flag CY The contents of the rightmost bit of Wd 1 is shifted to the leftmost bit of Wd and to the Carry Flag CY SLD 074 St E St Starting word E End word E S Lost t Shifts data by one digit 4 bits to the left SRD 075 St E St Starting word E En...

Page 89: ...d 16 bits of word data to the left by the specified number of bits Contents of shifted in a or 0 NSLL 582 D C D Shift word C Control word Shift n bits Lost N bits Contents of a or 0 shifted in Shifts the specified 32 bits of word data to the left by the specified number of bits NASR 581 D C D Shift word C Control word Lost N bits Contents of a or 0 shifted in Shifts the specified 16 bits of word d...

Page 90: ...Increments the 4 digit hexadecimal content of the specified word by 1 Wd Wd L 591 Wd Wd Word Wd 1 Wd Wd 1 Wd Increments the 8 digit hexadecimal content of the specified words by 1 592 Wd Wd Word Wd Wd Decrements the 4 digit hexadecimal content of the specified word by 1 L 593 Wd Wd 1st word Wd 1 Wd Wd 1 Wd Decrements the 8 digit hexadecimal content of the specified words by 1 B 594 Wd Word Wd Wd W...

Page 91: ...augend word Ad 1st addend word R 1st result word R 1 CY R Ad 1 Au Ad Adds 8 digit double word hexadecimal data and or constants Signed binary Signed binary Signed binary CY will turn ON when there is a carry Au 1 C 402 R Au Ad Au Augend word Ad Addend word R Result word CY R CY Au Ad Adds 4 digit single word hexadecimal data and or constants with the Carry Flag CY Signed binary Signed binary Signe...

Page 92: ...ord Ad Addend word R Result word CY R CY BCD BCD BCD Au Ad Adds 4 digit single word BCD data and or constants with the Carry Flag CY CY will turn ON when there is a carry BCL 407 R Au Ad Au 1st augend word Ad 1st addend word R 1st result word R 1 CY R CY BCD BCD BCD Ad 1 Au Ad CY will turn ON when there is a carry Adds 8 digit double word BCD data and or constants with the Carry Flag CY Au 1 410 R...

Page 93: ...rrow CL 413 Mi Su R Mi Minuend word Su Subtrahend word R Result word R 1 CY R CY Mi 1 Su 1 Mi Su CY will turn ON when there is a borrow Subtracts 8 digit double word hexadecimal data and or constants with the Carry Flag CY Signed binary Signed binary Signed binary B 414 R Mi Su Mi Minuend word Su Subtrahend word R Result word Mi Su Subtracts 4 digit single word BCD data and or constants CY will tu...

Page 94: ... there is a borrow 420 R Md Mr Md Multiplicand word Mr Multiplier word R Result word R 1 R Md Mr Multiplies 4 digit signed hexadecimal data and or constants Signed binary Signed binary Signed binary Md Mr Md 1st multiplicand word Mr 1st multiplier word R 1st result word L 421 R R 1 R R 3 R 2 Md 1 Mr 1 Md Mr Signed binary Signed binary Signed binary Multiplies 8 digit signed hexadecimal data and or...

Page 95: ...er word R 1st result word R 1 R R 3 R 2 BCD BCD BCD Md 1 Md Mr 1 Mr Multiplies 8 digit double word BCD data and or constants 430 R Dd Dr Dd Dividend word Dr Divisor word R Result word Dd Dr R 1 R Remainder Quotient Signed binary Signed binary Signed binary Divides 4 digit single word signed hexadecimal data and or constants L 431 R Dd Dr Dd 1st dividend word Dr 1st divisor word R 1st result word R...

Page 96: ...st result word R 1 R R 3 R 2 Dd 1 Dr 1 Remainder Divides 8 digit double word unsigned hexadecimal data and or constants Unsigned binary Unsigned binary Unsigned binary Dd Dr Quotient B 434 R Dd Dr Dd Dividend word Dr Divisor word R Result word R 1 R BCD BCD BCD Dd Dr Remainder Divides 4 digit single word BCD data and or constants Quotient BL 435 R Dd Dr Dd 1st dividend word Dr 1st divisor word R 1...

Page 97: ...IN R Converts a word of binary data to a word of BCD data BCDL 059 S R S 1st source word R 1st result word BIN BCD BIN BCD R R 1 Converts 8 digit hexadecimal 32 bit binary data to 8 digit BCD data NEG 160 S R S Source word R Result word S R Calculates the 2 s complement of a word of hexadecimal data 2 s complement Complement 1 NEGL 161 S R S 1st source word R 1st result word S 1 S R 1 R Calculates...

Page 98: ...erical value in the specified digit or byte in the source word turns ON the corresponding bit in the result word or 16 word range and turns OFF all other bits in the result word or 16 word range l 1 Convert 2 digits 4 to 16 bit conversion n 2 Start with second digit 4 to 16 bit decoding Bit m of R is turned ON 8 to 256 bit conversion l 1 Convert 2 bytes n 1 Start with first byte 8 to 256 bit decod...

Page 99: ...s that value to the specified digit or byte in the result word 16 to 4 bit conversion Finds leftmost bit Highest bit address 16 to 4 bit decoding Location of leftmost bit m is written to R n 2 Start with digit 2 256 to 8 bit conversion l 0 Convert one 16 word range Finds leftmost bit Highest bit address 256 to 8 bit decoding The location of the leftmost bit in the 16 word range m is written to R n...

Page 100: ...it number D Destination word 0 0 0 0 1 1 1 1 0 0 0 1 0 0 0 0 1 15 00 S N 1 1 0 1 0 0 1 0 0 1 1 1 0 0 0 1 S 1 0 0 0 1 1 0 1 1 0 0 1 0 0 1 1 1 S 2 0 1 1 0 0 0 0 1 1 0 0 0 1 0 1 0 S 15 1 0 0 0 0 0 1 1 0 0 0 0 0 1 1 1 S 3 0 1 1 D 1 15 00 Bit Bit Bit Bit Converts a column of bits from a 16 word range the same bit number in 16 consecutive words to the 16 bits of the destination word COLM 064 S D N S Sou...

Page 101: ...ord S Source word D Destination word Signed BCD Converts one word of signed BCD data to one word of signed binary data Signed BCD format specified in C Signed binary BISL 472 C S D C Control word S 1st source word D 1st destination word Signed BCD Signed BCD Signed binary Signed binary Signed BCD format specified in C Converts double signed BCD data to double signed binary data BCDS 471 C S D C Co...

Page 102: ...t Required 539 ASCII TO FOUR DIGIT NUMBER NUM4 NUM4 604 CS CJ series CPU Units with unit version 4 0 or later only Converts 4 characters of ASCII data to a 4 digit hexadecimal number Output Required 541 ASCII TO EIGHT DIGIT NUMBER NUM8 NUM8 605 CS CJ series CPU Units with unit version 4 0 or later only Converts 8 characters of ASCII data to an 8 digit hexadecimal number Output Required 544 ASCII T...

Page 103: ...2 R I1 Input 1 I2 Input 2 R Result word Takes the logical AND of corresponding bits in double words of word data and or constants I1 I1 1 1 1 0 0 I2 I2 1 1 0 1 0 R R 1 1 0 0 0 I1 I1 1 I2 I2 1 R R 1 I1 Input 1 I2 Input 2 R Result word I1 I2 R ORW 035 I1 1 1 0 0 I2 1 0 1 0 R 1 1 1 0 I1 I2 R Takes the logical OR of corresponding bits in single words of word data and or constants I1 I2 R ORWL 611 I1 I...

Page 104: ...es the logical exclusive OR of corresponding bits in double words of word data and or constants I1 I2 R XNRW 037 I1 Input 1 I2 Input 2 R Result word I1 I2 I1 I2 R I1 1 1 0 0 I2 1 0 1 0 R 1 0 0 1 Takes the logical exclusive NOR of corresponding single words of word data and or constants XNRL 613 I1 I2 R I1 Input 1 I2 Input 2 R 1st result word I1 I1 1 I2 I2 1 I1 I1 1 I2 I2 1 R R 1 I1 I1 1 1 1 0 0 I2...

Page 105: ... bit binary content of the specified words and outputs the integer portion of the result to the specified result word Binary data 32 bits Binary data 16 bits S R ROOT 072 S 1st source word R Result word R S 1 S BCD data 8 digits BCD data 4 digits Computes the square root of an 8 digit BCD number and outputs the integer portion of the result to the specified result word APR 069 C S R C Control word...

Page 106: ...ult in the specified result words FLT 452 S R S Source word R 1st result word R 1 R S Converts a 16 bit signed binary value to 32 bit floating point data and places the result in the specified result words Signed binary data 16 bits Floating point data 32 bits S R FLTL 453 S 1st source word R 1st result word R 1 R S S 1 Floating point data 32 bits Signed binary data 32 bits Converts a 32 bit signe...

Page 107: ...1 R Dd Dd 1 Dr Dr 1 Result floating point data 32 bits Divisor floating point data 32 bits Dividend floating point data 32 bits Divides one 32 bit floating point number by another and places the result in the specified result words RAD 458 S R S 1st source word R 1st result word R 1 R S S 1 Converts a 32 bit floating point number from degrees to radians and places the result in the specified resul...

Page 108: ...loating point data Result 32 bit floating point data S R TAN 462 S 1st source word R 1st result word R 1 R S S 1 TAN Result 32 bit floating point data Source 32 bit floating point data Calculates the tangent of a 32 bit floating point number in radians and places the result in the specified result words S R TANQ 477 S 1st source word R 1st result word R 1 R S S 1 TAN Result 32 bit floating point d...

Page 109: ...1st source word R 1st result word R 1 R S S 1 Source 32 bit floating point data Result 32 bit floating point data Calculates the square root of a 32 bit floating point number and places the result in the specified result words EXP 467 S R S 1st source word R 1st result word R 1 R S S 1 e Calculates the natural base e exponential of a 32 bit floating point number and places the result in the specif...

Page 110: ... required 640 ASCII TO FLOAT ING POINT CS1 H CJ1 H CJ1M or CS1D only FVAL FVAL 449 Converts the specified text string ASCII representation of single pre cision floating point data decimal point or exponential format to 32 bit single precision floating point data and outputs the result to the desti nation words Output required 645 MOVE FLOAT ING POINT SINGLE CJ1 H R only MOVF MOVF 469 Transfers the...

Page 111: ... Output Required 658 16 BIT BINARY TO DOUBLE FLOATING DBL DBL 843 Converts the specified 16 bit signed binary data to double precision float ing point data 64 bits and outputs the result to the destination words Output Required 660 32 BIT BINARY TO DOUBLE FLOATING DBLL DBLL 844 Converts the specified 32 bit signed binary data to double precision float ing point data 64 bits and outputs the result ...

Page 112: ...d outputs the result to the result words Output Required 671 DOUBLE RADI ANS TO DEGREES DEGD DEGD 850 Converts the specified double precision floating point data 64 bits from radians to degrees and outputs the result to the result words Output Required 673 DOUBLE SINE SIND SIND 851 Calculates the sine of the angle radians in the specified double precision floating point data 64 bits and outputs th...

Page 113: ...ns the angle that produces a given cosine value between 1 and 1 Output Required 682 DOUBLE ARC TANGENT ATAND ATAND 856 Calculates the angle in radians from the tangent value in the specified double precision floating point data 64 bits and outputs the result to the result words The arc tangent function is the inverse of the tangent func tion it returns the angle that produces a given tangent value...

Page 114: ...L COMPARI SON LD AND or OR D 335 D 336 D 337 D 338 D 339 or D 340 Compares the specified double precision data 64 bits and creates an ON execution condition if the comparison result is true Three kinds of symbols can be used with the floating point symbol com parison instructions LD Load AND and OR LD Not required AND or OR Required 694 Instruction Mnemonic Code Symbol Operand Function Location Ex...

Page 115: ...ck PUSH 632 TB S TB 1st stack address S Source word TB TB 1 TB 2 TB 3 TB TB 1 TB 2 TB 3 PUSH 632 Writes one word of data to the specified stack Internal I O memory address Internal I O memory address LIFO 634 TB D TB 1st stack address D Destination word TB TB 1 TB 2 TB 3 TB TB 1 TB 2 TB 3 1 m 1 m 1 m Last in first out The pointer is decremented Stack pointer Newest data Internal I O memory address...

Page 116: ...number D Destination Index Register R Writes the location of the specified record the internal I O memory address of the beginning of the record in the specified Index Register Internal I O memory address SETR 635 writes the internal I O memory address m of the first word of record R to Index Register D Table number N Record number R GETR 636 N IR D N Table number IR Index Register D Destination w...

Page 117: ...is swapped MAX 182 C R1 D C 1st control word R1 1st word in range D Destination word R1 W 1 R1 Finds the maximum value in the range Internal I O memory address C words Max value MIN 183 C R1 D C 1st control word R1 1st word in range D Destination word R1 W 1 R1 Finds the minimum value in the range Internal I O memory address C words Min value SUM 184 C R1 D C 1st control word R1 1st word in range ...

Page 118: ... SINS SINS 641 Inserts the source data at the specified location in the stack and shifts the rest of the data in the stack downward The offset value indicates the loca tion of the insertion point how many data elements before the current pointer position Output required 750 STACK DATA DELETE CS1 H CJ1 H CJ1M or CS1D only SDEL SDEL 642 Deletes the data element at the specified location in the stack...

Page 119: ...ND BAND 681 Output Required 781 PID 190 S C D S Input word C 1st parameter word D Output word PV input S PID control Manipulated variable D Parameters C to C 8 Executes PID control according to the specified parameters PIDAT 191 S C D S Input word C 1st parameter word D Output word LMT 680 S C D S Input word C 1st limit word D Output word Upper limit C 1 Lower limit C Controls output data accordin...

Page 120: ... Code Symbol Operand Function Location Execution condition Page ZONE 682 S C D S Input word C 1st limit word D Output word Output Input Adds the specified bias to input data and outputs the result Positive bias C 1 Negative bias C TPO 685 S C R S Input word C 1st parameter word R Pulse Output Bit SCL 194 S P1 R S Source word P1 1st parameter word R Result word BCD BIN BCD BIN P P1 1 P1 2 P1 3 R un...

Page 121: ...eter word R Result word Y X Y X Y X Y X P1 P1 1 P1 2 R signed BCD Offset Negative Offset Offset R signed BCD Offset of 0000 Offset Signed BCD R signed BCD Positive Offset S signed binary S signed binary S signed binary Offset 0000 hex Signed binary Signed binary Converts signed binary data into signed BCD data according to the specified linear function An offset can be input in defining the linear...

Page 122: ...et of 0000 Converts signed BCD data into signed binary data according to the specified linear function An offset can be input in defining the linear function Positive Offset R signed binary R signed binary Max conversion Max conver sion Min conver sion Min conversion R signed binary Max conver sion Min conversion AVG 195 S N R S Source word N Number of cycles R Result word R N 1 R R 1 R 2 R 3 Aver...

Page 123: ...ne number and executes that program Execution condition ON Main program Program end Subroutine program SBN 092 to RET 093 MCRO 099 N S D N Subroutine number S 1st input parameter word D 1st output parameter word MCRO 099 MCRO 099 Calls the subroutine with the specified subroutine number and executes that program using the input parameters in S to S 3 and the output parameters in D to D 3 Execution...

Page 124: ... MSKS 690 Output Required 839 READ INTERRUPT MASK Not supported by CS1D CPU Units for Duplex CPU Systems MSKR MSKR 692 Reads the current interrupt processing settings that were set with MSKS 690 Output Required 846 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page GSBS 750 N N Subroutine number GSBN 751 N N Subroutine number GRET 752 MSKS 690 N C N Interrupt ident...

Page 125: ...o 3 N 4 to 5 Clears or retains recorded interrupt inputs for I O interrupts or sets the time to the first scheduled interrupt for scheduled interrupts Interrupt input n Internal status Interrupt input n Internal status Execution of scheduled interrupt task Time to first scheduled interrupt DI 693 Disables execution of all interrupt tasks except the power OFF interrupt Disables execution of all int...

Page 126: ... FRE QUENCY CON VERT PRV2 883 CJ1M CPU Unit Ver 2 0 or later only C1 Control data C2 Pulses revo lution D 1st destination word Reads the pulse frequency input from a high speed counter and either converts the frequency to a rotational speed number of revolutions or converts the counter PV to the total number of revolutions The result is output to the destination words as 8 digit hexadecimal Pulses...

Page 127: ...CONTROL ACC ACC 888 P Port specifier M Output mode S 1st word of set tings table ACC 888 is used to set the pulse frequency and acceleration deceler ation rates and to perform pulse output with acceleration deceleration with the same acceleration deceleration rate Both positioning and speed control are possible Output Required 896 ORIGIN SEARCH ORG ORG 889 P Port specifier C Control data ORG 889 i...

Page 128: ...on Output Required 909 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page I O REFRESH IORF IORF 097 Output Required 926 SPECIAL I O UNIT I O REFRESH CJ1 H R only FIORF FIORF 225 Performs I O refreshing immediately for the specified Special I O Unit s allocated CIO Area and DM Area words t with the specified unit num ber Output Required 929 CPU BUS UNIT I O REFRESH ...

Page 129: ...n Input Unit and stores up to 8 digits of BCD data in the specified words Output Required 945 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page SDEC 078 S Di D S Source word Di Digit designator D 1st destination word Number of digits Rightmost 8 bits 0 Di 7 segment First digit to convert Converts the hexadecimal contents of the designated digit s into 8 bit 7 segm...

Page 130: ...nts and 8 output points and stores that 64 bit data in the 4 destination words Output Required 953 7 SEGMENT DIS PLAY OUTPUT 7SEG 214 CS CJ series CPU Unit Ver 2 0 or later only Converts the source data either 4 digit or 8 digit BCD to 7 segment display data and outputs that data to the specified output word Output Required 957 Instruction Mnemonic Code Symbol Operand Function Location Execution c...

Page 131: ...ruction Mnemonic Code Symbol Operand Function Location Execution condition Page IORD 222 C S D C Control data S Transfer source and number of words D Transfer destination and number of words S S 1 Reads the contents of the memory area for the Special I O Unit or CPU Bus Unit see note Unit number of Special I O Unit Desig nated number of words read IOWR 223 C S D C Control data S Transfer source an...

Page 132: ...TXDU TXDU 256 Outputs the specified number of bytes of data from the serial port of a Serial Communications Unit version 1 2 or later The data is output in no protocol mode with the start code and end code if any specified in the allocated DM Setup Area Output Required 1005 PMCR 260 C1 C2 S R C1 Control word 1 C2 Control word 2 S 1st send word R 1st receive word R S to to CPU Unit Calls and execut...

Page 133: ...peration Output Required 1021 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page NETWORK SEND SEND SEND 090 Output Required 1044 NETWORK RECEIVE RECV RECV 098 Output Required 1050 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page RXDU 255 D C N D 1st destination word C 1st control word N Number of bytes to store 0000 to 0256 BCD ST...

Page 134: ...es status information with an explicit message Set Attribute Single Service Code 0E hex Output Required 1081 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page CMND 490 S D C S 1st command word D 1st response word C 1st control word D 15 0 15 0 S 2 m D 1 2 n S 1 Destination node Local node Command Response Sends FINS commands and receives the response Com mand data...

Page 135: ...series CPU Unit Ver 2 0 or later only Writes data from the local CPU Unit to a remote CPU Unit in the net work The remote CPU Unit must support explicit messages Output Required 1091 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page ECHRD 723 S D C S D C 1st source word in remote CPU Unit 1st destination word in local CPU Unit 1st control word ECHWR 724 S D C S D ...

Page 136: ...t destination word CPU Unit CPU Unit Memory Card or EM file memory Specified by the 4th digit of C Number of words File specified in S2 Memory Card or EM file memory Specified by the 4th digit of C Number of words written to D and D 1 Number of words specified in S1 and S1 1 File specified in S2 Starting read ad dress specified in S1 2 and S1 3 Reads the specified data or amount of data from the s...

Page 137: ... memory Specified by the 4th digit of C Starting address specified in S Number of words specified in D1 and D1 1 Beginning of file File speci fied in D2 New file created Memory Card or EM file memory Specified by the 4th digit of C Memory Card or EM file memory Specified by the 4th digit of C Existing data End of file Number of words specified in D1 and D1 1 Starting address specified in S Startin...

Page 138: ...ALENDAR ADD CADD CADD 730 Output Required 1122 CALENDAR SUBTRACT CSUB CSUB 731 Output Required 1126 MSG 046 N M N Message number M 1st message word CADD 730 C T R C 1st calendar word T 1st time word R 1st result word C 1 C C 2 T 1 T R 1 R R 2 Minutes Seconds Minutes Seconds Day Hour Year Month Minutes Seconds Day Hour Year Month Hours Adds time to the calendar data in the specified words CSUB 731 ...

Page 139: ...he program any number of times Output Not required 1136 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page SEC 065 S D S 1st source word D 1st destination word Minutes Seconds Hours Seconds Converts time data in hours minutes seconds format to an equivalent time in seconds only HMS 066 S D S 1st source word D 1st destination word Minutes Seconds Hours Seconds Conve...

Page 140: ...e to gener ate FALS number ERR Indicator lit Generates user defined fatal errors Fatal errors stop PC operation Also generates fatal errors with the system Execution of FALS 007 generates a fatal error with FALS number N FALS Error Flag ON Error code written to A400 Error code and time date written to Error Log Area Message displayed on Programming Console FPD 269 C T R C Control word T Monitoring...

Page 141: ...of the condition flags Output Required 1171 LOAD CONDI TION FLAGS CS1 H CJ1 H CJ1M or CS1D only CCL CCL 283 Reads the status of the condition flags that was saved Output Required 1173 CONVERT ADDRESS FROM CV CS1 H CJ1 H CJ1M or CS1D only FRMCV FRMCV 284 Converts a CV series PLC memory address to its equivalent CS CJ series PLC memory address Output Required 1174 CONVERT ADDRESS TO CV CS1 H CJ1 H C...

Page 142: ... Code Symbol Operand Function Location Execution condition Page BLOCK PROGRAM BEGIN BPRG 096 Output Required 1191 BLOCK PROGRAM END BEND 801 Define a block programming area For every BPRG 096 there must be a corresponding BEND 801 Block program Required 1191 BLOCK PROGRAM PAUSE BPPS 811 Block program Required 1193 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page ...

Page 143: ...mbol Operand Function Location Execution condition Page N BPRS 812 N Block program number to to to Block program n This block program will now be executed as long as bit a is ON BPRS 812 executed for block program n Pause and restart the specified block program from another block program Block ended B executed A executed A executed Execution condition Execution condition OFF Execution condition ON...

Page 144: ... be executed Block program Required 1196 CONDITIONAL BLOCK BRANCHING END IEND 804 If the operand bit is OFF only the instructions after IEND 804 will be executed Block program Required 1196 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page If the execution condition is ON the instructions between IF 802 and ELSE 803 will be executed and if the execution condition ...

Page 145: ...tion for WAIT 805 or WAIT 805 NOT When the execution condi tion goes ON OFF for WAIT 805 NOT the instruction from WAIT 805 or WAIT 805 NOT to the end of the program will be exe cuted Block program Required 1202 HUNDRED MS TIMER WAIT TIMW 813 BCD TIMWX 816 Binary CS1 H CJ1 H CJ1M or CS1D only TIMW 813 N SV N Timer number SV Set value Block program Required 1206 TIMWX 816 N SV N Timer number SV Set ...

Page 146: ...unction Location Execution condition Page C Time elapsed Delays execution of the rest of the block program until the specified count has been achieved Execution will be continued from the next instruction after CNTW 814 CNTWX 818 when the counter counts out SV 0 to 9 999 times for BCD and 0 to 65 535 times for binary C executed C executed C executed B executed SV preset A executed C BEND Time elap...

Page 147: ... LOOP 809 until the operand bit for LEND 810 or LEND 810 NOT turns ON or OFF respectively or until the execution condition for LEND 810 turns ON Block program Required 1215 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page Loop repeated Execution condition LOOP 809 designates the beginning of the loop program Execution condition ON Execution condition OFF Executio...

Page 148: ...xt string 656 S1 S2 D S1 Text string 1 S2 Text string 2 D First destination word Links one text string to another text string LEFT 652 S1 S2 D S1 Text string first word S2 Number of characters D First destination word Fetches a designated number of characters from the left beginning of a text string RGHT 653 S1 S2 D S1 Text string first word S2 Number of characters D First destination word 00 Read...

Page 149: ...ignated text string from within a text string Found data LEN 650 S D S Text string first word D 1st destination word 1 3 5 2 4 Calculates the length of a text string RPLC 654 S1 S2 S3 S4 D S1 Text string first word S2 Replacement text string first word S3 Number of characters S4 Beginning position D First destination word Replaces a text string with a designated text string from a designated posit...

Page 150: ...red AND OR Required 1250 Instruction Mnemonic Code Symbol Operand Function Location Execution condition Page XCHG 665 Ex1 Ex2 Ex1 1st exchange word 1 Ex2 1st exchange word 2 Ex1 Ex1 Ex2 Ex2 Replaces a designated text string with another designated text string CLR 666 S S Text string first word S S A B C D NUL NUL Clears an entire text string with NUL 00 hex INS 657 S1 S2 S3 D S1 Base text string f...

Page 151: ...er than the local task s task number m n The specified task s task number is lower than the local task s task number m n Task m Task n Task m Task n Becomes execut able in that cycle Be comes execut able in the next cycle TKOF 821 N N Task number Puts the specified task into standby status The specified task s task num ber is higher than the local task s task number m n The specified task s task n...

Page 152: ...e words DISTC 566 S Bs Of S Source word Bs Destination base address Of Offset s S B Bs n Of Transfers the source word to a destination word calculated by adding an offset value to the base address Can also write to a stack Stack Push Operation COLLC 567 Bs Of D Bs Source base address Of Offset D Destination word Bs Bs n Of Transfers the source word calculated by adding an offset value to the base ...

Page 153: ...on condition Page GET VARIABLE ID GETID GETID 286 Outputs the FINS command variable type data area code and word address for the specified variable or address This instruction is gener ally used to get the assigned address of a variable in a function block Output Required 1277 GETID 286 S D1 D2 S Variable or address D1 ID code D2 Destination word ...

Page 154: ...30 636 AND L AND DOUBLE NOT EQUAL 306 291 AND S AND SIGNED NOT EQUAL 307 291 AND SL AND DOUBLE SIGNED NOT EQUAL 308 291 AND D AND DOUBLE FLOAT ING LESS THAN 337 694 AND DT AND TIME LESS THAN 343 297 AND F AND FLOATING LESS THAN 331 636 AND L AND DOUBLE LESS THAN 311 291 AND S AND SIGNED LESS THAN 312 291 AND SL AND DOUBLE SIGNED LESS THAN 313 291 AND AND EQUAL 300 291 AND AND STRING EQUALS 670 125...

Page 155: ...IGNED LESS THAN OR EQUAL 318 291 AND AND GREATER THAN OR EQUAL 325 291 AND AND STRING GREATER THAN OR EQUALS 675 1250 AND D AND DOUBLE FLOAT ING GREATER THAN OR EQUAL 340 694 AND DT AND TIME GREATER THAN OR EQUAL 346 297 AND F AND FLOATING GREATER THAN OR EQUAL 334 636 AND L AND DOUBLE GREATER THAN OR EQUAL 326 291 AND S AND SIGNED GREATER THAN OR EQUAL 327 291 AND SL AND DOUBLE SIGNED GREATER THA...

Page 156: ... COUNTER 621 BCNTC 1275 BDSL DOUBLE SIGNED BINARY TO BCD 473 BDSL 525 BEND BLOCK PROGRAM END 801 1191 BIN BCD TO BINARY 023 BIN 483 BINL DOUBLE BCD TO DOUBLE BINARY 058 BINL 485 BINS SIGNED BCD TO BINARY 470 BINS 517 BISL DOUBLE SIGNED BCD TO BINARY 472 BISL 520 BPPS BLOCK PROGRAM PAUSE 811 1193 BPRG BLOCK PROGRAM BEGIN 096 1191 BPRS BLOCK PROGRAM RESTART 812 1193 BREAK BREAK LOOP 514 241 BSET BLO...

Page 157: ...OSQ HIGH SPEED COSINE 476 COSQ 617 CPS SIGNED BINARY COMPARE 114 CPS 309 CPSL DOUBLE SIGNED BINARY COMPARE 115 312 CSUB CALENDAR SUBTRACT 731 CSUB 1126 CTBL COMPARISON TABLE LOAD 882 CTBL 878 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page DATE CLOCK ADJUSTMENT 735 DATE 1134 DBL 16 BIT BINARY TO DOUBLE FLOATING 843 DBL 660 DBLL ...

Page 158: ...IONALBLOCK EXIT 806 1199 EXIT operand CONDITIONALBLOCK EXIT 806 1199 EXP EXPONENT 467 EXP 631 EXPD DOUBLE EXPONENT 858 EXPD 688 EXPLT EXPLICIT MESSAGE SEND 720 EXPLT 1066 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page FAL FAILURE ALARM 006 FAL 1140 FALS SEVERE FAILURE ALARM 007 1148 FCS FRAME CHECKSUM 180 FCS 738 FDIV FLOATING ...

Page 159: ... ENTRY 751 832 GSBS GLOBAL SUBROU TINE CALL 750 GSBS 824 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page HEX ASCII TO HEX 162 HEX 508 HKY HEXADECIMAL KEY INPUT 212 948 HMS SECONDS TO HOURS 066 HMS 1131 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page IEND IF EN...

Page 160: ...e Refreshing Specification Page LD LOAD LD LD LD 161 LD LOAD LESS THAN 310 291 LD LOAD STRING LESS THAN 672 1250 LD D LOAD DOUBLE FLOATING LESS THAN 337 694 LD DT LOAD TIME LESS THAN 343 297 LD F LOAD FLOATING LESS THAN 331 636 LD LOAD NOT EQUAL 305 291 LD LOAD STRING NOT EQUAL 671 1250 LD D LOAD DOUBLE FLOATING NOT EQUAL 336 694 LD DT LOAD TIME NOT EQUAL 342 297 LD F LOAD FLOATING NOT EQUAL 330 6...

Page 161: ...D NOT LD NOT 163 LD TST LOAD BIT TEST 350 182 LD TSTN LOAD BIT TEST 351 182 LD LOAD LESS THAN OR EQUAL 315 291 LD LOAD STRING LESS THAN OR EQUAL 673 1250 LD D LOAD DOUBLE FLOATING LESS THAN OR EQUAL 338 694 LD DT LOAD TIME LESS THAN OR EQUAL 344 297 LD F LOAD FLOATING LESS THAN OR EQUAL 332 636 LD L LOAD DOUBLE LESS THAN OR EQUAL 316 291 LD S LOAD SIGNED LESS THAN OR EQUAL 317 291 LD SL LOAD DOUBL...

Page 162: ...ng Specification Page MAX FIND MAXIMUM 182 MAX 727 MCMP MULTIPLE COMPARE 019 MCMP 315 MCRO MACRO 099 MCRO 817 MID GET STRING MIDDLE 654 MID 1230 MILC MULTI INTERLOCK CLEAR 519 214 MILH MULTI INTERLOCK DIFFERENTIATION HOLD 517 214 MILR MULTI INTERLOCK DIFFERENTIATION RELEASE 518 214 MIN FIND MINIMUM 183 MIN 731 MLPX DATA DECODER 076 MLPX 496 MOV MOVE 021 MOV MOV 331 MOV MOVE STRING 664 MOV 1221 MOV...

Page 163: ...HIFT N BITS LEFT 582 NSLL 400 NSRL DOUBLE SHIFT N BITS RIGHT 583 NSRL 405 NUM4 ASCII TO FOUR DIGIT NUMBER 604 NUM4 534 NUM8 ASCII TO EIGHT DIGIT NUMBER 605 NUM8 537 NUM16 ASCII TO SIXTEEN DIGIT NUMBER 606 NUM16 539 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page OR OR OR OR OR 169 OR OR LESS THAN 310 291 OR OR STRING LESS THAN 6...

Page 164: ...THAN 345 297 OR F OR FLOATING GREATER THAN 333 636 OR L OR DOUBLE GREATER THAN 321 291 OR S OR SIGNED GREATER THAN 322 291 OR SL OR DOUBLE SIGNED GREATER THAN 323 291 OR LD OR LOAD 174 OR NOT OR NOT OR NOT 171 OR TST OR BIT TEST 350 182 OR TSTN OR BIT TEST 351 182 OR OR LESS THAN OR EQUAL 315 291 OR OR STRING LESS THAN OR EQUALS 673 1250 OR D OR DOUBLE FLOAT ING LESS THAN OR EQUAL 338 694 OR DT OR...

Page 165: ...PID CONTROL 190 757 PIDAT PID CONTROL WITH AUTOTUNING 191 769 PMCR PROTOCOL MACRO 260 PMCR 974 PRV HIGH SPEED COUNTER PV READ 881 PRV 868 PRV2 COUNTER FRE QUENCY CONVERT 883 PRV2 874 PULS SET PULSES 886 PULS 887 PLS2 PULSE OUTPUT 887 PLS2 890 PUSH PUSH ONTO STACK 632 PUSH 706 PWM PULSE WITH VARI ABLE DUTY FACTOR 891 PWM 906 PWR EXPONENTIAL POWER 840 PWR 635 PWRD DOUBLE EXPONEN TIAL POWER 860 PWRD ...

Page 166: ...on Immediate Refreshing Specification Page SBN SUBROUTINE ENTRY 092 821 SBS SUBROUTINE CALL 091 SBS 811 SCL SCALING 194 SCL 795 SCL2 SCALING 2 486 SCL2 800 SCL3 SCALING 3 487 SCL3 804 SDEC 7 SEGMENT DECODER 078 SDEC 974 SDEL STACK DATA DELETE 642 SDEL 753 SEC HOURS TO SECONDS 065 SEC 1129 SEND NETWORK SEND 090 SEND 1044 SET SET SET SET SET 195 SETA MULTIPLE BIT SET 530 SETA 198 SETB SINGLE BIT SET...

Page 167: ...tion Downward Differentiation Immediate Refreshing Specification Page TAN TANGENT 462 TAN 619 TAND DOUBLE TANGENT 853 TAND 678 TANQ HIGH SPEED TAN GENT 477 TANQ 621 TCMP TABLE COMPARE 085 TCMP 317 TIM HUNDRED MS TIMER 245 TIMH TEN MS TIMER 015 249 TIMHX TEN MS TIMER 551 249 TIML LONG TIMER 542 266 TIMLX LONG TIMER 553 266 TIMU TENTH MS TIMER 541 256 TIMUX TENTH MS TIMER 556 256 TIMW HUNDRED MS TIM...

Page 168: ...ification Page WAIT NOT operand ONE CYCLE AND WAIT NOT 805 1202 WAIT input condition ONE CYCLE AND WAIT 805 1202 WAIT operand ONE CYCLE AND WAIT 805 1202 WDT EXTEND MAXIMUM CYCLE TIME 094 WDT 1169 WSFT WORD SHIFT 016 WSFT 368 Mnemonic Instruction FUN code Upward Differentiation Downward Differentiation Immediate Refreshing Specification Page XCGL DOUBLE DATA EXCHANGE 562 XCGL 350 XCHG DATA EXCHANG...

Page 169: ... INCREMENT BCD 594 B 417 BL DOUBLE INCREMENT BCD 595 BL 419 L DOUBLE INCREMENT BINARY 591 L 411 B BCD ADD WITHOUT CARRY 404 B 434 BC BCD ADD WITH CARRY 406 BC 437 BCL DOUBLE BCD ADD WITH CARRY 407 BCL 439 BL DOUBLE BCD ADD WITHOUT CARRY 405 BL 435 C SIGNED BINARY ADD WITH CARRY 402 C 430 CL DOUBLE SIGNED BINARY ADD WITH CARRY 403 CL 432 D DOUBLE FLOATING POINT ADD 845 D 663 F FLOATING POINT ADD 45...

Page 170: ...D 667 F FLOATING POINT MULTIPLY 456 F 605 L DOUBLE SIGNED BINARY MULTIPLY 421 L 461 U UNSIGNED BINARY MULTIPLY 422 U 463 UL DOUBLE UNSIGNED BINARY MULTIPLY 423 UL 465 L DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY 411 L 442 SIGNED BINARY DIVIDE 430 471 B BCD DIVIDE 434 B 479 BL DOUBLE BCD DIVIDE 435 BL 481 D DOUBLE FLOATING POINT DIVIDE 848 D 669 F FLOATING POINT DIVIDE 457 F 607 L DOUBLE SIGNED BI...

Page 171: ...0 004 JMP JUMP 228 005 JME JUMP END 228 006 FAL FAILURE ALARM FAL 1140 007 FALS SEVERE FAILURE ALARM 1148 008 STEP STEP DEFINE 909 009 SNXT STEP START 909 010 SFT SHIFT REGISTER 361 011 KEEP KEEP KEEP 188 012 CNTR REVERSIBLE COUNTER 278 013 DIFU DIFFERENTIATE UP DIFU 193 014 DIFD DIFFERENTIATE DOWN DIFD 193 015 TIMH TEN MS TIMER 249 016 WSFT WORD SHIFT WSFT 368 017 ASFT ASYNCHRONOUS SHIFT REGISTER...

Page 172: ... 347 072 ROOT BCD SQUARE ROOT ROOT 567 073 XCHG DATA EXCHANGE XCHG 349 074 SLD ONE DIGIT SHIFT LEFT SLD 390 075 SRD ONE DIGIT SHIFT RIGHT SRD 392 076 MLPX DATA DECODER MLPX 496 077 DMPX DATA ENCODER DMPX 500 078 SDEC 7 SEGMENT DECODER SDEC 974 079 FDIV FLOATING POINT DIVIDE FDIV 583 080 DIST SINGLE WORD DISTRIBUTE DIST 352 081 COLL DATA COLLECT COLL 354 082 MOVB MOVE BIT MOVB 337 083 MOVD MOVE DIG...

Page 173: ... 210 DSW DIGITAL SWITCH INPUT 940 211 TKY TEN KEY INPUT TKY 945 212 HKY HEXADECIMAL KEY INPUT 948 213 MTR MATRIX INPUT 953 214 7SEG 7 SEGMENT DISPLAY OUTPUT 957 222 IORD INTELLIGENT I O READ IORD 962 223 IOWR INTELLIGENT I O WRITE IOWR 967 225 FIORF SPECIAL I O UNIT I O REFRESH FIORF 929 226 DLNK CPU BUS UNIT I O REFRESH DLNK 932 235 RXD RECEIVE RXD 993 236 TXD TRANSMIT TXD 983 255 RXDU RECEIVE VI...

Page 174: ...R DOUBLE SIGNED EQUAL 291 305 AND AND NOT EQUAL 291 305 LD LOAD NOT EQUAL 291 305 OR OR NOT EQUAL 291 306 AND L AND DOUBLE NOT EQUAL 291 306 LD L LOAD DOUBLE NOT EQUAL 291 306 OR L OR DOUBLE NOT EQUAL 291 307 AND S AND SIGNED NOT EQUAL 291 307 LD S LOAD SIGNED NOT EQUAL 291 307 OR S OR SIGNED NOT EQUAL 291 308 AND SL AND DOUBLE SIGNED NOT EQUAL 291 308 LD SL LOAD DOUBLE SIGNED NOT EQUAL 291 308 OR...

Page 175: ...L AND DOUBLE SIGNED LESS THAN OR EQUAL 291 318 LD SL LOAD DOUBLE SIGNED LESS THAN OR EQUAL 291 318 OR SL OR DOUBLE SIGNED LESS THAN OR EQUAL 291 320 AND AND GREATER THAN 291 320 LD LOAD GREATER THAN 291 320 OR OR GREATER THAN 291 321 AND L AND DOUBLE GREATER THAN 291 321 LD L LOAD DOUBLE GREATER THAN 291 321 OR L OR DOUBLE GREATER THAN 291 322 AND S AND SIGNED GREATER THAN 291 322 LD S LOAD SIGNED...

Page 176: ... 636 329 LD F LOAD FLOATING EQUAL 636 329 OR F OR FLOATING EQUAL 636 330 AND F AND FLOATING NOT EQUAL 636 330 LD F LOAD FLOATING NOT EQUAL 636 330 OR F OR FLOATING NOT EQUAL 636 331 AND F AND FLOATING LESS THAN 636 331 LD F LOAD FLOATING LESS THAN 636 331 OR F OR FLOATING LESS THAN 636 332 AND F AND FLOATING LESS THAN OR EQUAL 636 332 LD F LOAD FLOATING LESS THAN OR EQUAL 636 332 OR F OR FLOATING ...

Page 177: ...R DOUBLE FLOAT ING LESS THAN OR EQUAL 694 339 AND D AND DOUBLE FLOAT ING GREATER THAN 694 339 LD D LOAD DOUBLE FLOATING GREATER THAN 694 339 OR D OR DOUBLE FLOAT ING GREATER THAN 694 340 AND D AND DOUBLE FLOAT ING GREATER THAN OR EQUAL 694 340 LD D LOAD DOUBLE FLOATING GREATER THAN OR EQUAL 694 340 OR D OR DOUBLE FLOAT ING GREATER THAN OR EQUAL 694 341 AND DT AND TIME EQUAL 297 341 LD DT LOAD TIME...

Page 178: ...ARRY 426 401 L DOUBLE SIGNED BINARY ADD WITHOUT CARRY L 428 402 C SIGNED BINARY ADD WITH CARRY C 430 403 CL DOUBLE SIGNED BINARY ADD WITH CARRY CL 432 404 B BCD ADD WITHOUT CARRY B 437 405 BL DOUBLE BCD ADD WITHOUT CARRY BL 435 406 BC BCD ADD WITH CARRY BC 437 407 BCL DOUBLE BCD ADD WITH CARRY BCL 439 410 SIGNED BINARY SUBTRACT WITHOUT CARRY 440 411 L DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY L ...

Page 179: ...IT FIXL 596 452 FLT 16 BIT TO FLOATING FLT 597 453 FLTL 32 BIT TO FLOATING FLTL 599 454 F FLOATING POINT ADD F 601 455 F FLOATING POINT SUBTRACT F 603 456 F FLOATING POINT MULTIPLY F 605 457 F FLOATING POINT DIVIDE F 607 458 RAD DEGREES TO RADIANS RAD 633 459 DEG RADIANS TO DEGREES DEG 610 460 SIN SINE SIN 612 461 COS COSINE COS 615 462 TAN TANGENT TAN 619 463 ASIN ARC SINE ASIN 623 464 ACOS ARC C...

Page 180: ...DIFFERENTIATION HOLD 214 518 MILR MULTI INTERLOCK DIFFERENTIATION RELEASE 214 519 MILC MULTI INTERLOCK CLEAR 214 520 NOT NOT 180 521 UP CONDITION ON 181 522 DOWN CONDITION OFF 181 530 SETA MULTIPLE BIT SET SETA 198 531 RSTA MULTIPLE BIT RESET RSTA 198 532 SETB SINGLE BIT SET SETB SETB 201 533 RSTB SINGLE BIT RESET RSTB RSTB 201 534 OUTB SINGLE BIT OUTPUT OUTB OUTB 204 540 TMHH ONE MS TIMER 253 541...

Page 181: ...5 RRNC ROTATE RIGHT WITHOUT CARRY RRNC 387 576 RLNL DOUBLE ROTATE LEFT WITHOUT CARRY RLNL 385 577 RRNL DOUBLE ROTATE RIGHT WITHOUT CARRY RRNL 388 578 NSFL SHIFT N BIT DATA LEFT NSFL 393 579 NSFR SHIFT N BIT DATA RIGHT NSFR 395 580 NASL SHIFT N BITS LEFT NASL 397 581 NASR SHIFT N BITS RIGHT NASR 403 582 NSLL DOUBLE SHIFT N BITS LEFT NSLL 400 583 NSRL DOUBLE SHIFT N BITS RIGHT NSRL 405 590 INCREMENT...

Page 182: ...2 635 SETR SET RECORD LOCA TION SETR 718 636 GETR GET RECORD NUMBER GETR 720 637 SWAP SWAP BYTES SWAP 725 638 SNUM STACK SIZE READ SNUM 742 639 SREAD STACK DATA READ SREAD 744 640 SWRIT STACK DATA WRITE SWRIT 747 641 SINS STACK DATA INSERT SINS 750 642 SDEL STACK DATA DELETE SDEL 753 650 LEN STRING LENGTH LEN 1235 652 LEFT GET STRING LEFT LEFT 1226 653 RGHT GET STRING RIGHT RGHT 1228 654 MID GET S...

Page 183: ...T CONTROL LMT 779 681 BAND DEAD BAND CONTROL BAND 781 682 ZONE DEAD ZONE CONTROL ZONE 784 685 TPO TIME PROPOR TIONAL OUTPUT 787 690 MSKS SET INTERRUPT MASK MSKS 839 691 CLI CLEAR INTERRUPT CLI 851 692 MSKR READ INTERRUPT MASK MSKR 846 693 DI DISABLE INTERRUPTS DI 855 694 EI ENABLE INTERRUPTS 858 700 FREAD READ DATA FILE FREAD 1099 701 FWRIT WRITE DATA FILE FWRIT 1106 704 TWRIT WRITE TEXT TILE TWRI...

Page 184: ...T NOT 1199 809 LOOP LOOP 1215 810 LEND LOOP END 1215 810 LEND LOOP END 1215 810 LEND NOT LOOP END NOT 1215 811 BPPS BLOCK PROGRAM PAUSE 1193 812 BPRS BLOCK PROGRAM RESTART 1193 813 TIMW HUNDRED MS TIMER WAIT 1206 814 CNTW COUNTER WAIT 1209 815 TMHW TEN MS TIMER WAIT 1212 816 TIMWX HUNDRED MS TIMER WAIT 1206 817 TMHWX TEN MS TIMER WAIT 1212 818 CNTWX COUNTER WAIT 1209 820 TKON TASK ON TKON 1255 821...

Page 185: ... TAN GENT ATAND 684 857 SQRTD DOUBLE SQUARE ROOT SQRTD 686 858 EXPD DOUBLE EXPONENT EXPD 688 859 LOGD DOUBLE LOGARITHM LOGD 690 860 PWRD DOUBLE EXPONEN TIAL POWER PWRD 692 880 INI MODE CONTROL INI 864 881 PRV HIGH SPEED COUNTER PV READ PRV 868 882 CTBL COMPARISON TABLE LOAD CTBL 878 883 PRV2 COUNTER FRE QUENCY CONVERT PRV2 874 885 SPED SPEED OUTPUT SPED 882 886 PULS SET PULSES PULS 887 887 PLS2 PU...

Page 186: ...146 List of Instructions by Function Code Section 2 4 ...

Page 187: ... 188 3 4 4 DIFFERENTIATE UP DOWN DIFU 013 and DIFD 014 193 3 4 5 SET and RESET SET and RSET 195 3 4 6 MULTIPLE BIT SET RESET SETA 530 RSTA 531 198 3 4 7 SINGLE BIT SET RESET SETB 532 RSTB 533 201 3 4 8 SINGLE BIT OUTPUT OUTB 534 204 3 5 Sequence Control Instructions 206 3 5 1 END END 001 206 3 5 2 NO OPERATION NOP 000 207 3 5 3 Overview of Interlock Instructions 208 3 5 4 INTERLOCK and INTERLOCK C...

Page 188: ...E BIT TRANSFER XFRB 062 342 3 8 8 BLOCK TRANSFER XFER 070 344 3 8 9 BLOCK SET BSET 071 347 3 8 10 DATA EXCHANGE XCHG 073 349 3 8 11 DOUBLE DATA EXCHANGE XCGL 562 350 3 8 12 SINGLE WORD DISTRIBUTE DIST 080 352 3 8 13 DATA COLLECT COLL 081 354 3 8 14 MOVE TO REGISTER MOVR 560 356 3 8 15 MOVE TIMER COUNTER PV TO REGISTER MOVRW 561 358 3 9 Data Shift Instructions 360 3 9 1 SHIFT REGISTER SFT 010 361 3...

Page 189: ...11 13 BCD SUBTRACT WITHOUT CARRY B 414 451 3 11 14 DOUBLE BCD SUBTRACT WITHOUT CARRY BL 415 452 3 11 15 BCD SUBTRACT WITH CARRY BC 416 456 3 11 16 DOUBLE BCD SUBTRACT WITH CARRY BCL 417 457 3 11 17 SIGNED BINARY MULTIPLY 420 459 3 11 18 DOUBLE SIGNED BINARY MULTIPLY L 421 461 3 11 19 UNSIGNED BINARY MULTIPLY U 422 463 3 11 20 DOUBLE UNSIGNED BINARY MULTIPLY UL 423 465 3 11 21 BCD MULTIPLY B 424 46...

Page 190: ... 15 Floating point Math Instructions 589 3 15 1 FLOATING TO 16 BIT FIX 450 594 3 15 2 FLOATING TO 32 BIT FIXL 451 596 3 15 3 16 BIT TO FLOATING FLT 452 597 3 15 4 32 BIT TO FLOATING FLTL 453 599 3 15 5 FLOATING POINT ADD F 454 601 3 15 6 FLOATING POINT SUBTRACT F 455 603 3 15 7 FLOATING POINT MULTIPLY F 456 606 3 15 8 FLOATING POINT DIVIDE F 457 607 3 15 9 DEGREES TO RADIANS RAD 458 609 3 15 10 RA...

Page 191: ... OUT LIFO 634 712 3 17 5 DIMENSION RECORD TABLE DIM 631 715 3 17 6 SET RECORD LOCATION SETR 635 718 3 17 7 GET RECORD NUMBER GETR 636 720 3 17 8 DATA SEARCH SRCH 181 722 3 17 9 SWAP BYTES SWAP 637 725 3 17 10 FIND MAXIMUM MAX 182 727 3 17 11 FIND MINIMUM MIN 183 731 3 17 12 SUM SUM 184 735 3 17 13 FRAME CHECKSUM FCS 180 738 3 17 14 STACK SIZE READ SNUM 638 742 3 17 15 STACK DATA READ SREAD 639 744...

Page 192: ...NIT I O REFRESH DLNK 226 932 3 23 4 7 SEGMENT DECODER SDEC 078 937 3 23 5 DIGITAL SWITCH INPUT DSW 210 940 3 23 6 TEN KEY INPUT TKY 211 945 3 23 7 HEXADECIMAL KEY INPUT HKY 212 948 3 23 8 MATRIX INPUT MTR 213 953 3 23 9 7 SEGMENT DISPLAY OUTPUT 7SEG 214 957 3 23 10 INTELLIGENT I O READ IORD 222 962 3 23 11 INTELLIGENT I O WRITE IOWR 223 967 3 24 Serial Communications Instructions 972 3 24 1 Serial...

Page 193: ...96 BEND 801 1191 3 32 3 BLOCK PROGRAM PAUSE RESTART BPPS 811 BPRS 812 1193 3 32 4 Branching IF 802 ELSE 803 and IEND 804 1196 3 32 5 CONDITIONAL BLOCK EXIT NOT EXIT NOT 806 1199 3 32 6 ONE CYCLE AND WAIT NOT WAIT 805 WAIT 805 NOT 1202 3 32 7 HUNDRED MS TIMER WAIT TIMW 813 and TIMWX 816 1206 3 32 8 COUNTER WAIT CNTW 814 and CNTWX 818 1209 3 32 9 TEN MS TIMER WAIT TMHW 815 and TMHWX 817 1212 3 32 10...

Page 194: ...154 3 35 4 MOVE BIT MOVBC 568 1273 3 35 5 BIT COUNTER BCNTC 621 1275 3 35 6 GET VARIABLE ID GETID 286 1277 ...

Page 195: ...ed Once for Downward Differentiation The instruction is executed dur ing the next cycle only after the execution condition changes from ON to OFF Always Executed The instruction does not require an execution condition and is executed each cycle Creates ON Condition The instruction is executed each cycle to create an execution condition for the next instruction Variations Executed Each Cycle for ON...

Page 196: ...CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 Description The function of the instruction and the operands used in the instruction are described Flags The flags table indicates the status of the condit...

Page 197: ...e Operands specify ing bit strings nor mally input as hexadecimal Input as deci mal with an prefix or input as hexadeci mal with an prefix See note The Cont Key can be pressed to input hexa decimal values by default with an prefix The CHG Key can then be pressed to rotate between hexadecimal with prefix signed decimal with and unsigned decimal with prefix Operands specify ing numeric values normal...

Page 198: ...CPU Units New Instructions The following instructions have been added to the CS1 H and CJ1 H CPU Units Less Than or Equals Flag P_LE Always ON Flag P_On ON Always OFF Flag P_Off OFF Flag CX Programmer label Programming Console label Instruction group C CV Series CS CJ Series Sequence Control JMP 0 JME 0 JMP0 JME0 Comparison EQU AND Data Movement MOVQ MOV Increment Decre ment INC B INCL BL INCB INB...

Page 199: ...LE FLOATING POINT MULTIPLY D 847 DOUBLE FLOATING POINT DIVIDE D 848 DOUBLE DEGREES TO RADIANS RADD 849 DOUBLE RADIANS TO DEGREES DEGD 850 DOUBLE SINE SIND 851 DOUBLE COSINE COSD 852 DOUBLE TANGENT TAND 853 DOUBLE ARC SINE ASIND 854 DOUBLE ARC COSINE ACOSD 855 DOUBLE ARC TANGENT ATAND 856 DOUBLE SQUARE ROOT SQRTD 857 DOUBLE EXPONENT EXPD 858 DOUBLE LOGARITHM LOGD 859 DOUBLE EXPONENTIAL POWER PWRD 8...

Page 200: ...s Section 3 2 New Instructions The following instructions have been upgraded for the CS1 H and CJ1 H CPU Units Special Math Instructions ARITHMETIC PROCESS APR 069 Failure Diagnosis Instructions FAILURE ALARM FAL 006 SEVERE FAILURE ALARM FALS 007 ...

Page 201: ...ntiation LD Immediate Refreshing Specification See note LD Combined Variations Refreshes Input Bit Restarts Logic and Creates ON Once for Upward Differentiation See note LD Refreshes Input Bit Restarts Logic and Creates ON Once for Downward Differentiation See note LD Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area LD operand bit CIO Area CIO 000000 to CIO 61431...

Page 202: ...of LOAD LOAD NOT instructions minus1 If they do not match a program ming error will occur For details refer to 3 3 7 AND LOAD AND LD and 3 3 8 OR LOAD OR LD Flags There are no flags affected by this instruction Precautions Differentiate up or differentiate down can be specified for LD If differ entiate up is specified the execution condition is turned ON for one cycle only after the status of the ...

Page 203: ...tems and CS1 H CJ1 H and CJ1M CPU Units only Instruction Operand LD 000000 LD 000001 LD 000002 AND 000003 OR LD AND LD LD NOT 000004 AND 000005 OR LD OUT 000100 OR LD AND LD OR LD Bus bar Starting point of block Variations Restarts Logic and Creates ON Each Cycle Operand Bit is OFF LD NOT Restarts Logic and Creates ON Once for Upward Differentiation See note 1 LD NOT Restarts Logic and Creates ON ...

Page 204: ...ructions cannot be connected directly to the bus bar If there is no LOAD or LOAD NOT instruction a program error will occur with the program check by the Peripheral Device When logic blocks are connected by AND LOAD or OR LOAD instructions the total number of AND LOAD OR LOAD instructions must match the total num ber of LOAD LOAD NOT instructions minus1 If they do not match a program ming error wi...

Page 205: ...bol Variations Note Immediate refreshing is not supported by CS1D CPU Units for Duplex CPU Systems Applicable Program Areas Instruction Operand LD 000000 LD 000001 LD 000002 AND 000003 OR LD AND LD LD NOT 000004 AND 000005 OR LD OUT 000100 OR LD AND LD OR LD Variations Creates ON Each Cycle AND Result is ON AND Creates ON Once for Upward Differentiation AND Creates ON Once for Downward Differentia...

Page 206: ...t before the instruction is exe cuted from the Basic Input Unit but not Basic Input Units on Slave Racks or for C200H Group 2 Multi point Input Units For AND it is possible to combine immediate refreshing and up or down differ entiation or If either of these is specified the input is refreshed from the Basic Input Unit just before the instruction is executed and the execution condition is turned O...

Page 207: ...ble Program Areas Operand Specifications Instruction Operand LD 000000 AND 000001 LD 000002 AND 000003 LD 000004 AND NOT 000005 OR LD AND LD OUT 000006 Variations Creates ON Each Cycle AND NOT Result is ON AND NOT Creates ON Once for Upward Differentiation See note 1 AND NOT Creates ON Once for Downward Differentiation See note 1 AND NOT Immediate Refreshing Specification See note 2 AND NOT Combin...

Page 208: ...before the instruction is exe cuted from Basic Input Units but not for Basic Input Units on Slave Racks or for C200H Group 2 Multi point Input Units Example Holding Bit Area H00000 to H51115 Auxiliary Bit Area A00000 to A95915 Timer Area T0000 to T4095 Counter Area C0000 to C4095 Task Flag Area TK0000 to TK0031 Condition Flags ER CY N OF UF ON OFF AER Clock Pulses 0 02 s 0 1 s 0 2 s 1 s 1 min TR A...

Page 209: ...g Specification See note OR Combined Variations Refreshes Input Bit and Creates ON Once for Upward Differentiation See note OR Refreshes Input Bit and Creates ON Once for Downward Differentiation See note OR Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area OR bit operand CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H5111...

Page 210: ...condition is turned ON for one cycle only after the status of the operand bit goes from ON to OFF Immediate refreshing can be specified for OR An immediate refresh instruction updates the status of the input bit just before the instruction is exe cuted from the Basic Input Unit but not for Basic Input Units on Slave Racks or for C200H Group 2 Multi point Input Units For OR it is possible to combin...

Page 211: ...Differentiation See note 1 OR NOT Creates ON Once for Downward Differentiation See note 1 OR NOT Immediate Refreshing Specification See note 2 OR NOT Combined Variations Refreshes Input Bit and Creates ON Once for Upward Differentiation See note 3 OR NOT Refreshes Input Bit and Creates ON Once for Downward Differentiation See note 3 OR NOT Block program areas Step program areas Subroutines Interru...

Page 212: ...nstruction updates the status of the input bit just before the instruction is exe cuted from a Basic Input Unit but not Basic Input Units on Slave Racks or for C200H Group 2 Multi point Input Units Example 3 3 7 AND LOAD AND LD Purpose Takes a logical AND between logic blocks Ladder Symbol Variations Applicable Program Areas Index Registers Indirect addressing using Index Registers IR0 to IR15 204...

Page 213: ...r CIO 000002 is ON or CIO 000003 is OFF Flags There are no flags affected by this instruction Precautions Three or more logic blocks can be connected in series using this instruction to first connect two of the logic blocks and then to connect the next and subse quent ones in order It is also possible to continue placing this instruction after three or more logic blocks and connect them together i...

Page 214: ...a program error will occur during the program check by the Peripheral Device Coding Second LD Used for first bit of next block connected in series to previous block 3 3 8 OR LOAD OR LD Purpose Takes a logical OR between logic blocks Ladder Symbol Variations AND LD OUT 000500 Instruction Operand LD 000000 OR NOT 000001 LD NOT 000002 OR 000003 LD 000004 OR 000005 AND LD AND LD OUT 000500 Address Ins...

Page 215: ...uction except that the current execution condition is ORed with the last unused execution condition Flags There are no flags affected by this instruction Precautions Three or more logic blocks can be connected in parallel using this instruction to first connect two of the logic blocks and then to connect the next and subse quent ones in order It is also possible to continue placing this instructio...

Page 216: ... more pro gram using method 1 If there are nine or more with method 2 then a pro gram error will occur during the program check by the Peripheral Device Coding Second LD Used for first bit of next block connected in series to previous block Instruction Operand LD 000000 AND NOT 000001 LD NOT 000002 AND NOT 000003 OR LD LD 000004 AND 000005 OR LD OUT 000501 Instruction Operand LD 000000 AND NOT 000...

Page 217: ...s Instruction variation Mnemonic Function I O refresh Ordinary LD AND OR LD NOT AND NOT OR NOT The ON OFF status of the specified bit is taken by the CPU with cyclic refresh ing and it is reflected in the next instruc tion execution Cyclic refreshing OUT OUT NOT After the instruction is executed the ON OFF status of the specified bit is output with the next cyclic refreshing Differentiated up LD A...

Page 218: ... condi tions in a program when programming in mnemonic code They are not used when programming directly in ladder program form because the processing is automatically executed by the Peripheral Device The following diagram shows a simple application using two TR bits I O refreshing Instruction execution CPU processing Input received Input received Input received Input received Input received Input...

Page 219: ...int and that of output CIO 000202 are not necessarily the same so a TR bit must be used In this case the number of steps in the program could be reduced by using instruction block 1 in place of instruction block 2 TR0 to TR15 Considerations TR bits are used only for retaining OUT TR0 to TR15 and restoring LD TR0 to TR15 the ON OFF status of branching points in programs with many out put branches T...

Page 220: ...ion condition and another instruction to invert the execution condition Flags There are no flags affected by NOT 520 Precautions NOT 520 is an intermediate instruction i e it cannot be used as a right hand instruction Be sure to program a right hand instruction after NOT 520 Example NOT 520 reverses the execution condition in the following example The following table shows the operation of this pr...

Page 221: ... from ON to OFF The DIFU 013 and DIFD 014 instructions can also be used for the same purpose but they require work bits UP 521 and DOWN 522 simplify pro gramming by reducing the number of work bits and program addresses needed Flags There are no flags affected by UP 521 and DOWN 522 Precautions UP 521 and DOWN 522 are intermediate instructions i e they cannot be used as right hand instructions Be ...

Page 222: ...g precaution when using UP 521 in a subroutine The operation of UP 521 will not be consistent if the same subroutine is exe cuted more than once in the same cycle An subroutine will not be executed while the input condition for the subroutine is OFF Caution is thus required when using UP 521 in a function block defini tion For details refer to information on SBS 091 Examples When CIO 000000 goes f...

Page 223: ...ations Executed Each Cycle TSTN 351 Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E3...

Page 224: ...urned OFF In CS1 H CJ1 H CJ1M and CS1D CPU Units these Flags are left unchanged Precautions TST 350 and TSTN 351 are intermediate instructions i e they cannot be used as right hand instructions Be sure to program a right hand instruction after TST 350 or TSTN 351 Examples LD TST 350 and LD TSTN 351 In the following example CIO 000001 is turned ON when bit 3 of D00010 is ON In the following example...

Page 225: ...ed ON when CIO 000000 is ON or bit 3 of D00010 is OFF 3 4 Sequence Output Instructions 3 4 1 OUTPUT OUT Purpose Outputs the result execution condition of the logical processing to the speci fied bit Ladder Symbol Variations Note Immediate refreshing is not supported by CS1D CPU Units 3 5 3 3 Variations Executed Each Cycle for ON Condition OUT Executed Once for Upward Differentiation Not supported ...

Page 226: ...for the Basic Output Unit but not for Basic Output Units on Slave Racks or for C200H Group 2 Multi point Input Units at the same time as it writes the status of the execution condition power flow to the specified output bit in I O memory OUT cannot be used for addresses in the DM and EM Areas Use OUTB 534 instead Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK ...

Page 227: ...execution condition of the logical processing and out puts it to the specified bit Ladder Symbol Variations Note Immediate refreshing is not supported by CS1D CPU Units Applicable Program Areas Operand Specifications Instruction Operand LD 000000 OUT 000001 OUT NOT 000002 IR0 MOVR W0 0 IR0 Input condition When the input condition is OFF MOVR 560 is not executed but OUT is executed for the address ...

Page 228: ...e are no flags affected by this instruction Example 3 4 3 KEEP KEEP 011 Purpose Operates as a latching relay Ladder Symbol Holding Bit Area H00000 to H51115 Auxiliary Bit Area A44800 to A95915 Timer Area Counter Area TR Area TR0 to TR15 DM Area EM Area without bank EM Area with bank Indirect DM EM addresses in binary Indirect DM EM addresses in BCD Constants Data Registers Index Registers Indirect...

Page 229: ...Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note KEEP 011 Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK OK Area B CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary Bit Area A44800 to A95915 Timer Area Counter Area DM ...

Page 230: ... changes will not be reflected immediately if the bit is allocated to a Group 2 High density I O Unit High density Special I O Unit or a Unit mounted in a SYSMAC BUS Remote I O Slave Rack KEEP 011 operates like the self maintaining bit but a self maintaining bit programmed with KEEP 011 requires one less instruction Self maintaining bits programmed with KEEP 011 will maintain status even in an int...

Page 231: ...the IOM Hold Bit and setting IOM Hold Bit Hold in the PLC Setup In this case I O Area bits used in KEEP 011 will maintain status after restarting the PLC following a power interruption just like holding bits Be sure to restart the PLC after changing the PLC Setup otherwise the new settings will not be used Flags No flags are affected by KEEP 011 Precautions Never use an input bit in a normally clo...

Page 232: ...remains ON until CIO 000001 goes ON When CIO 000002 goes ON and CIO 000003 goes OFF in the following example CIO 00100 is turned ON CIO 00100 remains ON until CIO 000004 or CIO 000005 goes ON Coding Note KEEP 011 is input in different orders on in ladder and mnemonic form In lad der form input the set input KEEP 011 and then the reset input In mne monic form input the set input the reset input and...

Page 233: ...ON Condition Not supported Executed Once for Upward Differentiation DIFU 013 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note DIFU 013 Variations Executed Each Cycle for ON Condition Not supported Executed Once for Upward Differentiation DIFD 014 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note ...

Page 234: ...e an instruction for just one cycle when the execution condition goes from OFF ON or ON OFF Refer to 3 3 13 CONDITION ON OFF UP 521 and DOWN 522 for details Flags No flags are affected by DIFU 013 and DIFD 014 Precautions The operation of DIFU 013 or DIFD 014 depends on the execution condition for the instruction itself as well as the execution condition for the program sec tion when it is program...

Page 235: ...on block definition For details refer to infor mation on restrictions on using ladder programming instructions in the CX Programmer Operation Manual Function Blocks Observe the following precaution when using DIFU 013 in a subroutine The operation of DIFU 013 will not be consistent if the same subroutine is executed more than once in the same cycle An subroutine will not be executed while the inpu...

Page 236: ...ondition RSET Executed Once for Upward Differentiation RSET Executed Once for Downward Differentiation RSET Immediate Refreshing Specification See note RSET Combined Variations Immediate Refreshing Once for Upward Differentiation See note RSET Immediate Refreshing Once for Downward Differentiation See note RSET Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area B C...

Page 237: ...lave Rack The set and reset inputs for a KEEP 011 instruction must be programmed with the instruction but the SET and RSET instructions can be programmed completely independently Furthermore the same bit may be used as the operand in any number of SET or RSET instructions Flags No flags are affected by SET and RSET Precautions SET and RSET cannot be used to set and reset timers and counters When S...

Page 238: ...002 010000 CIO 010000 is turned ON when CIO 000001 goes ON it remains ON until CIO 000002 goes ON CIO 010000 is turned ON OFF when CIO 000000 goes ON OFF SETA 530 D N1 N2 RSTA 531 D N1 N2 D Beginning word N1 Beginning bit N2 Number of bits D Beginning word N1 Beginning bit N2 Number of bits Variations Executed Each Cycle for ON Condition SETA 530 Executed Once for Upward Differentiation SETA 530 E...

Page 239: ...ds max Area D N1 N2 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_327...

Page 240: ...530 RSTA 531 can be used to turn OFF bits in data areas that are normally accessed by words only such as the DM and EM areas Flags Examples SETA 530 Example When CIO 000000 is turned ON in the following example the 20 bits 0014 hexadecimal beginning with bit 5 of CIO 0100 are turned ON RSTA 531 Example When CIO 000000 is turned ON in the following example the 20 bits 0014 hexadecimal beginning wit...

Page 241: ...s Executed Each Cycle for ON Condition SETB 532 Executed Once for Upward Differentiation SETB 532 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note SETB 532 Combined Variations Executed Once and Bit Refreshed Immediately for Upward Differentiation See note SETB 532 Executed Once and Bit Refreshed Immediately for Downward Differentiation Not suppor...

Page 242: ... 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD ...

Page 243: ...ll be refreshed when the instruction is executed and reflected immediately in the output bit The changes will not be reflected immediately if the bit is allocated to a Group 2 High density I O Unit High density Special I O Unit or a Unit mounted in a SYSMAC BUS Remote I O Slave Rack Differences between SET RSET and SETB 532 RSTB 533 The SET and RSET instructions operate somewhat differently from S...

Page 244: ...PU Units only Ladder Symbols Variations Note Immediate refreshing is not supported by CS1D CPU Units Applicable Program Areas Operands D Word Address Specifies the word containing the bit to be controlled N Beginning Bit Specifies the bit to be controlled N must be 0000 to 000F 0 to 15 Operand Specifications 000000 SETB D00000 2 000001 RSTB D00000 2 Bit 02 of D00000 is turned ON when CIO 000000 is...

Page 245: ...refresh instruction updates the status of the output terminal just after the instruction is executed on an output bit allocated to a Basic Output Unit but not for C200H Group 2 Multi point Output Units or Basic Output Units on Slave Racks at Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n ...

Page 246: ...rand bit turns ON or OFF respectively when the input condition turns ON and the operand bit does not change when the input con dition turns OFF Example Note Precaution for Index Registers OUTB 534 is executed even when the input condition turns OFF Be particu larly careful when programming OUT using an indirect index register address 3 5 Sequence Control Instructions 3 5 1 END END 001 Purpose Indi...

Page 247: ...s no function No processing is performed for NOP 000 Ladder Symbol There is no ladder symbol associated with NOP 000 Variations Applicable Program Areas Description No processing is performed for NOP 000 but this instruction can be used to set aside lines in the program where instructions will be inserted later When the instructions are inserted later there will be no change in program addresses F...

Page 248: ...ed MULTI INTERLOCK DIFFERENTIATION RELEASE and MULTI INTER LOCK CLEAR MILR 518 and MILC 519 Note MILR 518 does not hold the status of the Differentiation Flag so dif ferentiated instructions that were interlocked are not executed after the interlock is cleared These instructions are supported only by CS CJ series CPU Unit Ver 2 0 or later Differences between Interlocks and Multiple Interlocks Regu...

Page 249: ...IL ILC MILH MILC and MILR MILC The interlocks may not operate properly if dif ferent interlock methods are used together For details on combining instruc tions refer to 3 5 5 MULTI INTERLOCK DIFFERENTIATION HOLD MULTI INTERLOCK DIFFERENTIATION RELEASE and MULTI INTERLOCK CLEAR MILH 517 MILR 518 and MILC 519 For example an MILH 517 instruction cannot be inserted between IL 002 and IL 003 Note The d...

Page 250: ...n OUT OUT NOT OUTB 534 and timer instructions are not executed No instructions are executed Output status in instructions Except for outputs in OUT OUT NOT OUTB 534 and timer instructions all out puts retain their previous status All outputs retain their previous status Bits in OUT OUT NOT OUTB 534 OFF All outputs retain their previous status Status of timer instructions except TTIM 087 TTIMX 555 ...

Page 251: ...UTB 534 OFF TIM TIMX 550 TIMH 015 TIMHX 551 TMHH 540 TMHHX 552 TIML 542 and TIMXL 553 Completion Flag OFF reset PV Time set value reset TIMU 541 TIMUX 556 TMUH 544 and TMUHX 557 See note 1 Cannot be refer enced Bits words specified in all other instructions See note 2 Retain previous status Item Treatment in IL 002 ILC 003 Treatment in JMP 004 JME 005 Instruction execution Instructions other than ...

Page 252: ...n for DIFU 013 DIFD 014 or a differentiated instruction are not recorded if the DIFU 013 or DIFD 014 is in an interlocked section and the execution condi tion for the IL 002 is OFF In general IL 002 and ILC 003 are used in pairs although it is possible to use more than one IL 002 with a single ILC 003 as shown in the following diagram If IL 002 and ILC 003 are not paired an error message will appe...

Page 253: ... following example all outputs between IL 002 and ILC 003 are interlocked When CIO 000000 is ON in the follow ing example the instructions between IL 002 and ILC 003 are executed nor mally CIO 000000 ON CIO 000000 OFF OFF OFF Reset Retained Retained Normal execution Outputs interlocked ...

Page 254: ...er must be between 0 and 15 Match the interlock number of the MILH 517 or MILR 518 instruction with the same number in the cor responding MILC 519 instruction The interlock numbers can be used in any order D Interlock Status Bit ON when the program section is not interlocked OFF when the program section is interlocked When the interlock is engaged the Interlock Status Bit can be force set to relea...

Page 255: ...s and words in all other instructions including TTIM 087 TTIMX 555 MTIM 543 MTIMX 554 SET RSET CNT CNTX 546 CNTR 012 CN TRX 548 SFT and KEEP 011 retain their previous status Indirect DM EM addresses in BCD Constants 0 to 15 Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 Area N D Variations Interlock...

Page 256: ...R 518 and MILC 519 combination Inter locks can be nested up to 16 levels Nesting can be used for the following kinds of applications Example 1 Interlocking the entire program with one condition and interlocking a part of the program with another condition 1 nesting level A1 and A2 are interlocked when the Emergency Stop Button is ON A2 is interlocked when Conveyor RUN is OFF MILH n d MILC n Input ...

Page 257: ... stop Partial interlock Conveyor RUN A1 Peripheral processing A2 Conveyor operation When the Emergency Stop is ON input condition OFF both A1 and A2 are interlocked When the Emergency Stop is OFF input condition ON A1 is executed normally and A2 is controlled by the Conveyor RUN switch as described below When the Conveyor RUN switch is OFF input condition OFF A2 is interlocked When the Conveyor RU...

Page 258: ...he interlock comparing the status of the exe cution condition when the interlock started to its status when the interlock was cleared MILH 0 MILC 2 MILC 1 MILC 0 MILH 1 MILH 2 Global interlock Emergency stop Partial interlock Conveyor RUN A1 Peripheral processing A2 Conveyor operation Partial interlock Arm RUN A3 Arm operation When the Emergency Stop is ON input condition OFF A1 A2 and A3 are inte...

Page 259: ...erlock is cleared DIFU 013 will be executed when the interlock is cleared Differentiated instructions operate the same in the MILH 517 interlock as they would in an IL 002 interlock Instruction Operation of Differentiated Instructions MILH 517 MULTI INTERLOCK DIFFER ENTIATION HOLD A differentiated instruction DIFU DIFD or instruction with a or prefix will be exe cuted after the interlock is cleare...

Page 260: ...the same time that the interlock is started or cleared Example When a DIFFERENTIATE UP DIFU 013 instruction is being used and the input condition is OFF when the interlock starts and ON when the interlock is cleared DIFU 013 will not be executed when the in terlock is cleared ON 000000 000001 001000 OFF OFF ON ON OFF ON OFF 1 cycle DIFU 013 is executed MILH 517 interlock Not interlocked Interlocke...

Page 261: ... be switched more efficiently by using interlocks with MILH 517 or MILR 518 Instead of switching processing with compound conditions insert an MILH 517 or MILR 518 instruction before each process and an MILC 519 instruction after each process ON 000000 000001 001000 OFF OFF ON ON OFF ON OFF DIFU 013 is not executed MILR 518 interlock Not interlocked Interlocked Not interlocked MILC n OFF MILH n 01...

Page 262: ... or MILR 518 is used instead of ILC 002 Program with MILH 517 MILC 519 Interlocks Execution condition Program section a b A1 A2 A3 OFF ON Interlocked Interlocked Not interlocked OFF ON OFF Not interlocked Interlocked Not interlocked ON ON Not interlocked Not interlocked Not interlocked a b a MILH 0 MILC 1 MILC 0 A1 A1 b MILH 1 A2 A2 a b MILH 0 010000 MILC 1 MILC 0 A1 MILH 1 010001 A2 A3 ...

Page 263: ...ned when a section of the program is interlocked by MILH 517 or MILR 518 because the interlocked instructions are executed internally Execution condition Program section a b A1 A2 A3 OFF ON Interlocked Interlocked Not interlocked Not controlled by the IL 002 ILC 003 interlock OFF ON OFF Not interlocked Interlocked ON ON Not interlocked Not interlocked a b IL ILC ILC A1 IL A2 A3 This program sectio...

Page 264: ...xceed the outer program section Execution condition Program section a b A1 A2 A3 OFF ON Interlocked Interlocked Not interlocked OFF ON OFF Not interlocked Interlocked Interlocked ON Not interlocked Not interlocked Not interlocked a b MILH 0 MILC 0 MILC 1 A1 MILH 1 A2 A3 The nested program section must not go beyond the outer program section ...

Page 265: ...will be interlocked a b MILH 0 010000 MILC 1 MILC 0 A1 MILH 1 010001 A2 A3 Other instructions can be inserted between two MILC 519 instructions In this case sections A1 and A3 operate together They are interlocked when a is OFF regardless of the ON OFF status of b a MILH 0 MILC 0 A1 ILC A2 The MILC 519 instruction is ignored When input condition a is OFF only program section A1 is interlocked If t...

Page 266: ... first MILH 517 instruction s interlock is not engaged the second MILH 517 MILR 518 will operate normally Note The MILR 518 interlocks operate in the same way if there is another MILH 517 or MILR 518 instruction with the same interlock number between an MILR 518 and MILC 519 pair If there is an MILC 519 instruction with a different interlock number between an MILH 517 MILR 518 and MILC 519 pair th...

Page 267: ...truction will be ignored and the entire program section between IL 002 and ILC 003 will be interlocked Examples When W00000 and W00001 are both ON the instructions between MILH 517 with interlock number 0 and MILC 519 with interlock number 0 are executed normally a MILH 0 MILC 0 A1 MILC 1 A2 This MILC 519 instruction is ignored When input condition a is OFF program sections A1 and A2 are both inte...

Page 268: ...e execution condition for JMP 004 is OFF program execution jumps directly to the first JME 005 in the program with the same jump number JMP 004 and JME 005 are used in pairs Ladder Symbols Variations W00000 000001 000002 000200 H0000 OFF OFF W0000 OFF MILH 0 010000 W00001 MILH 1 010001 CNT 1 0010 SET 000003 MILC 1 MILC 0 W00000 and W00001 both ON W00000 ON and W00001 OFF Executed normally Executed...

Page 269: ...005 is maintained In block programs Variations Executed Each Cycle for ON Condition JME 005 Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK Not allowed OK OK Area N JMP 004 JME 005 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter...

Page 270: ...more JME 005 instructions with the same jump num ber only the instruction with the lower address will be valid The JME 005 with the higher program address will be ignored Instructions in this section are not executed and output status is maintained The instruction execution time for these instructions is eliminated Instructions jumped Execution condition Instructions executed Item JMP 004 JME 005 ...

Page 271: ...14 and differentiated instructions is not dependent solely on the status of the execution condition when they are pro grammed between JMP 004 and JME 005 When DIFU 013 DIFD 014 or a differentiated instruction is executed in an jumped section immediately after the execution condition for the JMP 004 has gone ON the execution condi tion for the DIFU 013 DIFD 014 or differentiated instruction will be...

Page 272: ... in pairs The operation of CJPN 511 is almost identical to JMP 004 When the execu tion condition for CJP 004 is OFF program execution jumps directly to the first JME 005 in the program with the same jump number CJPN 511 and JME 005 are used in pairs Ladder Symbols Variations 1 CIO 000000 ON CIO 000000 OFF 1 Normal execution Instructions not executed Outputs re main un changed CJP 510 N CJPN 511 N ...

Page 273: ...ion JME 005 Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK Not allowed OK OK Area N CJP 510 CJPN 511 JME 005 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E000...

Page 274: ...21 CPU Units the jump number must be between the range 0 to 255 0000 to 00FF hex Precautions All of the outputs bits and words in jumped instructions retain their previous status Operating timers TIM TIMX 550 TIMH 015 TIMHX 551 TMHH 540 and TMHHX 552 continue timing be cause the PVs are updated even when the timer instruction is not being executed Instructions in this section are not executed and ...

Page 275: ...dition for the JMP0 is OFF NOP processing is exe cuted between the JMP0 and JME0 requiring execution time Therefore the cycle time will not be reduced When a CJP 510 or CJPN 511 instruction is programmed in a task there must be a JME 005 with the same jump number because jumps between tasks are not allowed An error will occur if a corresponding JME 005 instruc tion is not programmed in the same ta...

Page 276: ... There is no limit on the number of pairs that can be used in the program Ladder Symbols Variations Applicable Program Areas CIO 000000 OFF CIO 000000 ON 1 1 Normal execution Instructions not executed Outputs remain un changed JMP0 515 JME0 516 Variations Jumps when OFF Does Not Jump when ON JMP0 515 Immediate Refreshing Specification Not supported Variations Executed Each Cycle for ON Condition J...

Page 277: ... must be in the same tasks because jumps between tasks are not allowed The operation of DIFU 013 DIFD 014 and differentiated instructions is not dependent solely on the status of the execution condition when they are pro grammed between JMP0 515 and JME0 516 When DIFU 013 DIFD 014 or a differentiated instruction is executed in an jumped section immediately after the execution condition for the JMP...

Page 278: ...Operands N Number of Loops The number of loops must be 0000 to FFFF 0 to 65 535 decimal CIO 000000 ON CIO 000000 OFF Instructions processed as NOP 000 Outputs re main un changed Normal execution FOR 512 N NEXT 513 N Number of loops Variations Executed Each Cycle for ON Condition FOR 512 Executed Each Cycle for ON Condition NEXT 513 Immediate Refreshing Specification Not supported Block program are...

Page 279: ... A B B C A B B C and A B B C Area N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_...

Page 280: ...with a maximum of N repetitions Program BREAK 514 within the loop with the desired execution condition The loop will end before N repetitions if the execution condition is input 2 JME 005 JMP 004 Loop Program a loop with JME 005 before JMP 004 The instructions between JME 005 and JMP 004 will be executed repeatedly as long as the execu tion condition for JMP 004 is OFF A Cycle Time Too Long error ...

Page 281: ...in that loop Example In the following example the looped program section transfers the content of D00100 to the address indicated in D00200 and then increments the content of D00200 by 1 3 5 10 BREAK LOOP BREAK 514 Purpose Programmed in a FOR NEXT loop to cancel the execution of the loop for a given execution condition The remaining instructions in the loop are pro cessed as NOP 000 instructions L...

Page 282: ...counters Note TIMU 541 TIIMUX 556 TMUH 544 and TMUHX 557 are supported by CJ1 H R CPU Units only Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK OK N repetitions Condition a ON Processed as NOP 000 Repetitions forced to end Name Label Operation Error Flag ER OFF Equals Flag OFF Negative Flag N OFF Instruction Mnemonic Function code Page HUNDRED MS TIMER TIM TIM...

Page 283: ...the mnemonic of the equivalent instruction for BCD operation For example TIMX0 16 will be displayed as TIM0 16 The instruction however will operate using binary mode 2 The refresh method can be selected only with CX Programmer version 3 0 or later It cannot be selected with version 2 1 or early or from a Program ming Console 3 User programs that use the binary update mode cannot be read with CX Pr...

Page 284: ...aximum SV TIM 999 9 s TIMX 6 553 5 s TIMH 99 99 s TIMHX 655 35 s TMHH 9 999 s TMHHX 65 535 s TIMU 0 9999 s TIMUX 6 5535 s TMUH 0 09999 s TMUHX 0 65535 s TTIM 999 9 s TTIMX 6 553 5 s TIML 115 days TIMLX 49 710 days MTIM 999 9 s MTIMX 6 553 5 s Outputs instruc tion 1 1 1 1 1 1 1 8 Timer numbers Used Used Used Used Used Used Not used Not used CompletionFlag refreshing At execution At execution At exe...

Page 285: ...alue The set value must be between 0000 and 9999 BCD If the set value is set to 0000 the Completion Flag will be turned ON when TIM TIMX 550 is executed Operand Specifications PV refresh method Symbol Operands BCD N 0000 to 4095 decimal S 0000 to 9999 BCD Binary N 00000 to 4095 decimal S 0 to 65535 decimal 0000 to FFFF hex TIM N S N Timer number S Set value TIMX 550 N S N Timer number S Set value ...

Page 286: ...e changed to a non zero value by MOV 021 for example The following timing chart shows the behavior of the timer s PV and Comple tion Flag when the timer input is turned OFF before the timer times out EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM ...

Page 287: ...ed 2 If the IOM Hold Bit A50012 has been turned ON and the status of the IOM Hold Bit itself is protected in the PLC Setup the status of timer Completion Flags and PVs will be maintained even when the power is interrupted 3 The PV will be set to the SV when TIM TIMX 550 is executed When TIM TIMX 550 is in a program section between IL 002 and ILC 003 and the program section is interlocked the PV wi...

Page 288: ...0000 to 2047 Timers Created with Timer Numbers 2048 to 4095 Timers are reset PV SV Completion Flag OFF by power interruptions unless the IOM Hold Bit A50012 is ON and the bit is protected in the PLC Setup It is also possible use a clock pulse bit and a counter instruction to pro gram a timer that will retain its PV in the event of a power interruption as shown in the following diagram Example When...

Page 289: ... Set Value The set value must be between 0000 and 9999 in BCD mode CIO 000000 T0000 T0000 0100 or Timer input Timer PV Timer Completion Flag PV refresh method Symbol Operands BCD N 0000 to 4095 decimal S 0000 to 9999 BCD Binary N 00000 to 4095 decimal S 0 to 65535 decimal 0000 to FFFF hex TIMH 015 N S N Timer number S Set value TIMHX 551 N S N Timer number S Set value Variations Executed Each Cycl...

Page 290: ... chart shows the behavior of the timer s PV and Comple tion Flag when the timer input is turned OFF before the timer times out Area N S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area 0000 to 4095 decimal T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area wit...

Page 291: ...numbers 2048 to 4095 will be held when the timer is on standby The operation of the Flag and N Flag depends on the model of the CPU Unit Refer to Flags above for details The Completion Flags for TIMH 015 TIMHX 551 timers will be updated when the instruction is executed This operation differs from that for CV series and CVM1 PLCs Timers will be reset or paused in the following cases When a timer is...

Page 292: ...o the SV The operation of the Flag and N Flag depends or the model of CPU Unit Refer to Flags for details The timer s Completion Flag is refreshed only when TIMH 015 TIMHX 551 is executed so a delay of up to one cycle may be required for the Completion Flag to be turned ON after the timer times out If online editing is used to overwrite a timer instruction always reset the Com pletion Flag The tim...

Page 293: ... for other unit versions of the CJ1 H R CPU Units is 0 001 to 0 s Ladder Symbol Note In CJ1 H R CPU Units other than those with unit version 4 1 N can be set to between 0 and 4 095 decimal In CJ1 H R CPU Units with unit version 4 1 N can be set only to between 16 and 4095 decimal For details refer to Refresh ing of TMHH 540 and TMHHX 552 PVs and Completion Flags on page 256 Variations CIO 000000 T...

Page 294: ...ting the PV The PV will continue timing down as long as the timer Block program areas Step program areas Subroutines Interrupt tasks OK in CJ1 H R CPU Units only OK OK Not allowed Area N S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area 0000 to 0015 decimal or 0000 to 4095 See note T0000 to T4095 Counter Area C0000 to C4...

Page 295: ...a timer number from 16 to 4095 will be held if the task is on standby Timers will be reset or paused in the following cases When a timer is reset its PV is reset to the SV and its Completion Flag is turned OFF Note 1 If the IOM Hold Bit A50012 has been turned ON the status of timer Com pletion Flags and PVs will be maintained when the operating mode is changed 2 If the IOM Hold Bit A50012 has been...

Page 296: ...nstruction always reset the Com pletion Flag The timer will not operate properly unless the Completion Flag is reset Refreshing of TMHH 540 and TMHHX 552 PVs and Completion Flags A TMHH 540 TMHHX 552 instruction s PV and Completion Flag are refreshed as shown in the following tables Timer numbers 0 to 15 Cannot be used with unit version 4 1 of the CJ1 H R CPU Units but can be used with other unit ...

Page 297: ... Condition TIMU 541 TIMUX 556 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Function block definitions Block program areas Step program areas Subroutines Interrupt tasks OK Not allowed OK OK Not allowed Area N S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H00...

Page 298: ...he Completion Flag is updated only when TIMU 541 TIMUX 556 is exe cuted The Completion Flag can thus be delayed by up to one cycle time from the actual set value The timer will not operate properly when the cycle time exceeds 100 ms Timers will be reset or paused in the following cases When a timer is reset its PV is reset to the SV and its Completion Flag is turned OFF Indirect DM EM addresses in...

Page 299: ...ways reset the Com pletion Flag The timer will not operate properly unless the Completion Flag is reset A TIMU 541 TIMUX 556 instruction s Completion Flag is refreshed as shown in the following table Operation Example When timer input CIO 000000 goes from OFF to ON in this example the timer PV will begin counting down The Timer Completion Flag T0000 will be turned ON after 12 3 ms When CIO 000000 ...

Page 300: ... Condition TMUH 544 TMUHX 557 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Function block definitions Block program areas Step program areas Subroutines Interrupt tasks OK Not allowed OK OK Not allowed Area N S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H00...

Page 301: ...he Completion Flag is updated only when TIMU 541 TIMUX 556 is exe cuted The Completion Flag can thus be delayed by up to one cycle time from the actual set value The timer will not operate properly when the cycle time exceeds 100 ms Timers will be reset or paused in the following cases When a timer is reset its PV is reset to the SV and its Completion Flag is turned OFF Indirect DM EM addresses in...

Page 302: ...always reset the Com pletion Flag The timer will not operate properly unless the Completion Flag is reset A TIMU 541 TIMUX 556 instruction s Completion Flag is refreshed as shown in the following table Operation Example When timer input CIO 000000 goes from OFF to ON in this example the timer PV will begin counting down The Timer Completion Flag T0000 will be turned ON after 1 23 ms When CIO 00000...

Page 303: ...Variations Executed Each Cycle for ON Condition TTIM 087 TTIMX 555 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK Not allowed Area N S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit A...

Page 304: ...timer number but are not used simultaneously a duplication error will be generated when the program is checked but the timers will operate normally Timers which share the same timer number will not operate properly if they are used simultaneously Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants BCD 0000 to 9999 BCD cannot be used Binary 0 to...

Page 305: ...to 0000 The forced set and forced reset operations take priority over the status of the timer and reset inputs The timer s PV is refreshed only when TTIM 087 TTIMX 555 is executed so the timer will not operate properly when the cycle time exceeds 100 ms because the timer increments in 100 ms units The timer s Completion Flag is refreshed only when TTIM 087 TTIMX 555 is executed so a delay of up to...

Page 306: ... timer accuracy for CS1D CPU Units is 10 ms the cycle time Ladder Symbol BCD Binary Variations CIO 000000 T0001 CIO 000001 T0001 Timer input Timer PV Timer Completion Flag Reset input PV maintained Timing resumes or TTIM 0001 0100 000000 000001 TTIMX 0001 0100 000000 000001 ON OFF 0 ON OFF ON OFF 0100 ON OFF 0 ON OFF ON OFF 0100 TIML 542 D1 D2 S D1 Completion Flag D2 PV word S SV word TIMLX 543 D1...

Page 307: ...xadecimal for TIMLX 553 Operand Specifications Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK Not allowed 15 D1 0 Completion Flag Do not use D2 D2 1 D2 S S 1 S Area D1 D2 S CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A448 to A959 A448 to A958 A000 to A958 T...

Page 308: ...Timer area PV refreshing is not performed for TIML 542 TIMLX 553 Since the Completion Flag for TIML 542 TIMLX 553 is in a data area it can be forced set or forced reset like other bits but the PV will not change The timer s PV is refreshed only when TIML 542 TIMLX 553 is executed so the timer will not operate properly when the cycle time exceeds 100 ms because the timer increments in 100 ms units ...

Page 309: ...O 000000 is ON in the following example the timer PV in D00101 and D00100 will be set to the SV in D00101 and D00100 and the PV will begin counting down The timer Completion Flag CIO 020000 will be turned ON when the PV reaches 0000 0000 When CIO 000000 goes OFF the timer PV will be reset to the SV and the Completion Flag will be turned OFF 3 6 8 MULTI OUTPUT TIMER MTIM 543 MTIMX 554 Purpose MTIM ...

Page 310: ...SV word MTIMX 554 D1 D2 S D1 Completion Flags D2 PV word S First SV word Variations Executed Each Cycle for ON Condition MTIM 543 MTIMX 554 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK Not allowed Da...

Page 311: ... D1 D2 S CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6136 Work Area W000 to W511 W000 to W504 Holding Bit Area H000 to H511 H000 to H504 Auxiliary Bit Area A448 to A959 A000 to A952 Timer Area T0000 to T4095 T0000 to T4088 Counter Area C0000 to C4095 C0000 to C4088 DM Area D00000 to D32767 D00000 to D32760 EM Area without bank E00000 to E32767 E00000 to E32760 EM Area with bank En_00000 to En_32...

Page 312: ... bits are effective only when the execution condition for MTIM 543 MTIMX 554 is ON Flags Precautions Unlike most timers MTIM 543 MTIMX 554 does not use a timer number Timer area PV refreshing is not performed for MTIM 543 MTIMX 554 When the PV reaches 9999 the PV will be reset to 0000 and all of the Com pletion Flags will be turned OFF Reset bit Bit 08 Pause bit Bit 09 Operation OFF OFF The PV wil...

Page 313: ...IMX 554 is in a program section between IL 002 and ILC 003 and the program section is interlocked the PV will retain its previous value it will not be reset Be sure to take this fact into account when MTIM 543 MTIMX 554 is programmed between IL 002 and ILC 003 When an operating MTIM 543 MTIMX 554 timer is in a program section between JMP 004 and JME 005 and the program section is jumped the PV wil...

Page 314: ... 6 D00206 S 7 D00207 Reset bit Completion Flags Timer PV Timer SVs Incrementing Pause bit Corresponding completion flag ON when SV PV CIO 000000 CIO 010008 CIO 010009 SV 7 SV 1 SV 0 Timer input Timer SVs Reset bit PV maintained Timing resumes Completion Flags Pause bit Max PV 9999 Timer input must remain ON while the timer is timing ...

Page 315: ...alue Variations Executed Each Cycle for ON Condition CNT CNTX 546 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK OK Data Range BCD 0000 to 9999 Binary 0 to 65535 decimal 0000 to FFFF hex Area N S CIO A...

Page 316: ...Units these are turned OFF Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants BCD 0000 to 9999 BCD cannot be used Binary 0 to 65535 decimal 0000 to FFFF hex Data Registers DR0 to DR15 Index Registers Indirect address ing using Index Registers IR0...

Page 317: ...g will be turned OFF and its PV will be set to the SV Be sure to reset the counter by turning the reset input from OFF ON OFF before beginning counting with the count input as shown in the following diagram The count input will not be received if the reset input is ON The reset input will take precedence and the counter will be reset if the reset input and count input are both ON at the same time ...

Page 318: ...r The counter number must be between 0000 and 4095 decimal S Set Value First Cycle Flag A20011 CNTR 012 N S Increment input Reset input Decrement input N Counter number S Set value CNTRX 548 N S Increment input Reset input Decrement input S Set value N Counter number Variations Executed Each Cycle for ON Condition CNTR 012 CNTRX 548 Executed Once for Upward Differentiation Not supported Executed O...

Page 319: ... Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area 0000 to 4095 decimal C0000 to C4095 DM Area D00000 to D32767 EM Area with out bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E0...

Page 320: ...nputting the CNTR 012 CNTRX 548 instruction with mnemonics first enter the increment input II then the decrement input DI the reset input R and finally the CNTR 012 CNTRX 548 instruction When entering with the ladder diagrams first input the increment input II then the CNTR 012 CNTRX 548 instruction the decrement input DI and finally the reset input R Examples Basic Operation of CNTR 012 CNTRX 548...

Page 321: ...can be changed manually from the switch SV Increment input CIO 000000 Counter PV C0001 Completion Flag C0001 Decrement input CIO 000001 Reset input CIO 000002 Increment input Reset input Decrement input CNTR 0001 0003 000000 000001 000002 CNTRX 0001 0003 000000 000001 000002 or ON OFF ON OFF ON OFF ON OFF 3 0 Increment input Reset input Decrement input SV CIO 0001 Increment input Decrement input C...

Page 322: ...e timer num bers or counter numbers Operand Specifications CNR 545 N1 N2 N1 First number in range N2 Last number in range CNRX 547 N1 N2 N1 First number in range N2 Last number in range Variations Executed Each Cycle for ON Condition CNR 545 CNRX 547 Executed Once for Upward Differentiation CNR 545 CNRX 547 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification...

Page 323: ...of CNR 545 TIM HUNDRED MS TIMER TIMH 015 TEN MS TIMER TMHH 540 ONE MS TIMER TTIM 087 ACCUMULATIVE TIMER TIMW 813 HUNDRED MS TIMER WAIT TMHW 815 TEN MS TIMER WAIT CNT COUNTER CNTR 012 REVERSIBLE COUNTER CNTW 814 COUNTER WAIT The PV is set to its maximum value 9 999 BCD and the Completion Flag is turned OFF TIMU 541 TENTH MS TIMER TMUH 544 HUNDREDTH MS TIMER TIMU 541 and TMUH 544 are supported by CJ...

Page 324: ...g example the Completion Flags for timers T0002 to T0005 are turned OFF and the timers PVs are set to the maximum value 9999 for BCD and FFFF for binary When CIO 000001 is ON the Completion Flags for counters C0003 to C0007 are turned OFF and the counters PVs are set to the maximum value 9999 for BCD and FFFF for binary 3 6 12 Example Timer and Counter Applications The following examples show vari...

Page 325: ... s PV is actually the PV of a counter which is maintained through power interruptions Clock Pulse and CNT Instruction In this example a CNT instruction counts the pulses from the 1 s clock pulse to make a 700 second timer If the First Cycle Flag A20011 is ORed with the counter s reset input CIO 000001 the counter s PV will be reset to the SV 0700 when program execution begins rather than resuming ...

Page 326: ...ay and an OFF delay CIO 000500 will be turned ON 5 0 seconds after CIO 000000 goes ON and it will be turned OFF 3 0 seconds after CIO 000000 goes OFF 000000 000001 A20011 C0001 000000 LD 000000 000001 AND 1 s 000002 LD 000001 000004 CNT 0001 0700 000005 LD C0001 000006 OUT 000202 000003 OR A20011 Instruction Operands Address 1 s 1 s clock 000000 LD 000000 000001 AND 000001 000002 LD NOT 000002 000...

Page 327: ...and OFF at regular intervals while the execution condition is ON In this example CIO 000205 will be OFF for 1 0 second and then ON for 1 5 seconds as long as CIO 000000 is ON CIO 000000 CIO 000500 5 0 s 3 0 s 000000 LD 000000 000001 TIM 0001 0050 000002 LD 000500 000003 AND NOT 000000 000004 TIM 0002 0030 000005 LD T0001 000006 LD T0002 000007 KEEP 011 000500 Instruction Operands Address 000000 LD...

Page 328: ... CNTR 012 CNTRX 548 CNTW 814 and CNTWX 818 These are the timers and counters that use timer and counter numbers The timer or counter instruction will not be executed if the PLC memory address in the specified Index Register is not the address of a timer or counter PV Using Index Registers to indirectly address timers and counters can reduce the size of the program and increase flexibility For exam...

Page 329: ...y address of the Completion Flag for timer T0000 to IR1 3 MOVR 560 moves the PLC memory address of CIO 200000 into IR2 4 MOV 021 moves 100 into D00000 for indirect addressing of the timer SVs 5 The content of IR0 IR1 IR2 and D00000 are incremented by 1 each time as this loop is executed 100 times starting timers T0000 through T0099 DM address Content Function D00100 0010 SV for T0000 D00101 0100 S...

Page 330: ...tion condition D00000The DM address of the word containing the timer s SV The subroutine above is equivalent to the 400 instructions below 000000 LD NOT 200000 000001 TIM 0000 D00100 000002 LD T0000 000003 OUT 200000 000004 LD NOT 200001 000005 TIM 0001 D00101 000006 LD T0001 000007 OUT 200001 000008 LD NOT 200002 000009 TIM 0002 D00102 000010 LD T0002 000011 OUT 200002 000396 LD NOT 200602 000397...

Page 331: ...point input comparison instructions Ladder Symbol Variations Applicable Program Areas Operand Specifications for Instructions for One word Data Instruction Mnemonic Function code Page Input Comparison Instructions S L LD AND OR 300 to 328 291 Time Comparison Instructions DT DT DT DT DT DT LD AND OR 341 to 346 297 COMPARE CMP 020 303 DOUBLE COMPARE CMPL 060 306 SIGNED BINARY COMPARE CPS 114 309 DOU...

Page 332: ... FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S1 S2 Area S1 S2 CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D0000...

Page 333: ...tion of subsequent instructions Options The input comparison instructions can compare signed or unsigned data and they can compare one word or double values If no options are specified the Index Registers IR0 to IR15 for unsigned data only Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S1 S2 Input typ...

Page 334: ...tion data format Option data length Equal Not equal Less than Less than or equal Greater than Greater than or equal None Unsigned data S Signed data None One word data L Double length data Code Mnemonic Name Function 300 LD LOAD EQUAL True if C1 C2 AND AND EQUAL OR OR EQUAL 301 LD L LOAD DOUBLE EQUAL AND L AND DOUBLE EQUAL OR L OR DOUBLE EQUAL 302 LD S LOAD SIGNED EQUAL AND S AND SIGNED EQUAL OR S...

Page 335: ... SL AND DOUBLE SIGNED LESS THAN OR EQUAL OR SL OR DOUBLE SIGNED LESS THAN OR EQUAL 320 LD LOAD GREATER THAN True if C1 C2 AND AND GREATER THAN OR OR GREATER THAN 321 LD L LOAD DOUBLE GREATER THAN AND L AND DOUBLE GREATER THAN OR L OR DOUBLE GREATER THAN 322 LD S LOAD SIGNED GREATER THAN AND S AND SIGNED GREATER THAN OR S OR SIGNED GREATER THAN 323 LD SL LOAD DOUBLE SIGNED GREATER THAN AND SL AND D...

Page 336: ...s less than that of D00210 CIO 005001 is turned ON and execution proceeds to the next line If the content of D00110 is not less than that of D00210 the Name Label Operation Error Flag ER OFF or unchanged See note Greater Than Flag ON if S1 S2 with one word data ON if S1 1 S1 S2 1 S2 with double length data OFF in all other cases Greater Than or Equal Flag ON if S1 S2 with one word data ON if S1 1 ...

Page 337: ...eries CPU Unit Ver 2 0 or later Ladder Symbol Variations Applicable Program Areas 8714 S1 D00110 30 956 3A1C S2 D00210 14 876 30 956 14 876 Decimal Decimal Signed LESS THAN Comparison Will proceed to next line S1 C S2 LD S1 C S2 S1 C S2 AND OR Symbol Symbol Symbol C Control word S1 First word of present time S2 First word of comparison time C Control word S1 First word of present time S2 First wor...

Page 338: ... Time Data S1 through S1 2 contain the present time data S1 through S1 2 must be in the same data area Note When using the CPU Unit s internal clock data for the comparison set S1 to A351 to specify the CPU Unit s internal clock data A351 to A353 0 1 2 3 4 5 6 7 8 15 0 0 0 0 0 0 0 0 0 0 C Masks seconds data when ON Masks minutes data when ON Masks hours data when ON Masks day data when ON Masks mo...

Page 339: ... 00 to 59 BCD Seconds 00 to 59 BCD Area C S1 S2 CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6141 Work Area W000 to W511 W000 to W509 Holding Bit Area H000 to H511 H000 to H509 Auxiliary Bit Area A448 to A959 A000 to A957 Timer Area T0000 to T4095 T0000 to T4093 Counter Area C0000 to C4095 C0000 to C4093 DM Area D00000 to D32767 D00000 to D32765 EM Area without bank E00000 to E32767 E00000 to E32...

Page 340: ...s Time values can be masked individually and excluded from the comparison operation To mask a time value set the corresponding bit in the control word C to 1 Bits 00 to 05 of C mask the seconds minutes hours day month and year respectively Example When C 39 hex the rightmost 6 bits are 111001 year 1 month 1 day 1 hours 0 minutes 0 and seconds 1 so only the hours and minutes are com pared This mask...

Page 341: ...A35315 Year 00 to 99 BCD Code Mnemonic Name Function 341 LD DT LOAD EQUAL True if S1 S2 AND DT AND EQUAL OR DT OR EQUAL 342 LD DT LOAD NOT EQUAL True if S1 S2 AND DT AND NOT EQUAL OR DT OR NOT EQUAL 343 LD DT LOAD LESS THAN True if S1 S2 AND DT AND LESS THAN OR DT OR LESS THAN 344 LD DT LOAD LESS THAN OR EQUAL True if S1 S2 AND DT AND LESS THAN OR EQUAL OR DT OR LESS THAN OR EQUAL 345 LD DT LOAD G...

Page 342: ...cond data are compared Name Label Operation Error Flag ER ON if all 6 of the mask bits C bits 00 to 05 are ON OFF in all other cases Greater Than Flag ON if S1 S2 OFF in all other cases Greater Than or Equal Flag ON if S1 S2 OFF in all other cases Equal Flag ON if S1 S2 OFF in all other cases Not Equal Flag ON if S1 S2 OFF in all other cases Less Than Flag ON if S1 S2 OFF in all other cases Less T...

Page 343: ...supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note CMP 020 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S1 S2 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D327...

Page 344: ...t condition that controls CMP 020 as shown in the following dia gram In this case the Equals Flag and output A will be turned ON when S1 S2 Using CMP 020 Results in the Program Do not program another instruction between CMP 020 and the instruction controlled by the Arithmetic Flag because the other instruction might change the status of the Arithmetic Flag In this case the results of instruction B...

Page 345: ...are turned OFF Precautions Do not program another instruction between CMP 020 and an input condition that accesses the result of CMP 020 because the other instruction might change the status of the Arithmetic Flags CMP S1 S2 A Incorrect Use of CMP 020 Instruction B Arithmetic Flag Example Equal Flag Name CX Programmer label Programming Console label Operation Error Flag P_ER ER Unchanged See note ...

Page 346: ...d Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S1 S2 CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in ...

Page 347: ...red output or right hand instruction with a branch from the same input condition that controls CMPL 060 as shown in the following dia gram Here the Equals Flag and output A will be turned ON when S1 1 S1 S2 1 S2 Using CMPL 060 Results in the Program Do not program another instruction between CMPL 060 and the instruction controlled by the Arithmetic Flag because the other instruction might change t...

Page 348: ...o the Arithmetic Flags The results recorded in the Greater Than Equals and Less Than Flags are immediately saved to CIO 000200 Greater Than CIO 000201 Equals and CIO 000202 Less Than CMPL S1 S2 A Incorrect Use of CMPL 060 Instruction B Arithmetic Flag Example Equals Flag Name CX Programmer label Programming Console label Operation Error Flag P_ER ER Unchanged See note Greater Than Flag P_GT ON if ...

Page 349: ...xecuted Each Cycle for ON Condition CPS 114 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note CPS 114 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S1 S2 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area ...

Page 350: ...the result is reflected in the Arithmetic Flags Control the desired output or right hand instruction with a branch from the same input condition that controls CPS 114 as shown in the following dia gram In this case the Equals Flag and output A will be turned ON when S1 S2 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary D...

Page 351: ...nsity I O Units or Units mounted to Slave Racks Flags Note In CS1 H CJ1 H CJ1M and CS1D for Single CPU System CPU Units these Flags are left unchanged In CS1 and CJ1 CPU Units these Flags are turned OFF Precautions Do not program another instruction between CPS 114 and an input condition that accesses the result of CPS 114 because the other instruction might change the status of the Arithmetic Fla...

Page 352: ...Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S1 S2 CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM a...

Page 353: ...115 is executed the result is reflected in the Arithmetic Flags Control the desired output or right hand instruction with a branch from the same input condition that controls CPSL 115 as shown in the following dia gram Here the Equals Flag and output A will be turned ON when S1 1 S1 S2 1 S2 Using CPSL 115 Results in the Program Do not program another instruction between CPSL 115 and the instructio...

Page 354: ...ll be turned ON causing CIO 002000 to be turned ON If the content of D00002 and D00001 is equal to that of D00006 and D00005 the Equals Flag will be turned ON causing CIO 002001 to be turned ON If the content of D00002 and D00001 is less than that of D00006 and D00005 the Less Than Flag will be turned ON causing CIO 002002 to be turned ON CPSL S1 S2 A Incorrect Use of CPSL 115 Instruction B Arithm...

Page 355: ... bit of R contains the result of a comparison between two words in the 16 word sets Bit n of R n 00 to 15 contains the result of the comparison between words S1 n and S2 n 1 0 0 1234 5678 ABCD EF12 D0001 D0005 Flag status Comparison MCMP 019 S1 S2 R S1 First word of set 1 S2 First word of set 2 R Result word Variations Executed Each Cycle for ON Condition MCMP 019 Executed Once for Upward Differen...

Page 356: ...S2 R CIO Area CIO 0000 to CIO 6128 CIO 0000 to CIO 6143 Work Area W000 to W496 W000 to W511 Holding Bit Area H000 to H496 H000 to H511 Auxiliary Bit Area A000 to A944 A448 to A959 Timer Area T0000 to T4080 T0000 to T4095 Counter Area C0000 to C4080 C0000 to C4095 DM Area D00000 to D32752 D00000 to D32767 EM Area without bank E00000 to E32752 E00000 to E32767 EM Area with bank En_00000 to 32752 n 0...

Page 357: ...word when the contents of the words are equal Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER OFF Equals Flag ON if the result word is 0000 The two 16 word sets contain the same data OFF in all other cases S1 S2 R D00300 TCMP 085 S T R S Source data T First word of table R Result word Variations Executed Each Cycle for ON Condition TCMP 085 Executed Once for Up...

Page 358: ... W511 Holding Bit Area H000 to H511 H000 to H496 H000 to H511 Auxiliary Bit Area A000 to A959 A000 to A944 A448 to A959 Timer Area T0000 to T4095 T0000 to T4080 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4080 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32752 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32752 E00000 to E32767 EM Area with bank En_00000 to En_32...

Page 359: ... R is turned ON if they are equal or OFF if they are not equal and S is compared to the content of T 15 and bit 15 of R is turned ON if they are equal or OFF if they are not equal Flags Example When CIO 000000 is ON in the following example TCMP 085 compares the content of D00100 with the contents of words D00200 through D00215 and turns ON the corresponding bits in D00300 when the contents are eq...

Page 360: ...ations Executed Each Cycle for ON Condition BCMP 068 Executed Once for Upward Differentiation BCMP 068 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 0 14 R 1 Comparison result for S and range B B 1 Comparison result for S and range B 2 B 3 Comparison result ...

Page 361: ...R B 22 S B 23 Bit 11 of R B 24 S B 25 Bit 12 of R B 26 S B 27 Bit 13 of R B 28 S B 29 Bit 14 of R B 30 S B 31 Bit 15 of R For example bit 00 of R is turned ON if S is within the first range B S B 1 bit 01 of R is turned ON if S is within the second range B 2 S B 3 and bit 15 of R is turned ON if S is within the fifteenth range B 30 S B 31 All other bits in R are turned OFF EM Area with bank En_000...

Page 362: ...3 7 10 EXPANDED BLOCK COMPARE BCMP2 502 Purpose Compares the source data to up to 256 ranges defined by 256 lower limits and 256 upper limits and turns ON the corresponding bit in the result word when the source data is within a range BCMP2 502 is supported only by the CS1 H CJ1 H and CS1D CPU Unit Ver 2 0 or later and CJ1M CPU Unit Pre Ver 2 0 or Unit Ver 2 0 or later Ladder Symbol Name Label Ope...

Page 363: ...on Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK B 31 B 32 B 33 B 34 B 35 B 36 B 37 B 38 B 2N 1 B 2 N 1 B B 1 B 2 B 3 B 4 B 5 B 6 0 7 8 15 Range 15 value A Range 15 value B Range 16 value A Range 16 value B Range 17 value A Range 17 value B Range 18 value A Range 18 value B Range N value A Range N value...

Page 364: ...to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank EM Area with bank Indirect DM EM addresses in binary D00000 to D32767 Indirect DM EM addresses in BCD D00000 to D32767 Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 ...

Page 365: ...s ON in the following example BCMP2 502 compares the content of CIO 0010 with the 24 ranges defined in D00200 through D00247 N 17 hex 23 decimal i e 24 ranges and turns ON the corre sponding bits in CIO 0100 and CIO 0101 when S is within the range and OFF when S is not within the range For example if the source data in CIO 0010 is in the range defined by D00201 and D00202 then bit 00 of CIO 0100 i...

Page 366: ...1 8 0 0 0 5 0 0 0 1 0 0 0 2 0 0 2 0 0 0 S CIO 0010 0 1 7 5 0 0 1 7 D00201 D00203 D00205 D00231 D00233 D00235 D00237 D00247 0 0 0 0 0 0 8 0 0 1 6 0 1 2 0 0 1 5 0 0 1 9 0 0 1 8 0 0 0 1 0 0 R CIO 0100 R CIO 0101 Bit ZCP 088 CD LL UL CD Comparison Data LL Lower limit of range UL Upper limit of range Variations Executed Each Cycle for ON Condition ZCP 088 Executed Once for Upward Differentiation Not su...

Page 367: ...utput or right hand instruction with a branch from the same input condition that controls ZCP 088 as shown in the following dia gram In this case the Equals Flag and output A will be turned ON when LL CD UL EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D327...

Page 368: ... D00000 is compared to the range 0005 to 001F hex 5 to 31 decimal and the result is output to the Arithmetic Flags CIO 000200 is turned ON if 0005 hex content of D00000 001F hex CIO 000201 is turned ON if the content of D00000 001F hex CIO 000202 is turned ON if the content of D00000 0005 hex A ZCP CD LL UL Correct Use of ZCP 088 Arithmetic Flag Example Equal Flag A ZCPL CD LL UL Incorrect Use of ...

Page 369: ...1F CD LL UL Arithmetic Flags ZCPL 116 CD LL UL CD First word of Comparison Data LL First word of Lower Limit UL First word of Upper Limit Variations Executed Each Cycle for ON Condition ZCP 088 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subrou...

Page 370: ...ction might change the status of the Arithmetic Flag The operation of ZCPL 116 is almost identical to that of ZCP 088 except that ZCPL 116 compares 32 bit values instead of 16 bit values Refer to 3 7 11 AREA RANGE COMPARE ZCP 088 for diagrams showing how to use results in the program and an example program section Flags Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 ...

Page 371: ...OFF in all other cases Less Than or Equal Flag Left unchanged Negative Flag N Left unchanged Name Label Operation S D MOV 021 S Source D Destination Variations Executed Each Cycle for ON Condition MOV 021 Executed Once for Upward Differentiation MOV 021 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification See note MOV 021 Combined Variations Executed Once and...

Page 372: ...CIO 000000 is ON in the following example the content of CIO 0100 is copied to D00100 Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 ...

Page 373: ...tion MVN 022 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00...

Page 374: ...dex Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D Destination word Bit status inverted Source word Name Label Operation Error Flag ER OFF Equals Flag ON if the content of D is 0000 after execution OFF in all other cases Negative Flag N ON if the leftmost bit of D is 1 after execution OFF in all other cases S D MOVL 498 S First ...

Page 375: ...000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to ...

Page 376: ...uted Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM ...

Page 377: ... unchanged 3 8 5 MOVE BIT MOVB 082 Purpose Transfers the specified bit Ladder Symbol Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D S D S 1 D 1 Bit status inverted Name Label Operation Error Flag ER OFF Equals Flag ON if the contents of D 1 and D are 0000 0000 after ...

Page 378: ... 0F 0 to 15 decimal Destination bit 00 to 0F 0 to 15 decimal m n Area S C D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in bin...

Page 379: ...3 8 6 MOVE DIGIT MOVD 083 Purpose Transfers the specified digit or digits Each digit is made up of 4 bits Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER ON if the rightmost and leftmost two digits of C are not within the specified range of 00 to 0F OFF in all other cases 1 2 0 5 S C D MOVD 083 S Source word or data C Control word D Destination word Variations ...

Page 380: ...4 12 C 0 l First digit in S m 0 to 3 Number of digits n 0 to 3 0 1 digit 1 2 digits 2 3 digits 3 4 digits First digit in D l 0 to 3 Always 0 n m 15 8 0 11 3 7 4 12 D Digit 3 Digit 2 Digit 1 Digit 0 Area S C D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D...

Page 381: ...ollowing example four digits of data are cop ied from CIO 0200 to CIO 0300 The transfer begins with the digit 1 of CIO 0200 and digit 0 or CIO 0300 in accordance with the control word s value of 0031 Note After reading the leftmost digit of S digit 3 MOVD 083 wraps to the right most digit digit 0 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047...

Page 382: ...ssary Note The source words must be in the same data area Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 Digit 0 Digit 1 Digit 2 Digit 3 C S D XFRB 062 C Control word S First source word D First destination word Variations ...

Page 383: ...cified in C as shown in the fol lowing diagram 15 0 D D 16 max to to Area C S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in...

Page 384: ...DW 034 to shift m bits by n spaces Flags Precautions Up to 255 bits of data can be transferred per execution of XFRB 062 Be sure that the source words and destination words do not exceed the end of the data area Examples When CIO 000000 is ON in the following example the 20 bits beginning with CIO 020006 are copied to the 20 bits beginning with CIO 030000 3 8 8 BLOCK TRANSFER XFER 070 Purpose Tran...

Page 385: ... Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 0 S S N 1 to to 15 0 D D N 1 to to Area N S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E000...

Page 386: ... Some time will be required to complete XFER 070 when a large number of words is being transferred In this case the XFER 070 transfer might not be completed if a power interruption occurs during execution of the instruction Example When CIO 000000 is ON in the following example the 10 words D00100 through D00109 are copied to D00200 through D00209 Index Registers Indirect addressing using Index Re...

Page 387: ...ea Operand Specifications BSET 071 S E S Source word St Starting word E End word St Variations Executed Each Cycle for ON Condition BSET 071 Executed Once for Upward Differentiation BSET 071 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK E E Source data to Desti...

Page 388: ...0 is ON in the following example the source data in D00100 is copied to D00200 through D00209 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF bi...

Page 389: ...G 073 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area E1 E2 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM A...

Page 390: ...562 Purpose Exchanges the contents of a pair of consecutive words with another pair of consecutive words Ladder Symbol Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 ...

Page 391: ...as Step program areas Subroutines Interrupt tasks OK OK OK OK Area E1 E2 CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D3...

Page 392: ...e source word to a destination word calculated by adding an offset value to the base address Ladder Symbol Variations E2 E1 Buffer 1st XFER 070 operation 2nd XFER 070 operation 3rd XFER 070 operation Name Label Operation Error Flag ER Unchanged See note Equals Flag Unchanged See note Negative Flag N Unchanged See note DIST 080 S S Source word Bs Destination base address Of Offset Bs Of Variations ...

Page 393: ...ea CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C I...

Page 394: ...ther words by changing the offset in D00300 3 8 13 DATA COLLECT COLL 081 Purpose Transfers the source word calculated by adding an offset value to the base address to the destination word Ladder Symbol Variations S Bs n Of Bs Name Label Operation Error Flag ER OFF Equals Flag ON if the source data is 0000 OFF in all other cases Negative Flag N ON if the leftmost bit of the source data is 1 OFF in ...

Page 395: ... Of D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C In...

Page 396: ...OVE TO REGISTER MOVR 560 Purpose Sets the PLC memory address of the specified word bit or timer counter Completion Flag in the specified Index Register Use MOVRW 561 to set the PLC memory address of a timer counter PV in an Index Register Ladder Symbol Variations Bs Bs n Of Name Label Operation Error Flag ER OFF Equals Flag ON if the source data is 0000 OFF in all other cases Negative Flag N ON if...

Page 397: ...ogram areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6143 CIO 000000 to CIO 614315 Work Area W000 to W511 W00000 to W51115 Holding Bit Area H000 to H511 H00000 to H51115 Auxiliary Bit Area A000 to A447 A448 to A959 A00000 to A44715 A44800 to A95915 Timer Area T0000 to T4095 Completion Flag Counter Area C0000 to C4095 Completion Flag Task Flag TK0000 to TK0031 DM Ar...

Page 398: ...3 8 15 MOVE TIMER COUNTER PV TO REGISTER MOVRW 561 Purpose Sets the PLC memory address of the specified timer or counter s PV in the specified Index Register Use MOVR 560 to set the PLC memory address of a word bit or timer counter Completion Flag in an Index Register Ladder Symbol Variations Applicable Program Areas Operands D Destination The destination must be an Index Register IR0 to IR15 Name...

Page 399: ...turned OFF Precautions MOVRW 561 cannot set the PLC memory addresses of data area words bits or timer counter Completion Flags Use MOVR 560 to set these PLC memory addresses Area S D CIO Area Work Area Holding Bit Area Auxiliary Bit Area Timer Area T0000 to T4095 present value Counter Area C0000 to C4095 present value DM Area EM Area without bank EM Area with bank Indirect DM EM addresses in binar...

Page 400: ...FT 016 368 ARITHMETIC SHIFT LEFT ASL 025 370 DOUBLE SHIFT LEFT ASLL 570 371 ARITHMETIC SHIFT RIGHT ASR 026 373 DOUBLE SHIFT RIGHT ASRL 571 374 ROTATE LEFT ROL 027 376 DOUBLE ROTATE LEFT ROLL 572 378 ROTATE LEFT WITHOUT CARRY RLNC 574 383 DOUBLE ROTATE LEFT WITH OUT CARRY RLNL 576 385 ROTATE RIGHT ROR 028 380 DOUBLE ROTATE RIGHT RORL 573 381 ROTATE RIGHT WITHOUT CARRY RRNC 575 387 DOUBLE ROTATE RIG...

Page 401: ...ecuted Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK OK Area St E CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area Counter Area DM Area EM Area without bank EM Area with bank Indirect DM ...

Page 402: ... when St is set to greater than E an error will not occur and one word of data in St will be shifted When St and E are designated indirectly using index registers and the actual addresses in I O memory are not within memory areas for data an error will occur and the Error Flag will turn ON Examples Shift Register Exceeding 16 Bits The following example shows a 48 bit shift register using words CIO...

Page 403: ...Step program areas Subroutines Interrupt tasks OK OK OK OK 15 14 13 12 Data input Reset Shift input Shift direction 1 ON Left 0 OFF Right Area C St E CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Ar...

Page 404: ...ill turn ON Examples Shifting Data If shift input CIO 030014 goes ON when CIO 000000 is ON and the reset bit CIO 030015 is OFF words CIO 0100 through CIO 0102 will shift one bit in the direction designated by CIO 030012 e g 1 Right and the contents of input bit CIO 030013 will be shifted into the rightmost bit CIO 010000 The con tents of CIO 010215 will be shifted to the Carry Flag CY Index Regist...

Page 405: ...ight from Leftmost to Rightmost Bit When the shift input bit bit 14 of C is ON the contents of the input bit bit 13 of C I O is shifted to bit 15 on the end word and each bit thereafter is shifted one bit to the right The status of bit 00 of the starting word is shifted to the Carry Flag 3 9 3 ASYNCHRONOUS SHIFT REGISTER ASFT 017 Purpose Shifts all non zero word data within the specified word rang...

Page 406: ... shifted toward E 1 Non zero data shifted toward St Shift Enable Bit 0 Shift disabled 1 Shift enabled Clear Bit 0 Data not reset 1 All data from St to E is reset Area C St E CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without ban...

Page 407: ...ifting Data If the Shift Enable Bit CIO 030014 goes ON when CIO 000000 is ON all words with non zero data content from CIO 0100 through CIO 0109 will be shifted in the direction designated by the Shift Direction Bit CIO 030013 e g 1 Toward St if the word to the left of the non zero data is all zeros E E Shift direction Shift enabled Clear Convert Convert Non zero data Zero data St St Name Label Op...

Page 408: ...tion After two executions St St WSFT 016 S E S Source word St Starting word E End word St Variations Executed Each Cycle for ON Condition WSFT 016 Executed Once for Upward Differentiation WSFT 016 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S St E CIO Ar...

Page 409: ...ed one word toward E The contents of CIO 0300 will be stored in CIO 0100 and the contents of CIO 0102 will be lost EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Cons...

Page 410: ...Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En...

Page 411: ...he left Ladder Symbol Variations Applicable Program Areas Operand Specifications Name Label Operation Error Flag ER OFF Equals Flag ON when the shift result is 0 OFF in all other cases Carry Flag CY ON when 1 is shifted into the Carry Flag CY OFF in all other cases Negative Flag N ON when the leftmost bit is 1 as a result of the shift OFF in all other cases Wd ASLL 570 Wd Wd Word Variations Execut...

Page 412: ...ill be shifted to the Carry Flag CY Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En...

Page 413: ...cation Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM ...

Page 414: ...00 is ON word CIO 0100 will shift one bit to the right 0 will be placed in CIO 010015 and the contents of CIO 010000 will be shifted to the Carry Flag CY 3 9 8 DOUBLE SHIFT RIGHT ASRL 571 Purpose Shifts the contents of Wd and Wd 1 one bit to the right Ladder Symbol Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR...

Page 415: ...nes Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to...

Page 416: ...gram Areas Operand Specifications Carry Flag CY ON when 1 is shifted into the Carry Flag CY OFF in all other cases Negative Flag N OFF Name Label Operation Wd ROL 027 Wd Word Wd Variations Executed Each Cycle for ON Condition ROL 027 Executed Once for Upward Differentiation ROL 027 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block progr...

Page 417: ...he Carry Flag CY will shift one bit to the left The contents of CIO 010015 will be shifted to the Carry Flag CY and the Carry Flag contents will be shifted to CIO 010000 Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR1...

Page 418: ...t supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En...

Page 419: ... 040 or Clear Carry CLC 041 instructions Examples When CIO 000000 is ON word CIO 0100 CIO 0101 and the Carry Flag CY will shift one bit to the left The contents of CIO 010015 will be shifted to the Carry Flag CY and the Carry Flag contents will be shifted to CIO 010000 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR1...

Page 420: ...orted Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in...

Page 421: ...00 will be shifted to the Carry Flag CY and the Carry Flag contents will be shifted to CIO 010015 3 9 12 DOUBLE ROTATE RIGHT RORL 573 Purpose Shifts all Wd and Wd 1 bits one bit to the right including the Carry Flag CY Ladder Symbol Variations Wd Name Label Operation Error Flag ER OFF Equals Flag ON when the shift result is 0 OFF in all other cases Carry Flag CY ON when 1 is shifted into the Carry...

Page 422: ...T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing...

Page 423: ...e Shifts all Wd bits one bit to the left not including the Carry Flag CY Ladder Symbol Variations Applicable Program Areas Operand Specifications Wd Instruction executed once Wd CIO 0100 Wd 1 CIO 0101 RLNC 574 Wd Word Wd Variations Executed Each Cycle for ON Condition RLNC 574 Executed Once for Upward Differentiation RLNC 574 Executed Once for Downward Differentiation Not supported Immediate Refre...

Page 424: ...xclud ing the Carry Flag CY The contents of CIO 010015 will be shifted to CIO 010000 Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 ...

Page 425: ...tiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area wi...

Page 426: ... Flag will turn ON Examples When CIO 000000 is ON word CIO 0100 and CIO 0101 will shift one bit to the left excluding the Carry Flag CY The contents of CIO 010115 will be shifted to CIO 010000 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Wd Wd 1 Wd Name Label Operation Error Flag ER ...

Page 427: ...on Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with ba...

Page 428: ... bits one bit to the right not including the Carry Flag CY The contents of the rightmost bit of Wd 1 is shifted to the leftmost bit of Wd and to the Carry Flag CY Ladder Symbol Variations Wd Name Label Operation Error Flag ER OFF Equals Flag ON when the shift result is 0 OFF in all other cases Carry Flag CY ON when 1 is shifted into the Carry Flag CY OFF in all other cases Negative Flag N ON when ...

Page 429: ...o T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressi...

Page 430: ...t 4 bits to the left Ladder Symbol Variations Applicable Program Areas Note St and E must be in the same data area Operand Specifications Wd Instruction executed once Wd CIO 0100 Wd 1 CIO 0101 SLD 074 E St St Starting word E End word Variations Executed Each Cycle for ON Condition SLD 074 Executed Once for Upward Differentiation SLD 074 Executed Once for Downward Differentiation Not supported Imme...

Page 431: ...0 is ON words CIO 0100 through CIO 0102 will shift by one digit 4 bits to the left A zero will be placed in bits 0 to 3 of word CIO 0100 and the contents of bits 12 to 15 of CIO 0102 will be lost EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 t...

Page 432: ...ep program areas Subroutines Interrupt tasks OK OK OK OK Area St E CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E...

Page 433: ...IO 0102 will shift by one digit 4 bits to the right A zero will be placed in bits 12 to 15 of CIO 0102 and the contents of bits 0 to 3 of word CIO 0100 will be lost 3 9 19 SHIFT N BIT DATA LEFT NSFL 578 Purpose Shifts the specified number of bits to the left Ladder Symbol Variations Applicable Program Areas Operands C 0000 to 000F hex 0 to 15 N 0000 to FFFF hex 0 to 65535 E S Lost t Name Label Ope...

Page 434: ...lding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E327...

Page 435: ...d into the Carry Flag CY 3 9 20 SHIFT N BIT DATA RIGHT NSFR 579 Purpose Shifts the specified number of bits to the right Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER ON when C data is not between 0000 and 000F hex OFF in all other cases Carry Flag CY ON when 1 is shifted into the Carry Flag CY OFF in all other cases 0 D CIO 0100 D CIO 0100 3 11 D C N C Start...

Page 436: ...0 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses...

Page 437: ... 2 of CIO 0100 are copied into the Carry Flag CY 3 9 21 SHIFT N BITS LEFT NASL 580 Purpose Shifts the specified 16 bits of word data to the left by the specified number of bits Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER ON when C data is not between 0000 and 000F hex OFF in all other cases Carry Flag CY ON when 1 is shifted into the Carry Flag CY OFF in al...

Page 438: ...it shifted in Area D C CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_...

Page 439: ...ag will turn ON Examples When CIO 000000 is ON The contents of CIO 0100 is shifted 10 bits to the left from the rightmost bit to the leftmost bit The number of bits to shift is specified in bits 0 to 7 of word CIO 0300 control data The contents of bit 0 of CIO 0100 is copied into bits from which data was shifted and the contents of the rightmost bit which was shifted out of range is shifted into t...

Page 440: ...0A Hex Always 0 Data shifted into register 8 Hex Contents of rightmost bit shifted in Rightmost bit Lost No of bits to shift 10 bits Contents of the rightmost bit is inserted NSLL 582 D C D Shift word C Control word Variations Executed Each Cycle for ON Condition NSLL 582 Executed Once for Upward Differentiation NSLL 582 Executed Once for Downward Differentiation Not supported Immediate Refreshing...

Page 441: ...511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A448 to A958 A000 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D327...

Page 442: ... CIO 0100 and CIO 0101 will be shifted to the left from the rightmost bit to the leftmost bit by 10 bits The number of bits to shift is specified in bits 0 to 7 of word CIO 0300 control data The contents of bit 0 of CIO 0100 is copied into bits from which data was shifted and the contents of the rightmost bit which was shifted out of range is shifted into the Carry Flag CY All other data is lost N...

Page 443: ...riations Executed Each Cycle for ON Condition NASR 581 Executed Once for Upward Differentiation NASR 581 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 8 0 11 7 12 C 0 No of bits to shift 00 to 10 Hex Always 0 Data shifted into register 0 Hex 0 shifted in 8 H...

Page 444: ...o D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Reg...

Page 445: ...m which data was shifted and the contents of the leftmost bit of data which was shifted out of range is shifted into the Carry Flag CY All other data is lost 3 9 24 DOUBLE SHIFT N BITS RIGHT NSRL 583 Purpose Shifts the specified 32 bits of word data to the right by the specified number of bits Ladder Symbol Variations 15 8 0 11 3 7 4 12 C 0 8 0 A No of bits to shift 10 bits 0A Hex Always 0 Data sh...

Page 446: ... Area D C CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W510 W000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A448 to A958 A000 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_3...

Page 447: ...shifted 10 bits to the right from the leftmost bit to the rightmost bit The number of bits to shift is specified in bits 0 to 7 of word CIO 0300 control data The contents of bit 15 of CIO will be copied into the bits from which data was shifted and the con tents of the leftmost bit of data which was shifted out of range will be shifted into the Carry Flag CY All other data is lost Shift n bits Los...

Page 448: ...408 Data Shift Instructions Section 3 9 CY 1 Leftmost bit Lost No of bits to shift 10 bits Contents of the leftmost bit is inserted ...

Page 449: ... Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 E...

Page 450: ...every cycle as long as CIO 000000 is ON Operation of 590 The up differentiated variation is used in the following example so the content of D00100 will be incremented by 1 only when CIO 000000 has gone from OFF to ON Wd Wd Name Label Operation Error Flag ER OFF Equals Flag ON if the content of Wd is 0000 after execution OFF in all other cases Carry Flag CY ON if a digit in Wd went from F to 0 duri...

Page 451: ...591 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area w...

Page 452: ...as long as CIO 000000 is ON Operation of L 591 The up differentiated variation is used in the following example so the content of D00101 and D00100 will be incremented by 1 only when CIO 000000 has gone from OFF to ON Wd 1 Wd Wd 1 Wd Name Label Operation Error Flag ER OFF Equals Flag ON if the result is 0000 0000 after execution OFF in all other cases Carry Flag CY ON if a digit in Wd 1 or Wd went...

Page 453: ...fferentiation 592 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D3...

Page 454: ... ON Operation of 592 The up differentiated variation is used in the following example so the content of D00100 will be decremented by 1 only when CIO 000000 has gone from OFF to ON Name Label Operation Error Flag ER OFF Equals Flag ON if the content of Wd is 0000 after execution OFF in all other cases Carry Flag CY ON if a digit in Wd went from 0 to F during execution OFF in all other cases Negati...

Page 455: ...593 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area w...

Page 456: ...as long as CIO 000000 is ON Operation of L 593 The up differentiated variation is used in the following example so the content of D00101 and D00100 will be decremented by 1 only when CIO 000000 has gone from OFF to ON Wd 1 Wd Wd 1 Wd Name Label Operation Error Flag ER OFF Equals Flag ON if the result is 0000 0000 after execution OFF in all other cases Carry Flag CY ON if a digit in Wd 1 or Wd went...

Page 457: ...on B 594 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM A...

Page 458: ...y cycle as long as CIO 000000 is ON Operation of B 594 The up differentiated variation is used in the following example so the content of D00100 will be incremented by 1 only when CIO 000000 has gone from OFF to ON Wd Wd Name Label Operation Error Flag ER ON if the content of Wd is not BCD OFF in all other cases Equals Flag ON if the content of Wd is 0000 after execution OFF in all other cases Car...

Page 459: ...L 595 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area...

Page 460: ...cremented by 1 every cycle as long as CIO 000000 is ON Operation of BL 595 The up differentiated variation is used in the following example so the BCD content of D00101 and D00100 will be incremented by 1 only when CIO 000000 has gone from OFF to ON Wd 1 Wd Wd 1 Wd Name Label Operation Error Flag ER ON if the content of Wd 1 and Wd is not BCD OFF in all other cases Equals Flag ON if the result is ...

Page 461: ...iation B 596 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 ...

Page 462: ... up differentiated variation is used in the following example so the BCD content of D00100 will be decremented by 1 only when CIO 000000 has gone from OFF to ON 1 Wd Wd Name Label Operation Error Flag ER ON if the content of Wd is not BCD OFF in all other cases Equals Flag ON if the content of Wd is 0000 after execution OFF in all other cases Carry Flag CY ON if a digit in Wd went from 0 to 9 duri...

Page 463: ... 597 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area ...

Page 464: ...peration of BL 597 The up differentiated variation is used in the following example so the BCD content of D00101 and D00100 will be decremented by 1 only when CIO 000000 has gone from OFF to ON Wd 1 Wd Wd 1 Wd Name Label Operation Error Flag ER ON if the content of Wd 1 and Wd is not BCD OFF in all other cases Equals Flag ON if the result is 0000 0000 after execution OFF in all other cases Carry F...

Page 465: ...ED BINARY SUBTRACT WITHOUT CARRY 410 440 DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY L 411 442 SIGNED BINARY SUBTRACT WITH CARRY C 412 446 DOUBLE SIGNED BINARY SUBTRACT WITH CARRY CL 413 448 BCD SUBTRACT WITHOUT CARRY B 414 451 DOUBLE BCD SUBTRACT WITHOUT CARRY BL 415 452 BCD SUBTRACT WITH CARRY BC 416 456 DOUBLE BCD SUBTRACT WITH CARRY BCL 417 457 SIGNED BINARY MULTIPLY 420 459 DOUBLE SIGNED BINA...

Page 466: ...terrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767...

Page 467: ...nt of the leftmost bit of R is 1 the Nega tive Flag will turn ON Examples When CIO 000000 is ON in the following example D00100 and D00110 will be added as 4 digit signed binary values and the result will be output to D00120 R CY Au Ad Signed binary Signed binary Signed binary CY will turn ON when there is a carry Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in al...

Page 468: ...utines Interrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 ...

Page 469: ...ontent of the leftmost bit of R 1 is 1 the Negative Flag will turn ON Examples When CIO 000000 is ON D00100 and D00110 and D00111 and D00110 will be added as 8 digit signed binary values and the result will be output to D00120 and D00120 R 1 CY R Au 1 Ad 1 Au Ad Signed binary Signed binary Signed binary CY will turn ON when there is a carry Name Label Operation Error Flag ER OFF Equals Flag ON whe...

Page 470: ...Subroutines Interrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E0...

Page 471: ...ga tive Flag will turn ON Note To clear the Carry Flag CY execute the Clear Carry CLC 041 instruction Examples When CIO 000000 is ON D00100 D00110 and CY will be added as 4 digit signed binary values and the result will be output to D00220 CY R CY Au Ad Signed binary Signed binary Signed binary CY will turn ON when there is a carry Name Label Operation Error Flag ER OFF Equals Flag ON when the add...

Page 472: ...rogram areas Subroutines Interrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000...

Page 473: ...R 1 is 1 the Negative Flag will turn ON Note To clear the Carry Flag CY execute the Clear Carry CLC 041 instruction Examples When CIO 000000 is ON D00201 D00200 D00211 D00210 and CY will be added as 8 digit signed binary values and the result will be output to D00221 and D00220 CY R CY Au 1 Ad 1 R 1 Au Ad Signed binary Signed binary Signed binary CY will turn ON when there is a carry Name Label Op...

Page 474: ...upt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_...

Page 475: ...rpose Adds 8 digit double word BCD data and or constants Ladder Symbol Variations Applicable Program Areas R CY BCD BCD BCD Au Ad CY will turn ON when there is a carry Name Label Operation Error Flag ER ON when Au is not BCD ON when Ad is not BCD OFF in all other cases Equals Flag ON when the result is 0 OFF in all other cases Carry Flag CY ON when the addition results in a carry OFF in all other ...

Page 476: ...ses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to 99999999 BCD Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 CY R BCD BCD BCD R 1...

Page 477: ...d or constants with the Carry Flag CY Ladder Symbol Variations Applicable Program Areas Operand Specifications BC 406 R Au Ad Au Augend word Ad Addend word R Result word Variations Executed Each Cycle for ON Condition BC 406 Executed Once for Upward Differentiation BC 406 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas S...

Page 478: ...nd the result will be output to D00120 Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to 9999 BCD Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 ...

Page 479: ...m areas Subroutines Interrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D...

Page 480: ...igit BCD values and the result will be output to D00121 and D00120 3 11 9 SIGNED BINARY SUBTRACT WITHOUT CARRY 410 Purpose Subtracts 4 digit single word hexadecimal data and or constants Ladder Symbol Variations R 1 CY R CY BCD BCD BCD Au 1 Ad 1 Au Ad CY will turn ON when there is a carry Name Label Operation Error Flag ER ON when Au Au 1 is not BCD ON when Ad Ad 1 is not BCD OFF in all other case...

Page 481: ...8 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D0000 to D4095 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Da...

Page 482: ... D00120 3 11 10 DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY L 411 Purpose Subtracts 8 digit double word hexadecimal data and or constants Ladder Symbol Variations Applicable Program Areas Carry Flag CY ON when the subtraction results in a borrow OFF in all other cases Overflow Flag OF ON when the result of subtracting a negative number from a positive number is in the range 8000 to FFFF hex OFF in...

Page 483: ...2767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Su 1 CY R Mi 1 R 1 Mi Su Signed...

Page 484: ...ndicate that the result of the subtraction is negative To convert the 2 s complement to the true number an instruction which subtracts the result from 0 is necessary using the Carry Flag CY as an execution con dition Note 2 s Complement A 2 s complement is the value obtained by subtracting each binary digit from 1 and adding one to the result For example the 2 s complement for 1101 is cal culated ...

Page 485: ...ta FFFF Hex 0001 Hex FFFE Hex 2 Note 1 65534 Note 2 FFFD Hex FFFF Hex FFFE Hex 2 Note 3 65534 Note 4 Carry Flag OFF Negative Flag ON Carry Flag OFF Negative Flag ON Since the Negative Flag is ON the result FFFE hex is a negative value 2 s complement and is thus 2 Since the Carry Flag is OFF the result FFFE hex is an unsigned positive value of 65534 Since the Negative Flag is ON the result FFFE hex...

Page 486: ...Y R 1 D00100 Su 1 D00101 Su D00100 Subtraction at 2 R 1 D00101 D00101 D00100 3 D 6 0 E A 7 9 6 5 1 F 9 2 D 1 CY R 1 D00100 1 CIO 0201 CIO 0200 2 0 F 5 5 A 0 8 Su 1 Su Final Subtraction Result Mi 1 Mi C 412 R Mi Su Mi Minuend word Su Subtrahend word R Result word Variations Executed Each Cycle for ON Condition C 412 Executed Once for Upward Differentiation C 412 Executed Once for Downward Different...

Page 487: ...sters Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Mi Su R CY R CY Mi Su Signed binary Signed binary Signed binary CY will turn ON when there is a borrow Name Label Operation Error Flag ER OFF Equals Flag ON when the subtraction result is 0 OFF in all other cases Carry Flag CY ON when the subtractio...

Page 488: ...ion Examples When CIO 000000 is ON in the following example D00110 and CY will be subtracted from D00100 as 4 digit signed binary values and the result will be output to D00120 3 11 12 DOUBLE SIGNED BINARY SUBTRACT WITH CARRY CL 413 Purpose Subtracts 8 digit double word hexadecimal data and or constants with the Carry Flag CY Ladder Symbol Variations Applicable Program Areas Operand Specifications...

Page 489: ...essing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Mi Su R R 1 CY R CY Mi 1 Su 1 Mi Su Signed binary Signed binary Signed binary CY will turn ON when there is a borrow Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in all other cases Carry Flag CY ON when the results in a borrow OFF in ...

Page 490: ...signed binary values and the result will be output to D00121 and D00120 If the result of the subtraction is a negative number Mi Su or Mi 1 Mi Su 1 Su the result is output as a 2 s complement The Carry Flag CY will turn ON To convert the 2 s complement to the true number a program which subtracts the result from 0 is necessary as an input condition of the Carry Flag CY The Carry Flag turning ON th...

Page 491: ...s Interrupt tasks OK OK OK OK Area Mi Su R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E3...

Page 492: ... values and the result will be output to D00120 3 11 14 DOUBLE BCD SUBTRACT WITHOUT CARRY BL 415 Purpose Subtracts 8 digit double word BCD data and or constants Ladder Symbol Variations R CY BCD BCD BCD Mi Su CY will turn ON when there is a borrow Name Label Operation Error Flag ER ON when Mi is not BCD ON when Su is not BCD OFF in all other cases Equals Flag ON when the result is 0 OFF in all oth...

Page 493: ...a C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to 99999999 BCD Data Registers Index Registers Indirect ad...

Page 494: ...g turning ON thus indicates that the result of the subtraction is negative Note 10 s Complement A 10 s complement is the value obtained by subtracting each digit from 9 and adding one to the result For example the 10 s complement for 7556 is calcu lated as follows 9999 7556 1 2444 For a four digit number the 10 s complement of A is 9999 A 1 B To obtain the true number from the 10 s complement B A ...

Page 495: ... RSET 002100 SET 002100 BL 00000000 D00100 D00100 display 6 CIO 0201 CIO 0200 R 1 D00101 CIO 0121 CIO 0120 0 9 5 8 3 9 0 1 4 6 2 7 0 7 1 9 2 5 1 1 3 1 9 1 CY R 1 D00100 09583960 100000000 17072641 Subtraction at 1 Mi 1 Mi Su 1 Su D00101 D00100 0 0 9 2 5 1 1 3 1 9 0 0 0 0 0 0 R 1 D00101 0 4 8 8 6 8 1 1 CY R 1 D00100 00000000 100000000 92511319 7 Subtraction at 2 Su 1 Su R 1 D00101 D00101 D00100 1 8...

Page 496: ...s Subroutines Interrupt tasks OK OK OK OK Area Mi Su R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to D32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 ...

Page 497: ... 041 instruction Examples When CIO 000000 is ON in the following example D00110 and CY will be subtracted from D00100 as 4 digit BCD values and the result will be output to D00120 3 11 16 DOUBLE BCD SUBTRACT WITH CARRY BCL 417 Purpose Subtracts 8 digit double word BCD data and or constants with the Carry Flag CY Ladder Symbol CY R CY BCD BCD BCD Mi Su CY will turn ON when there is a borrow Name La...

Page 498: ...i Su R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C I...

Page 499: ...ult from 0 is necessary as an input condition of the Carry Flag CY The Carry Flag turning ON thus indicates that the result of the subtraction is negative Note 10 s Complement A 10 s complement is the value obtained by subtracting each digit from 9 and adding one to the result For example the 10 s complement for 7556 is calcu lated as follows 9999 7556 1 2444 For a four digit number the 10 s compl...

Page 500: ...rea H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E327...

Page 501: ...ction block as one word 3 11 18 DOUBLE SIGNED BINARY MULTIPLY L 421 Purpose Multiplies 8 digit signed hexadecimal data and or constants Ladder Symbol Variations Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in all other cases Negative Flag N ON when the leftmost bit of the result is 1 OFF in all other cases a b tmp 0 MOV tmp 0 c a b c Function Block Variables Multi...

Page 502: ...94 T0000 to T4092 Counter Area C0000 to C4094 C0000 to C4092 DM Area D00000 to D32766 D00000 to D32764 EM Area without bank E00000 to E32766 E00000 to E32764 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767...

Page 503: ...Ladder Symbol Variations Applicable Program Areas Operand Specifications Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in all other cases Negative Flag N ON when the leftmost bit of the result is 1 OFF in all other cases U 422 R Md Mr Md Multiplicand word Mr Multiplier word R Result word Variations Executed Each Cycle for ON Condition U 422 Executed Once for Upward...

Page 504: ...DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_ 32767 n 0 to C Constants 0000 to FFFF binary...

Page 505: ...riable tmp data type WORD 2 element array UL 423 R Md Mr Md 1st multiplicand word Mr 1st multiplier word R 1st result word Variations Executed Each Cycle for ON Condition UL 423 Executed Once for Upward Differentiation UL 423 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks O...

Page 506: ...D00123 D00122 D00121 and D00120 EM Area without bank E00000 to E32766 E00000 to E32764 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Da...

Page 507: ...s Step program areas Subroutines Interrupt tasks OK OK OK OK Area Md Mr R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E000...

Page 508: ...000000 is ON in the following example D00100 and D00110 will be multiplied as 4 digit BCD values and the result will be output to D00121 and D00120 Constants 0000 to 9999 BCD Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Md Mr R R 1 R BCD BCD BCD Md Mr Name ...

Page 509: ...d word Mr 1st multiplier word R 1st result word Variations Executed Each Cycle for ON Condition BL 425 Executed Once for Upward Differentiation BL 425 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Md Mr R CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6140 ...

Page 510: ...D values and the result will be output to D00123 D00122 D00121 and D00120 Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to 99999999 BCD Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 204...

Page 511: ...errupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Are...

Page 512: ...Flag will turn ON Examples When CIO 000000 is ON in the following example D00100 will be divided by D00110 as 4 digit signed binary values and the quotient will be output to D00120 and the remainder to D00121 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area Dd Dr R R 1 R Dd Dr Remainder ...

Page 513: ...type WORD 2 element array MOV tmp 0 d L 431 R Dd Dr Dd 1st dividend word Dr 1st divisor word R 1st result word Variations Executed Each Cycle for ON Condition L 431 Executed Once for Upward Differentiation L 431 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Are...

Page 514: ...decimal values and the EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary 00000001 to FFFFFFFF binary Data Registers Index Registers Indirec...

Page 515: ... Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area...

Page 516: ...t unsigned binary values and the quotient will be output to D00120 and the remainder will be output to D00121 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary 0001 to FFFF binary Data Registers DR0 to 15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15...

Page 517: ...ata type WORD 2 element array MOV tmp 0 d UL 433 R Dd Dr Dd 1st dividend word Dr 1st divisor word R 1st result word Variations Executed Each Cycle for ON Condition UL 433 Executed Once for Upward Differentiation UL 433 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK...

Page 518: ...k En_00000 to En_32766 n 0 to C En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary 00000001 to FFFFFFFF binary Data Registers Index Registers Indirect addressing using Index Registers IR0 ...

Page 519: ...iation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to ...

Page 520: ...ues and the quotient will be output to D00120 and the remainder to D00120 Example in Function Block Definition In the following example an array variable is used to get the quotient and remainder from the function block Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to 9999 BCD 0001 to 9999 BCD Data Registers DR0 to DR15 Index Registe...

Page 521: ...Executed Each Cycle for ON Condition BL 435 Executed Once for Upward Differentiation BL 435 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6140 Work Area W000 to W510 W000 to W508 Holding Bit Area H000 t...

Page 522: ...nd the quotient will be output to D00121 and D00120 and the remainder to D00123 and D00122 Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to 99999999 BCD 00000001 to 99999999 BCD Data Registers Index Registers Indirect addressing usi...

Page 523: ... BIT SIGNED BINARY SIGN 600 494 DATA DECODER MLPX 076 496 DATA ENCODER DMPX 077 500 ASCII CONVERT ASC 086 504 ASCII TO HEX HEX 162 508 COLUMN TO LINE LINE 063 512 LINE TO COLUMN COLM 064 514 SIGNED BCD TO BINARY BINS 470 517 DOUBLE SIGNED BCD TO BINARY BISL 472 520 SIGNED BINARY TO BCD BCDS 471 523 DOUBLE SIGNED BINARY TO BCD BDSL 473 525 GRAY CODE CONVERSION GRY 474 529 FOUR DIGIT NUMBER TO ASCII...

Page 524: ...Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 ...

Page 525: ... BCD BIN BCD 0100 BCD 0300 D00101 D00102 D00010 D00011 D00012 NEXT BIN IR0 FOR 3 IR1 MOVR D10 IR0 MOVR D100 IR1 00000 00000 Decimal 200 Decimal 100 Decimal 300 Hexadecimal 00C8 Hexadecimal 0064 Hexadecimal 012C BINL 058 S R S First source word R First result word Variations Executed Each Cycle for ON Condition BINL 058 Executed Once for Upward Differentiation BINL 058 Executed Once for Downward Di...

Page 526: ...n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S R R R 1 ...

Page 527: ... 3X164 13X162 7X161 2X160 BCD 024 S R S Source word R Result word Variations Executed Each Cycle for ON Condition BCD 024 Executed Once for Upward Differentiation BCD 024 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6143 Work ...

Page 528: ...The resulting BCD data will be stored starting from D00100 Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 D...

Page 529: ...00000 BCD 0200 BCD 0100 BCD 0300 Decimal 200 Decimal 100 Decimal 300 Hexadecimal 00C8 Hexadecimal 0064 Hexadecimal 012C BCDL 059 S R S First source word R First result word Variations Executed Each Cycle for ON Condition BCDL 059 Executed Once for Upward Differentiation BCDL 059 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program ...

Page 530: ...E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to ...

Page 531: ...cuted Each Cycle for ON Condition NEG 160 Executed Once for Upward Differentiation NEG 160 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 ...

Page 532: ...he 2 s complement of the content of D00100 and writes the result to D00200 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S R S R 2 s...

Page 533: ... program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 t...

Page 534: ...D00101 and D00100 and writes the result to D00201 and D00200 3 12 7 16 BIT TO 32 BIT SIGNED BINARY SIGN 600 Purpose Expands a 16 bit signed binary value to its 32 bit equivalent Ladder Symbol Variations S 1 S R 1 R 2 s complement Complement 1 Name Label Operation Error Flag ER OFF Equals Flag ON if the result is 0000 0000 OFF in all other cases Negative Flag N ON if bit 15 of R 1 is ON OFF in all ...

Page 535: ...0 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_000...

Page 536: ...rce word indicates the location of the bit s that will be turned ON C Control Word The control word specifies whether MLPX 076 will perform a 4 to 16 bit con version or an 8 to 256 bit conversion the number of digits or bytes to be con verted and the starting digit or byte Name Label Operation Error Flag ER OFF Equals Flag ON if the result is 0000 0000 OFF in all other cases Negative Flag N ON if ...

Page 537: ... 0 or 1 byte 0 or 1 Number of digits bytes to be converted 4 to 16 0 to 3 1 to 4 digits 8 to 256 0 or 1 1 or 2 bytes Conversion process 0 4 to 16 bits digit to word 1 8 to 256 bits byte to 16 word range Digit number Area S C R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 ...

Page 538: ...value of the specified byte in S 00 to FF and turns ON the corresponding bit in the range of 16 result words All other bits in the result words will be turned OFF Up to two bytes can be converted When two bytes are being converted MLPX 076 will read the bytes in S from right to left and will wrap around to the rightmost byte if the leftmost byte byte 1 has been specified as the starting byte R R 1...

Page 539: ...t Conversion When CIO 000000 is ON in the following example MLPX 076 will convert the 2 bytes in S beginning with byte 1 the leftmost byte as indicated by C 1011 The corresponding bits in D00100 to D00115 and D00116 to D00131 will be turned ON C 1011 C 1010 Digit 1 Digit 0 Digit 1 Digit 0 Name Label Operation Error Flag ER ON if C is not within the specified ranges OFF in all other cases C S 0100 ...

Page 540: ...Starting byte Byte 1 Bits 4 to 7 Number of bytes 2 bytes Byte 1 contains 2D so bit 13 D of R 2 is turned ON Byte 0 contains 1A so bit 10 A of R 1 is turned ON MLPX 0100 1011 D00100 000000 S K D 1 D D00100 D00101 D00102 D00103 D00115 D00116 D00117 D00118 D00131 0 1 2 3 4 5 6 7 8 9 15 14 13 12 11 0 3 4 7 8 15 12 11 10 S 0100 Byte 0 Byte 1 A 1 D 2 C 1 1 0 1 1 DMPX 077 S R C S First source word R Resu...

Page 541: ...to be converted 16 to 4 0 to 3 1 to 4 digits 256 to 8 0 or 1 1 or 2 bytes Specifies the first digit byte to receive converted data 16 to 4 0 to 3 digit 0 to 3 256 to 8 0 or 1 byte 0 or 1 Digit number Area S R C CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to ...

Page 542: ... find the leftmost ON bits or 1 to find the rightmost ON bits When two or more digits are being converted DMPX 077 will write the values to the digits in R from right to left and will wrap around to the rightmost digit after the leftmost digit if necessary The following diagram shows some example values for C and the 16 to 4 bit conversions that they produce R m C Leftmost bit n 2 Start with digit...

Page 543: ...leftmost byte byte 1 has been specified as the starting byte The following diagram shows some example values for C and the 256 to 8 bit conversions that they produce Flags Precautions If the conversion data contains 0000 hex but other data is to be encoded separate the conversion by using more than one DMPX 077 instructions DMPX 077 D0000 D0100 0300 R C Leftmost bit Rightmost bit l 0 Convert one 1...

Page 544: ...rce word into their 8 bit ASCII equivalents Ladder Symbol Variations Applicable Program Areas Operands S Source Word Up to four digits in the source word can be converted The digits are num bered 0 to 3 right to left C S R D00100 S R C Digits DMPX 077 finds the leftmost ON bits Starting digit Digit 1 ASC 086 S D Di S Source word Di Digit designator D First destination word Variations Executed Each...

Page 545: ... 3 2 1 0 Specifies the first digit in S to be converted 0 to 3 Number of digits to be converted 0 to 3 0 1 digit 1 2 digits 2 3 digits 3 4 digits First byte of D to be used 0 Rightmost byte 1 Leftmost byte Parity 0 None 1 Even 2 Odd Digit number Area S Di D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T00...

Page 546: ... an odd number of ON bits The status of the parity bit does not affect the meaning of the ASCII code Examples of even parity When adjusted for even parity ASCII 31 00110001 will be B1 10110001 parity bit turned ON to create an even number of ON bits ASCII 36 00110110 will be 36 00110110 parity bit remains OFF because the num ber of ON bits is already even Examples of odd parity When adjusted for o...

Page 547: ...hen reading digit 1 With CPU Units with unit version 4 0 of later there are instructions to convert 4 8 and 16 digits of numeric data to ASCII STR4 524 STR8 527 and STR16 528 Di 0011 Di 0112 Di 0030 Di 0130 Digit 3 Digit 2 Digit 1 Digit 0 Leftmost Rightmost Digit 3 Digit 2 Digit 1 Digit 0 Digit 3 Digit 2 Digit 1 Digit 0 Leftmost Rightmost Leftmost Rightmost Leftmost Rightmost Digit 3 Digit 2 Digit...

Page 548: ...ollowing diagram D Destination word The converted hexadecimal digits are written into D from right to left begin ning with the specified first digit Any digits in the destination word that are not overwritten with the converted data will be left unchanged HEX 162 S D Di S First source word Di Digit designator D Destination word Variations Executed Each Cycle for ON Condition HEX 162 Executed Once ...

Page 549: ...le of extended ASCII characters Area S Di D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E...

Page 550: ... around to the rightmost digit if necessary The following diagram shows some example values for Di and the conversions that they produce Parity setting leftmost digit of Di Operation of HEX 162 No parity 0 HEX 162 will be executed only when the parity bit in each byte is 0 An error will occur if a parity bit is non zero Even parity 1 HEX 162 will be executed only when there is an even num ber of O...

Page 551: ...ers beginning with the leftmost byte of D00100 into their hexadecimal equivalents and writes this data to D00200 beginning with digit 1 When CIO 000000 is ON in the following example HEX 162 converts the ASCII data in D00010 beginning with the rightmost byte and writes the hexa decimal equivalents in D00300 beginning with digit 1 The digit designator setting of 1011 specifies even parity the start...

Page 552: ...data area N Bit Number Specifies the bit number 0000 to 000F or 0 to 15 to be copied from the source words S D00100 D D00300 Number of bytes 2 bytes Starting digit digit 1 Parity bits Result in even parity Not changed Not changed Conversion Parity Even Starting byte rightmost Starting digit in D Digit 1 Number of bytes 2 Starting byte in S Rightmost LINE 063 S N D S First source word N Bit number ...

Page 553: ... to D32752 D00000 to D32767 EM Area without bank E00000 to E32752 E00000 to E32767 EM Area with bank En_00000 to En_32752 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to 000F binary or 0 to 15 Dat...

Page 554: ...ecifies the first destination word D and D 15 must be in the same data area Name Label Operation Error Flag ER ON if N is not within the specified range of 0000 to 000F OFF in all other cases Equals Flag ON if D is 0000 after execution OFF in all other cases N 0005 S D D00200 to to 5 COLM 064 S D N S Source word D First destination word N Bit number Variations Executed Each Cycle for ON Condition ...

Page 555: ...80 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32752 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32752 E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32752 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D3...

Page 556: ...LM 064 copies the 16 bits in D00200 bits 00 through 15 to bit 5 in D00100 through D00115 0 0 0 0 0 1 1 1 0 0 0 1 0 0 0 0 1 15 00 D 1 1 0 1 0 0 1 0 0 1 1 1 0 0 0 1 D 1 0 0 0 1 1 0 1 1 0 0 1 0 0 1 1 1 D 2 0 1 1 1 0 0 0 1 1 0 0 0 1 0 1 0 D 15 1 0 0 0 0 0 1 1 0 0 0 0 0 1 1 1 D 3 0 1 1 S 1 15 00 Bit Bit Bi Bit Bit Name Label Operation Error Flag ER ON if N is not within the specified range of 0000 to 0...

Page 557: ...fferentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area C S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E0000...

Page 558: ...ta will be treated as 0 and will not cause an error Also the status of bits 13 to 15 of S is not checked when C 0000 Note Some Special I O Units output signed BCD data Calculations using this data will normally be easier if it is first converted to signed binary data with BINS 470 The control word specifies the signed BCD format as shown below C 0000 Input Data Range 999 to 999 BCD C 0001 Input Da...

Page 559: ...verted to signed binary and output to D00400 Setting Signed BCD values Signed binary values C 0000 999 to 1 and 0 to 999 FC19 to FFFF and 0000 to 03E7 C 0001 7999 to 1 and 0 to 7999 E0C1 to FFFF and 0000 to 1F3F C 0002 999 to 1 and 0 to 9999 FC19 to FFFF and 0000 to 270F C 0003 1999 to 1 and 0 to 9999 F831 to FFFF and 0000 to 270F 3 digits BCD 12 bits 0 to 9 Fourth digit BCD A Negative 1 F Negativ...

Page 560: ...ted Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area C S D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A000 to A958 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to...

Page 561: ... 12 6 DOUBLE 2 S COMPLEMENT NEGL 161 for details Values of 0 in the source data will be treated as 0 and will not cause an error Also the status of bits 13 to 15 of S 1 is not checked when C 0000 Note Some Special I O Units output signed BCD data Calculations using this data will normally be easier if it is first converted to signed binary data with BISL 472 The control word specifies the signed B...

Page 562: ...to 1 FB3B 4C01 to FFFF FFFF 0 to 7999 9999 0000 0000 to 04C4 B3FF C 0002 999 9999 to 1 FF67 6981 to FFFF FFFF 0 to 9999 9999 0000 0000 to 05F5 E0FF C 0003 1999 9999 to 1 FECE D301 to FFFF FFFF 0 to 9999 9999 0000 0000 to 05F5 E0FF S 1 S 7 digits BCD 28 bits 0 to 9 Eighth digit BCD F Negative A to E Error S 1 S 7 digits BCD 28 bits 0 to 9 Eighth digit BCD A Negative 1 F Negative B to E Error Name L...

Page 563: ... word S Source word D Destination word Variations Executed Each Cycle for ON Condition BCDS 471 Executed Once for Upward Differentiation BCDS 471 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Setting Allowed values for S C 0000 FC19 to FFFF or 0000 to 03E7 C 00...

Page 564: ...gned binary data for output to these Units The control word specifies the signed BCD format that will be used for the result as shown below C 0000 Output Data Range 999 to 999 BCD C 0001 Output Data Range 7999 to 7999 BCD Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to E...

Page 565: ... to 9 Fourth digit BCD F Negative 0 to 9 Fourth digit BCD A Negative 1 F Negative 3 digits BCD 12 bits Name Label Operation Error Flag ER ON if C is not within the specified range of 0000 to 0003 ON if C 0000 and the source data is not within the allowed ranges FC19 to FFFF or 0000 to 03E7 ON if C 0001 and the source data is not within the allowed ranges E0C1 to FFFF or 0000 to 1F3F ON if C 0002 a...

Page 566: ...S 1 and S C 0000 FF67 6981 to FFFF FFFF or 0000 0000 to 0098 967F C 0001 FB3B 4C01 to FFFF FFFF or 0000 0000 to 04C4 B3FF C 0002 FF67 6981 to FFFF FFFF or 0000 0000 to 05F5 E0FF C 0003 FECE D301 to FFFF FFFF or 0000 0000 to 05F5 E0FF Area C S D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 t...

Page 567: ...require signed BCD data inputs BDSL 473 can be used to convert double signed binary data for output to these Units The control word specifies the signed BCD format that will be used for the result as shown below C 0000 Output Data Range 999 9999 to 999 9999 BCD C 0001 Output Data Range 7999 9999 to 7999 9999 BCD C 0002 Output Data Range 999 9999 to 9999 9999 BCD Index Registers Indirect addressing...

Page 568: ...0003 FECE D301 to FFFF FFFF 1999 9999 to 1 0000 0000 to 05F5 E0FF 0 to 9999 9999 S 1 S 0 to 9 Eighth digit BCD A Negative 1 F Negative 7 digits BCD 28 bits Name Label Operation Error Flag ER ON if C is not within the specified range of 0000 to 0003 ON if C 0000 and the source data is not within the range FF67 6981 to FFFF FFFF or 0000 0000 to 0098 967F ON if C 0001 and the source data is not withi...

Page 569: ...Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK C 0 43 7 8 11 12 15 C 1 C 2 15 11 12 0 Do not use 0 Operating Mode 0 hex Gray binary code conversion Conversion Mode 0 hex Binary Mode 1 hex BCD Mode 2 hex 360 Mode Resolution 0 or 1 to F hex 1 to 15 decimal bits 0 hex User specified...

Page 570: ...00 7FFF hex BCD Mode 0000 0000 to 0003 2767 360 Mode 0000 0000 to 0000 3599 0 0 to 359 9 in 0 1 increments BCD Operand Specifications S D D 1 Rightmost word Leftmost word Area C S D CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W510 W000 to W511 W000 to W510 Holding Bit Area H000 to H510 H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A958 A000 to A...

Page 571: ...ttom of the CPU Unit Lot numbers indicate the manufacturing date as follows YYMMDD nnnn YY Rightmost two digits of the year MM Month as a numeric value DD Day of month nnnn Serial number Note If GRY 474 is transferred to a CPU Unit that does not support it and the pro gram is read from a Programming Console will be displayed for GRY 474 to indicate an illegal instruction If GRY 474 is executed wit...

Page 572: ...y binary code conversion ON if the zero point offset in C 1 is not within the specified resolution including user specified resolutions ON if bits 04 to 07 of C are not 0 hex Binary Mode 1 hex BCD Mode or 2 hex 360 Mode ON if the specified encoder remainder compensation exceeds the set user specified resolution when bits 00 to 03 of C are 0 hex user specified resolution ON if the converted binary ...

Page 573: ...ting mode Gray binary code conversion Conversion mode Binary Mode Resolution 8 bit Zero point offset 001A hex User specified resolution Not used Gray binary code Converted and offset Result of binary conversion and offsetting stored 0 2 C D00000 0 A 0 43 7 8 11 12 15 0151 C 1 D00001 S 0010 1 0 0 1 0 1 0 1 1 0 0 0 0 0 0 0 3488 D D00200 0000 D 1 D00201 000 C 2 D00002 0 Operating mode Gray binary cod...

Page 574: ...3 7 8 11 12 15 0000 C 1 D00001 S 0010 0 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0100 D D00200 0000 D 1 D00201 04C C 2 D00002 1 Operating mode Gray binary code conversion Conversion mode BCD Mode Resolution User specified Zero point offset 0000 hex User specified resolution 360 Encoder remainder compensation 04C hex 76 decimal Gray binary code Converted and offset Result of BCD conversion and offsetting stor...

Page 575: ...D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with bank En_00000 to En_32767 n 0...

Page 576: ... CX Programmer version 7 or higher only Flags Examples Example 1 Converting 3 Words of Numerical Data to ASCII Data When CIO 000000 is ON in the following example the 3 words of numerical data starting at D00010 are converted one word at a time to ASCII data The converted ASCII data is stored in the DM Area starting at D00100 1 2 4 3 31 32 33 34 15 8 7 0 15 8 7 0 11 12 3 4 D 1 D ASCII Hexadecimal ...

Page 577: ...er 0000 0000 to FFFF FFFF to ASCII data 8 characters This instruction is supported by CS CJ series CPU Units with unit version 4 0 or later only 4 5 7 6 30 31 32 33 0 1 3 2 34 35 36 37 8 9 B A 38 39 41 42 15 8 7 11 12 3 4 0 15 8 7 0 NEXT STR4 IR0 FOR 3 IR1 MOVR D00010 IR0 MOVR D00100 IR1 00000 000000 000000 S D Hexadecimal S D00010 S 1 D00011 S 2 D00012 ASCII D D00100 D 1 D00101 D 2 D00102 D 3 D00...

Page 578: ... Area S D CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6140 Work Area W000 to W510 W000 to W508 Holding Bit Area H000 to H510 H000 to H508 Auxiliary Bit Area A448 to A958 A448 to A956 Timer Area T0000 to T4094 T0000 to T4092 Counter Area C0000 to C4094 C0000 to C4092 DM Area D00000 to D32766 D00000 to D32764 EM Area without bank E00000 to E32766 E00000 to E32764 EM Area with bank En_00000 to En_3...

Page 579: ...rs This instruction is supported by CS CJ series CPU Units with unit version 4 0 or later only Ladder Symbol Variations Applicable Program Areas 1 2 4 3 31 32 33 34 ASCII 5 6 8 7 35 36 37 38 15 8 7 11 12 3 4 0 15 8 7 0 D 1 D 2 D 3 D Hexadecimal 12345678 S S 1 Name Label Operation Error Flag ER OFF Equals Flag ON if the result is 0 OFF in all other cases Negative Flag N ON when the leftmost bit of ...

Page 580: ... D00000 to D32764 D00000 to D32760 EM Area without bank E00000 to E32764 E00000 to E32760 EM Area with bank En_00000 to En_32764 n 0 to C En_00000 to En_32760 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Regist...

Page 581: ...Flag ER OFF Equals Flag ON if the result is 0 OFF in all other cases Negative Flag N ON when the leftmost bit of the source data is 1 OFF in all other cases NUM4 S D S ASCII text D Number Variations Executed Each Cycle for ON Condition NUM4 604 Executed Once for Upward Differentiation NUM4 604 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported...

Page 582: ...n the CX Programmer NUM4 604 can be used in CX Programmer version 7 or higher only Flags Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2...

Page 583: ...rs in D00000 and D00001 are converted to BCD data and the result is stored tem porarily in D00010 Next the BCD data is converted to hexadecimal and the result is output to D00100 8 9 F E 1 2 B A 0 0 0 0 15 8 7 11 12 3 4 0 NEXT NUM4 IR0 FOR 3 IR1 MOVR D00010 IR0 MOVR D00100 IR1 000000 000000 000000 31 32 41 42 38 39 45 46 30 30 30 30 15 8 7 0 S D Hexadecimal S D00010 S 1 D00011 S 2 D00012 S 3 D0001...

Page 584: ...ction block definitions Blockprogram areas Step program areas Subroutines Interrupt tasks OK OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6140 CIO 0000 to CIO 6142 Work Area W000 to W508 W000 to W510 Holding Bit Area H000 to H508 H000 to H510 Auxiliary Bit Area A448 to A956 A448 to A958 Timer Area T0000 to T4092 T0000 to T4094 Counter Area C0000 to C4092 C0000 to C4094 DM Area D00000 to D32764 D0...

Page 585: ...Converts 16 characters of ASCII data to an 16 digit hexadecimal number This instruction is supported by CS CJ series CPU Units with unit version 4 0 or later only Ladder Symbol Variations 31 32 33 34 35 36 37 38 1 2 4 3 5 6 8 7 15 8 7 0 15 8 7 11 12 3 4 0 ASCII D S S 1 S 2 S 3 Hexadecimal D 1 Name Label Operation Error Flag ER ON if the source words contain any ASCII characters that are not hexade...

Page 586: ...140 Work Area W000 to W504 W000 to W508 Holding Bit Area H000 to H504 H000 to H508 Auxiliary Bit Area A448 to A952 A448 to A956 Timer Area T0000 to T4088 T0000 to T4092 Counter Area C0000 to C4088 C0000 to C4092 DM Area D00000 to D32760 D00000 to D32764 EM Area without bank E00000 to E32760 E00000 to E32764 EM Area with bank En_00000 to En_32760 n 0 to C En_00000 to En_32764 n 0 to C Indirect DM E...

Page 587: ...rogrammer NUM16 606 can be used in CX Programmer version 7 or higher only Flags 8 9 B A C D F E 0 15 8 7 11 12 3 4 0 30 31 32 33 34 35 36 37 38 39 41 42 43 44 45 46 0 1 3 2 4 5 7 6 15 8 7 ASCII D S S 1 S 2 S 3 S 4 S 5 S 6 S 7 Hexadecimal D 1 D 2 D 3 Name Label Operation Error Flag ER ON if the source words contain any ASCII characters that are not hexadecimal equivalents 0 to 9 a to f or A to F OF...

Page 588: ...VE NOR XNRW 037 559 DOUBLE EXCLUSIVE NOR XNRL 613 560 COMPLEMENT COM 029 562 DOUBLE COMPLEMENT COML 614 564 ANDW 034 I1 I2 R I1 Input 1 I2 Input 2 R Result word Variations Executed Each Cycle for ON Condition ANDW 034 Executed Once for Upward Differentiation ANDW 034 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step p...

Page 589: ... If as a result of the AND the leftmost bit of R is 1 the Negative Flag will turn ON Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 t...

Page 590: ...Subroutines Interrupt tasks OK OK OK OK Area I1 I2 R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E0...

Page 591: ...the logical AND is taken of corresponding bits in CIO 0011 CIO 0010 and CIO 0021 CIO 0020 and the results will be output to corresponding bits in D00201 and D00200 3 13 3 LOGICAL OR ORW 035 Purpose Takes the logical OR of corresponding bits in single words of word data and or constants Ladder Symbol I1 I1 1 I2 I2 1 R R 1 1 1 1 1 0 0 0 1 0 0 0 0 Name Label Operation Error Flag ER OFF Equals Flag ON...

Page 592: ...ported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area I1 I2 R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect...

Page 593: ...F Equals Flag ON when the result is 0 OFF in all other cases Negative Flag N ON when the leftmost bit of R is 1 OFF in all other cases ORWL 611 I1 I2 R I1 Input 1 I2 Input 2 R Result word Variations Executed Each Cycle for ON Condition ORWL 611 Executed Once for Upward Differentiation ORWL 611 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported...

Page 594: ...of the OR the leftmost bit of R 1 is 1 the Negative Flag will turn ON EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers Indirect addressin...

Page 595: ...D D00500 D 1 D00501 Note The vertical arrow indicates logical OR XORW 036 I1 I2 R I1 Input 1 I2 Input 2 R Result word Variations Executed Each Cycle for ON Condition XORW 036 Executed Once for Upward Differentiation XORW 036 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK...

Page 596: ...R is 0000 hex the Equals Flag will turn ON If as a result of the OR the leftmost bit of R is 1 the Negative Flag will turn ON Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Data Registers DR0 to DR15 Index Registers Indire...

Page 597: ...reas Subroutines Interrupt tasks OK OK OK OK Area I1 I2 R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D327...

Page 598: ...exclusive OR the content of R R 1 is 00000000 hex the Equals Flag will turn ON If as a result of the exclusive OR the leftmost bit of R 1 is 1 the Negative Flag will turn ON Examples When the execution condition CIO 00000000 is ON the logical exclusive OR is taken of corresponding bits in CIO 0901 CIO 0900 and D01001 D01000 and the results will be output to corresponding bits in D01201 and D01200 ...

Page 599: ...outines Interrupt tasks OK OK OK OK Area I1 I2 R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000...

Page 600: ...f the NOR the leftmost bit of R is 1 the Negative Flag will turn ON 3 13 8 DOUBLE EXCLUSIVE NOR XNRL 613 Purpose Takes the logical exclusive NOR of corresponding bits in double words of word data and or constants Ladder Symbol Variations Applicable Program Areas I1 I2 R 1 1 1 1 0 0 0 1 0 0 0 1 Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in all other cases Negativ...

Page 601: ...imer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Dat...

Page 602: ...urpose Turns OFF all ON bits and turns ON all OFF bits in Wd Ladder Symbol Variations Applicable Program Areas Operand Specifications S1 0800 CH S1 1 0801 CH S2 0100 CH S2 1 0101 CH D D00500 D 1 D00501 Note The symbol indicates exclusive logical NOR COM 029 Wd Wd Word Variations Executed Each Cycle for ON Condition COM 029 Executed Once for Upward Differentiation COM 029 Executed Once for Downward...

Page 603: ...the following example the status of each bit will be D00100 is reversed EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Regi...

Page 604: ...ation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Wd CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with...

Page 605: ...it signed binary contents positive value of the specified words and outputs the integer portion of the result to the spec ified result word Ladder Symbol Variations Name Label Operation Error Flag ER OFF Equals Flag ON when the result is 0 OFF in all other cases Negative Flag N ON when the leftmost bit of R is 1 OFF in all other cases Instruction Mnemonic Function code Page BINARY ROOT ROTB 620 56...

Page 606: ...000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W510 W000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A958 A448 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 t...

Page 607: ...Operation Error Flag ER ON if bit 15 of S 1 is 1 ON OFF in all other cases Equals Flag ON if the result is 0000 OFF in all other cases Overflow Flag OF ON if the content of S 1 and S is 4000 0000 to 7FFF FFFF OFF in all other cases Underflow Flag UF OFF Negative Flag N OFF 014B 5A91 1234 D00100 CIO 0002 CIO 0001 Square root computation remainder eliminated ROOT 072 S R S First source word R Result...

Page 608: ...00 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 ...

Page 609: ... result This program example calculates the square root of the 4 digit number in CIO 0010 rounds off the result and writes it to CIO 0011 Basically the 4 digit number is multiplied by 10 000 1002 and the result is divided by 100 increasing the precision of the calculation by a factor of 100 Note Figures after the decimal point are rounded for 4 digit numbers Truncated ...

Page 610: ...000 2 The 4 digit number is moved to D00101 3 ROOT 072 calculates the square root of D00101 and D00100 and writes the result to D00102 1 2 3 4 5 BSET MOV ROOT MOV MOV MOVD MOVD INC The values after the decimal point should be rounded D00101 D00100 0 0 0 0 0 0 0 0 0000 0000 010 6 0 1 7 D00101 D00100 6 0 1 7 0 0 0 0 ...

Page 611: ...ction allows any relationship between X and Y to be approximated with line segments Ladder Symbol Variations Applicable Program Areas 6017 0000 7756 D00100 D00101 D00100 Square root computation Remainder eliminated 60 170 000 7 756 932 D00103 CIO 0011 0 0 0 0 0 0 0 0 0000 0000 D00102 7 7 5 6 CIO 0011 D00103 0 0 7 7 5 6 0 0 5600 4900 CIO 0011 0 0 7 8 APR 069 C S R C Control word S Source data R Res...

Page 612: ...0000 to 9999 BCD 0 0000 to 0 9999 9999 BCD 1 0000 Operand Value Data range C Data area address S 16 bit unsigned BCD data 0000 to 9999 16 bit unsigned binary data 0 to 65 535 16 bit signed binary data1 32 768 to 32 767 32 bit signed binary data1 2 147 483 648 to 2 147 483 647 Floating point data1 3 402823 1038 to 1 175494 10 38 1 175494 10 38 to 3 402823 1038 D 16 bit unsigned BCD data 0000 to 999...

Page 613: ... S and writes the result to R The range for S is 0000 to 0900 BCD 0 0 to 90 0 and the range for R is 0000 to 9999 BCD 0 0000 to 0 9999 The remainder of the result beyond the fourth decimal place is eliminated Linear Extrapolation APR 069 linear extrapolation is specified when C is a word address The content of word C specifies the number of coordinates in a data table starting at C 2 the form of t...

Page 614: ...ether the output is BCD or binary OFF specifies binary and ON specifies BCD Bit C 0 3 14 13 12 11 9 10 8 7 6 5 4 2 1 15 0 0 0 0 0 Number of coordinates minus one m 1 00 to FF hex 1 m 256 Source data form 0 f x f S 1 f x f Xm S Output D data format 0 Binary 1 BCD Input S data format 0 Binary 1 BCD Floating point specification for S and D 0 Integer data Signed data specification for S and D 0 Unsign...

Page 615: ...3 C 4 C 5 C 6 C 7 C 8 C 4n 1 C 4n 2 C 4n 3 C 4n 4 C 4m 1 C 4m 2 C 4m 3 C 4m 4 Note Write Xm max X value in the table in word C 1 when the I O data in S and D contain unsigned data bit 11 of C 0 16 bit BCD16 bit binary signed or unsigned or 16 bit BCD data 32 bit signed binary data Floating point data X0 rightmost 16 bits X0 leftmost 16 bits Y0 rightmost 16 bits Y0 leftmost 16 bits X1 rightmost 16 ...

Page 616: ...data and or the output data can be 16 bit unsigned BCD data Also the linear extrapolation function can be set to operate on the value specified in S directly or on Xm S Xm is the maximum value of X in the line segment data Setting name Bit in C Setting Input data S format 15 0 Binary 1 BCD Output data D format 14 0 Binary 1 BCD Source data form 13 0 Operate on S 1 Operate on Xm S Signed data speci...

Page 617: ...at 14 0 Binary 1 BCD Source data form 13 0 Operate on S 1 Operate on Xm S Signed data specification for S and D 11 0 Unsigned data Data length specification for S and D 10 Invalid fixed at 16 bits Floating point specification 09 0 Integer data Setting name Bit in C Setting Input data S format 15 0 Binary Output data D format 14 0 Binary Source data form 13 0 Signed data specification for S and D 1...

Page 618: ... ER ON if C is a constant greater than 0001 ON if C is a word address but the X coordinates are not in ascending order X1 X2 Xm ON if C is a word address and bits 9 11 and 15 of C indi cate BCD input but S is not BCD ON if C is a word address and bit 9 of C indicates floating point data but S is a one word constant ON if C is 0000 or 0001 but S is not BCD between 0000 and 0900 OFF in all other cas...

Page 619: ...s as it must be from D00000 to D00026 C to C 2 12 2 The input data is taken from CIO 0010 and the result is output to CIO 0011 In this case the source word CIO 0010 contains 0014 and f 0014 0726 is output to R CIO 0011 Word Coordinate C 1 Xm max X value C 2 Y0 C 3 X1 C 4 Y1 C 5 X2 C 6 Y2 C 2m 1 Xm max X value C 2m 2 Ym Y0 Y2 Y1 Y3 Y4 Ym X0 X1 X2 X3 X4 Xm X Y Y Y0 Y1 Y2 Y4 Y3 Ym X0 X1 X2 X3 X4 Xm X...

Page 620: ...nstructions Section 3 14 The linear extrapolation calculation is shown below X Y 1F20 0F00 0726 0402 0 0 0005 0014 001A 05F0 x y Values are all hexadecimal Hex Y 0F00 0402 0F00 001A 0005 0014 0015 Ω 0726 Ω 0F00 0086 000F ...

Page 621: ...ersion table 32 bit signed binary data Y data range 2 147 483 648 to 2 147 483 647 Y Fluid volume X Variation from standard Linear extrapolation of table The linear extrapolation can use signed source data if 32 bit signed binary data is used High resolution 32 bit signed binary data X data range 2 147 483 648 to 2 147 483 647 X0 rightmost 16 bits X0 leftmost 16 bits Y0 rightmost 16 bits Y0 leftmo...

Page 622: ...ta range 3 402823 1038 to 1 175494 10 38 1 175494 10 38 to 3 402823 1038 or Y Fluid volume X Fluid height Linear extrapolation of table The linear extrapolation can provide a smooth high resolution curve floating point data is used High resolution floating point data X data range 3 402823 1038 to 1 175494 10 38 1 175494 10 38 to 3 402823 1038 or X0 rightmost 16 bits X0 leftmost 16 bits Y0 rightmos...

Page 623: ...Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32...

Page 624: ...significant digits The eighth and higher digits are eliminated The result must be between 0 1000000 10 7 and 0 9999999 107 R 1 R Quotient Dr 1 Dr Dd 1 Dd 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 0 1 1 0 1 0 0 0 0 1 0 0 0 1 0 0 0 1 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 0 0 0 1 0 0 0 1 0 0 0 1 0 0 1 1 0 1111113 x 10 2 mantissa leftmost 3 digits First word Second word mantissa rightm...

Page 625: ...wo BCD Numbers In this example the 4 digit BCD number in D00000 is divided by the 4 digit BCD number in D00001 and the floating point result is written to D00003 and D00002 To perform the floating point division the BCD value in D00000 is converted to floating point format in D00101 and D00100 and the BCD value in D00001 is converted to floating point format in D00103 and D00102 D00101 D00100 A 5 ...

Page 626: ...0101 and D00103 are set to 4000 3 MOVD 083 is used to move the digits of the original source words to the proper digits in the 2 word floating point formats 1 2 3 4 5 6 7 MOV MOV MOV MOV MOVD MOVD MOVD MOVD FDIV D00101 D00100 4 0 0 0 0 0 0 0 0000 4000 D00103 D00102 4 0 0 0 0 0 0 0 0000 4000 ...

Page 627: ...00103 D00102 4 0 0 7 9 0 0 0 D00101 D00100 4 3 4 5 2 0 0 0 0 3452000 104 D00103 D00102 4 0 0 7 9 0 0 0 0 0079000 104 D00003 D00002 2 4 3 6 9 6 2 0 0 4369620 102 BCNT 067 N S R N Number of words S First source word R Result word Variations Executed Each Cycle for ON Condition BCNT 067 Executed Once for Upward Differentiation BCNT 067 Executed Once for Downward Differentiation Not supported Immediat...

Page 628: ...ry D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0001 to FFFF binary or 1 to 65 535 Data Registers DR0 to DR15 DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR...

Page 629: ...6 BIT FIX 450 594 FLOATING TO 32 BIT FIXL 451 596 16 BIT TO FLOATING FLT 452 597 32 BIT TO FLOATING FLTL 453 599 FLOATING POINT ADD F 454 601 FLOATING POINT SUB TRACT F 455 603 FLOATING POINT MULTI PLY F 456 605 FLOATING POINT DIVIDE F 457 607 DEGREES TO RADIANS RAD 458 609 RADIANS TO DEGREES DEG 459 610 SINE SIN 460 612 HIGH SPEED SINE SINQ 475 614 COSINE COS 461 615 HIGH SPEED COSINE COSQ 476 61...

Page 630: ...will not result in NaN Writing Floating point Data When floating point is specified for the data format in the I O memory edit dis play in the CX Programmer standard decimal numbers input in the display are automatically converted to the floating point format shown above IEEE754 format and written to I O Memory Data written in the IEEE754 for mat is automatically converted to standard decimal form...

Page 631: ...me that in the real mantissa bit 233 is 1 and the binary point follows immediately after it Normalized numbers are expressed as follows 1 sign s x 2 exponent e 127 x 1 mantissa x 2 23 Example Sign Exponent 128 127 1 Mantissa 1 222 221 x 2 23 1 2 1 2 2 1 0 75 1 75 Value 1 75 x 21 3 5 Non normalized Numbers Non normalized numbers express real numbers with very small absolute val ues The sign bit wil...

Page 632: ...ve or negative zero depending on the sign of the result Illegal calculations will result in NaN Illegal calculations include adding infinity to a number with the opposite sign subtracting infinity from a number with the opposite sign multiplying zero and infinity dividing zero by zero or dividing infinity by infinity The value of the result may not be correct if an overflow occurs when convert ing...

Page 633: ...ult everything to the right of the decimal point is truncated 0 y x P 100 100 r θ 2 3 4 1 D00000 D00200 D00001 D00201 D00201 D00204 D00202 D00202 D00206 D00204 D00204 D00208 D00206 D00208 D00210 D00210 D00212 D00204 D00202 D00214 D00214 D00216 D00216 D00218 D00212 D00220 D00218 D00221 D00220 D00100 D00221 D00101 D00200 D00202 000000 ...

Page 634: ...s so DEG 459 is used to convert to degrees The result is then output to D00219 and D00218 as floating point data 4 The data is converted back from floating point to BCD a First FIX 450 is used to temporarily convert the floating point data to binary data and then BCD 024 is used to convert the binary data to BCD data b The distance r is output to D00100 c The angle θ is output to D00101 3 15 1 FLO...

Page 635: ...IO 6142 CIO 0000 to CIO 6143 Work Area W000 to W510 W000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A958 A448 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_327...

Page 636: ...0000 OFF in all other cases Negative Flag N ON if bit 15 of the result is ON OFF in all other cases FIXL 451 S R S First source word R First result word Variations Executed Each Cycle for ON Condition FIXL 451 Executed Once for Upward Differentiation FIXL 451 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program a...

Page 637: ... 15 3 16 BIT TO FLOATING FLT 452 Purpose Converts a 16 bit signed binary value to 32 bit floating point data and places the result in the specified result words Ladder Symbol Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 t...

Page 638: ...pt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 Work Area W000 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A448 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with b...

Page 639: ... in all other cases Negative Flag N ON if the result is negative OFF in all other cases FLTL 453 S R S First source word R First result word Variations Executed Each Cycle for ON Condition FLTL 453 Executed Once for Upward Differentiation FLTL 453 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subrout...

Page 640: ... converted to 16 777 215 0 A signed binary value of 16 777 215 is converted to 15 777 215 0 Flags Precautions The result will not be exact if a number with an absolute value greater than 16 777 215 the maximum value that can be expressed in 24 bits is con verted Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Dat...

Page 641: ...program areas Subroutines Interrupt tasks OK OK OK OK Area Au Ad R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D0000...

Page 642: ... Error Flag will be turned ON and the instruction will not be executed Flags Precautions The augend Au 1 and Au and Addend Ad 1 and Ad data must be in IEEE754 floating point data format Augend Addend 0 Numeral NaN 0 0 Numeral Numeral Numeral See note 1 See note 2 See note 2 See note 2 See note 3 See note 2 See note 3 NaN See note 3 R 1 R Au Au 1 Ad Ad 1 Result floating point data 32 bits Augend fl...

Page 643: ...am areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Mi Su R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses i...

Page 644: ... turned ON and the instruction will not be executed Flags Precautions The Minuend Mi 1 and Mi and Subtrahend Su 1 and Su data must be in IEEE754 floating point data format Minuend Subtrahend 0 Numeral NaN 0 0 Numeral Numeral Numeral See note 1 See note 2 See note 2 See note 2 See note 2 See note 3 See note 3 NaN See note 3 R 1 R Mi Mi 1 Su Su 1 Result floating point data 32 bits Subtrahend floatin...

Page 645: ...areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Md Mr R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in b...

Page 646: ...e instruction will not be executed Flags Precautions The Multiplicand Md 1 and Md and Multiplier Mr 1 and Mr data must be in IEEE754 floating point data format Multiplicand Multiplier 0 Numeral NaN 0 0 0 See note 3 See note 3 Numeral 0 See note 1 See note 2 See note 2 See note 3 See note 2 See note 3 See note 2 NaN See note 3 R 1 R Md Multiplicand floating point data 32 bits Md 1 Mr Multiplier flo...

Page 647: ...reas Step program areas Subroutines Interrupt tasks OK OK OK OK Area Dd Dr R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in bi...

Page 648: ...ruction will not be executed Flags Precautions The Dividend Dd 1 and Dd and Divisor Dr 1 and Dr data must be in IEEE754 floating point data format Multiplicand Multiplier 0 Numeral NaN 0 See note 4 See note 3 See note 3 See note 3 Numeral 0 See note 2 0 0 See notes 1 and 3 See note 4 See note 4 0 0 See notes 1 and 3 See note 4 See note 4 NaN See note 4 R 1 R Dd Dividend floating point data 32 bits...

Page 649: ... Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00...

Page 650: ...laces the result in the specified result words Ladder Symbol Variations Applicable Program Areas R 1 R S S 1 Source degrees 32 bit floating point data Result radians 32 bit floating point data Name Label Operation Error Flag ER ON if the source data is not recognized as floating point data ON if the source data is not a number NaN OFF in all other cases Equals Flag ON if both the exponent and mant...

Page 651: ...ow Flag will turn ON and the result will be output as 0 Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 ...

Page 652: ...rge to be expressed as a 32 bit floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a 32 bit floating point value Negative Flag N ON if the result is negative OFF in all other cases SIN 460 S R S First source word R First result word Variations Executed Each Cycle for ON Condition SIN 460 Executed Once for Upward Differentiation SIN 460 Exe...

Page 653: ...nd result Flags Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 ...

Page 654: ... for ON Condition SINQ 475 Executed Once for Upward Differentiation SINQ 475 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Functionblock definitions Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Are...

Page 655: ...ions SINQ 475 differs from SIN 460 in the following respects The instruction has improved performance The instruction length is 8 steps The Condition Flags are not refreshed An unpredictable value will be output if the angle data is out of range The data cannot be input or output at a Programming Console A question mark will be displayed 3 15 13 COSINE COS 461 Purpose Calculates the cosine of a 32...

Page 656: ...pported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM...

Page 657: ...pplicable Program Areas R S Angle radian data R Result cosine Name Label Operation Error Flag ER ON if the source data is not a number NaN ON if the absolute value of the source data exceeds 65 535 OFF in all other cases Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF OFF Underflow Flag UF OFF Negative Flag N ON if the result is negative...

Page 658: ...the angle and result Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000...

Page 659: ... word R First result word Variations Executed Each Cycle for ON Condition TAN 462 Executed Once for Upward Differentiation TAN 462 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 ...

Page 660: ...is greater than the maximum value that can be expressed as floating point data the Overflow Flag will turn ON and the result will be output as The following diagram shows the relationship between the angle and result Flags Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S...

Page 661: ...s Executed Each Cycle for ON Condition TANQ 477 Executed Once for Upward Differentiation TANQ 477 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Functionblock definitions Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H...

Page 662: ... maximum value that can be expressed as floating point data the result will be output as or 0 The following diagram shows the relationship between the angle and result Precautions TANQ 477 differs from TAN 462 in the following respects The instruction has improved performance The instruction length is 15 steps The Condition Flags are not refreshed An unpredictable value will be output if the angle...

Page 663: ...ecuted Once for Upward Differentiation ASIN 463 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Coun...

Page 664: ...ship between the input data and result Flags Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S R R 1 R S S 1 SIN 1 Source 32 bit floating point data Result 32 bit floating point data R S Input data sine value R Result radians Name Label Operation Error Flag ER ON if the source data is n...

Page 665: ... ACOS 464 Executed Once for Upward Differentiation ACOS 464 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 t...

Page 666: ...Precautions The source data in S 1 and S must be in IEEE754 floating point data format Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S R R 1 R S S 1 COS 1 Source 32 bit floating point data Result 32 bit floating point data R S Input data cosine value R Result radians Name Label Operat...

Page 667: ...Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 t...

Page 668: ...een the input data and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S S 1 TAN 1 Source 32 bit floating point data Result 32 bit floating point data R S Input data tangent R Result radians Name Label Operation Error Flag ER ON if the source data is not recognized as floating point data ON if the source data is not a number NaN OFF in all ...

Page 669: ...ep program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000...

Page 670: ... as The following diagram shows the relationship between the input data and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S S 1 Source 32 bit floating point data Result 32 bit floating point data R S Input data R Result Name Label Operation Error Flag ER ON if the source data is not recognized as floating point data ON if the source data ...

Page 671: ...as Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to 4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D0...

Page 672: ...ut as 0 Note The constant e is 2 718282 The following diagram shows the relationship between the input data and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S S 1 e Source 32 bit floating point data Result 32 bit floating point data R S Input data R Result Name Label Operation Error Flag ER ON if the source data is not recognized as floa...

Page 673: ...s Step program areas Subroutines Interrupt tasks OK OK OK OK Area S R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D0...

Page 674: ...he relationship between the input data and result Flags Precautions The source data in S 1 and S must be in IEEE754 floating point data format R 1 R S S 1 Source 32 bit floating point data Result 32 bit floating point data loge R S Input data R Result Name Label Operation Error Flag ER ON if the source data is not recognized as floating point data ON if the source data is negative ON if the source...

Page 675: ...ep program areas Subroutines Interrupt tasks OK OK OK OK Area B E R CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D000...

Page 676: ...hen the comparison condition is true These instructions are supported by CS1 H CJ1 H CJ1M and CS1D CPU Units only Note Refer to 3 7 1 Input Comparison Instructions 300 to 328 for details on the signed and unsigned binary input comparison instructions and 3 16 21 Dou ble precision Floating point Input Instructions for details on double precision floating point input comparison instructions E 1 E B ...

Page 677: ... instruction Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S1 S2 CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with ban...

Page 678: ...1 and C2 S2 1 S2 Input type Operation LD The instruction can be connected directly to the left bus bar AND The instruction cannot be connected directly to the left bus bar OR The instruction can be connected directly to the left bus bar Symbol Option data format Equal Not equal Less than Less than or equal Greater than Greater than or equal F Single precision floating point data Code Mnemonic Name...

Page 679: ... FLOATING LESS THAN True if C1 C2 AND F AND FLOATING LESS THAN OR F OR FLOATING LESS THAN 332 LD F LOAD FLOATING LESS THAN OR EQUAL True if C1 C2 AND F AND FLOATING LESS THAN OR EQUAL OR F OR FLOATING LESS THAN OR EQUAL 333 LD F LOAD FLOATING GREATER THAN True if C1 C2 AND F AND FLOATING GREATER THAN OR F OR FLOATING GREATER THAN 325 LD F LOAD FLOATING GREATER THAN OR EQUAL True if C1 C2 AND F AND...

Page 680: ...n F Yields an ON condition Decimal value 4 294 967 296 Decimal value 3 5 Does not yield an ON condition Decimal value 2 3 Decimal value 5 566 555 656 FSTR 448 S C D S First source word C First control word D First destination word Variations Executed Each Cycle for ON Condition FSTR 448 Executed Once for Upward Differentiation FSTR 448 Executed Once for Downward Differentiation Not supported Immed...

Page 681: ...2767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C...

Page 682: ...1 2 3 4 5 6 15 87 0 2D 20 31 2E 32 33 45 2B 30 31 SP 1 2 3 E 0 0 15 87 0 D 20 31 32 34 00 2D 20 2E 33 00 20 2E 33 2B 30 00 2D 31 32 45 30 00 Decimal notation C 0000 hex 1 23456 Example 1 23456 Floating point data Scientific notation C 0001 hex 1 23E 00 Conversion to ASCII text Conversion to ASCII text Rounded off SP represents a space SP represents a space Stored in destination words beginning wit...

Page 683: ...zeroes ASCII 30 hex will added to the end of the source data A decimal point ASCII 2E hex is added if the number fractional digits is greater than 0 Spaces ASCII 20 hex are added if the integer part of the floating point data is shorter than the integer part of the result total number of characters sign digit decimal point fractional digits Fractional part Decimal point Storage of ASCII Text After...

Page 684: ...TR 448 converts the floating point data in D00001 and D00000 to decimal notation ASCII text and writes the ASCII text to the destination words beginning with D00100 The contents of the control words D00010 to D00012 specify the details on the data format decimal notation 7 characters total 3 fractional digits Name Label Operation Error Flag ER ON if the data in S 1 and S is not a valid floating po...

Page 685: ... CJ1M and CS1D CPU Units only 2E 32 2 00 1 0 1 0 1 0 0 0 0 1 1 1 0 0 1 0 0 0 1 1 1 1 1 0 1 0 1 0 0 1 1 1 FSTR D00000 D00010 D00100 000000 15 0 D00000 D00001 0000 Hex 0007 Hex 0003 Hex D00010 D00011 D00012 0 327457 30 0 33 3 37 7 D00100 D00101 D00102 D00103 0 3 2 7 4 5 7 20 Space 20 Space Decimal notation Total characters 7 characters Fractional digits 3 digits characters Conversion Rounded off Sto...

Page 686: ... stored in S and subsequent words in the following order leftmost byte of S rightmost byte of S leftmost byte of S 1 rightmost byte of S 1 etc FVAL 449 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition FVAL 449 Executed Once for Upward Differentiation FVAL 449 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification ...

Page 687: ...h the leftmost byte of S and continuing until a byte containing 00 hex is reached There must be a byte containing 00 hex within the first 25 bytes 15 0 7 8 00 SP SP 20 20 00 Decimal notation Digit 25 characters max The 7th and higher digits are ignored The sign decimal point and exponent characters are not counted as digits Any spaces 20 hex or zeroes 30 hex before the first digit are ignored Posi...

Page 688: ... at S are not 30 to 39 hex 0 to 9 ON if the first two digits of the exponential part do not con tain 45 and 2B hex E or 45 and 2D hex E integer and fractional parts in the source data starting at S are not 30 to 39 hex 0 to 9 ON if there are two or more exponential parts in the source data ON if the data is or after conversion ON is the are 0 characters in the text data ON if a byte containing 00 ...

Page 689: ...0 15 0 FVAL D00000 D00100 1 2 3 4 5 E 0 2 20 Space Conversion Storage Ignored Ignored MOVF 469 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition MOVF 469 Executed Once for Upward Differentiation MOVF 469 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Function block definitions Block program ar...

Page 690: ...2767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to FFFFFFFF binary Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S R D 1 D S S 1 Source words Destination words Name Lab...

Page 691: ... 32 bits as follows Instruction Mnemonic Function code Page DOUBLE FLOATING TO 16 BIT FIXD 841 657 DOUBLE FLOATING TO 32 BIT FIXLD 842 658 16 BIT TO DOUBLE FLOATING DBL 843 660 32 BIT TO DOUBLE FLOATING DBLL 844 661 DOUBLE FLOATING POINT ADD D 845 663 DOUBLE FLOATING POINT SUBTRACT D 846 665 DOUBLE FLOATING POINT MULTIPLY D 847 667 DOUBLE FLOATING POINT DIVIDE D 848 669 DOUBLE DEGREES TO RADIANS R...

Page 692: ...l numbers input in the display are automatically converted to the double precision floating point format shown above IEEE754 format and written to I O Memory Data written in the IEEE754 format is automatically converted to standard decimal format when monitored on the display It is not necessary for the user to be aware of the IEEE754 data format when reading and writing double precision floating ...

Page 693: ...ponent e 1 023 x 1 mantissa x 2 52 Example Sign Exponent 1 024 1 023 1 Mantissa 1 251 250 x 2 52 1 2 1 2 2 1 0 75 1 75 Value 1 75 x 21 3 5 Non normalized numbers Non normalized numbers express real numbers with very small absolute val ues The sign bit will be 0 for a positive number and 1 for a negative number The exponent e will be 0 and the real exponent will be 1 022 The mantissa f will be expr...

Page 694: ...tive infinity depending on the sign of the result Underflows will be output as either positive or negative zero depending on the sign of the result Illegal calculations will result in NaN Illegal calculations include adding infinity to a number with the opposite sign subtracting infinity from a number with the opposite sign multiplying zero and infinity dividing zero by zero or dividing infinity b...

Page 695: ...egrees is read from D00000 and the 4 digit BCD distance r is read from D01000 r re j θ 360 π Y 0 r θ X r A x y A rcos θ rsin θ 000000 BIN D00000 D00100 BIN D01000 D01000 SIN D00200 D00400 COS D00200 D00300 END F D01200 D00300 D10000 F D01200 D00400 D20000 FLT D00100 D00200 FLT D01000 D01200 RAD D00200 D00200 000000 BIN D00000 D00100 BIN D01000 D01000 SIND D00200 D00400 COSD D00200 D00300 END D D01...

Page 696: ...or x r cos θ is output to D10000 and D10001 b The value for y r sin θ is output to D20000 and D20001 Coordinate Floating point number Real number x 4116 59CF 3 4202015399933 y 405A E495 9 3969259262085 1 This program section converts the BCD data to double precision floating point data 64 bits IEEE754 format a The BIN 023 instructions convert the BCD data to binary and the DBL 843 in structions co...

Page 697: ...gram areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6140 CIO 0000 to CIO 6143 Work Area W000 to W508 W000 to W511 Holding Bit Area H000 to H508 H000 to H511 Auxiliary Bit Area A000 to A956 A448 to A959 Timer Area T0000 to T4092 T0000 to T4095 Counter Area C0000 to C4092 C0000 to C4095 DM Area D00000 to D32764 D00000 to D32767 EM Area without bank...

Page 698: ...tion is supported by CS1 H CJ1 H CJ1M and CS1D CPU Units only Ladder Symbol Variations Applicable Program Areas Operand Specifications S 3CH SCH DCH S 1CH S 2CH Floating point data 64 bits Signed binary data 16 bits Name Label Operation Error Flag ER ON if the source data S to S 3 is not a number NaN ON if the integer portion of the source data S to S 3 is not within the range of 32 768 to 32 767 ...

Page 699: ...C4092 C0000 to C4094 DM Area D00000 to D32764 D00000 to D32766 EM Area without bank E00000 to E32764 E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants...

Page 700: ...ward Differentiation DBL 843 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6140 Work Area W000 to W511 W000 to W508 Holding Bit Area H000 to H511 H000 to H508 Auxiliary Bit Area A000 to A959 A448 to A956 Ti...

Page 701: ...Converts a 32 bit signed binary value to double precision 64 bit floating point data and places the result in the specified destination words This instruction is supported by CS1 H CJ1 H CJ1M and CS1D CPU Units only Ladder Symbol Variations Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Are...

Page 702: ... to 15 777 215 0 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6140 Work Area W000 to W510 W000 to W508 Holding Bit Area H000 to H510 H000 to H508 Auxiliary Bit Area A000 to A958 A448 to A956 Timer Area T0000 to T4094 T0000 to T4092 Counter Area C0000 to C4094 C0000 to C4092 DM Area D00000 to D32766 D00000 to D...

Page 703: ...lt are 0 OFF in all other cases Negative Flag N ON if the result is negative OFF in all other cases D 845 D Au Ad Au First augend word Ad First addend word D First destination word Variations Executed Each Cycle for ON Condition D 845 Executed Once for Upward Differentiation D 845 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block progra...

Page 704: ...urn ON and the result will be output as 0 The various combinations of augend and addend data will produce the results shown in the following table Note 1 The results could be zero including underflows a numeral or 2 The Error Flag will be turned ON and the instruction will not be executed Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data...

Page 705: ...sult are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision floating point value Negative Flag N ON if the result is negative OFF in all other cases D 846 D Mi Su Mi First Minuend word Su Fi...

Page 706: ...nd subtrahend data will produce the results shown in the following table Note 1 The results could be zero including underflows a numeral or 2 The Error Flag will be turned ON and the instruction will not be executed EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D0000...

Page 707: ...e exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision floating point value Negative Flag N ON if the result is negative OFF in all other cases D 847 D ...

Page 708: ...produce the results shown in the following table Note 1 The results could be zero including underflows a numeral or 2 The Error Flag will be turned ON and the instruction will not be executed EM Area without bank E00000 to E32764 EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresse...

Page 709: ...Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision floating point value Negative Flag N ON if the result is negative OFF in all ot...

Page 710: ...n in the following table Note 1 The results could be zero including underflows a numeral or 2 The results will be zero for underflows 3 The Error Flag will be turned ON and the instruction will not be executed EM Area without bank E00000 to E32764 EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indir...

Page 711: ... Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision floating point value Negative Flag N ON if the result is negative OFF in all o...

Page 712: ...00 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D S 1CH D 1CH SCH DCH S 2CH D 2CH S 3CH D 3CH Result rad...

Page 713: ... Each Cycle for ON Condition DEGD 850 Executed Once for Upward Differentiation DEGD 850 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6140 Work Area W000 to W508 Holding Bit Area H000 to H508 Auxiliary Bit Area A000 to A956 A44...

Page 714: ...pose Calculates the sine of a double precision 64 bit floating point number in radians and places the result in the specified destination words This instruction is supported by CS1 H CJ1 H CJ1M and CS1D CPU Units only Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D S 1CH D 1CH SCH D...

Page 715: ...diate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6140 Work Area W000 to W508 Holding Bit Area H000 to H508 Auxiliary Bit Area A000 to A956 A448 to A956 Timer Area T0000 to T4092 Counter Area C0000 to C4092 DM Area D00000 to D32764 EM Area without bank E00000 to E32764 EM Area with bank En_0...

Page 716: ...ces the result in the specified destination words This instruction is supported by CS1 H CJ1 H CJ1M and CS1D CPU Units only Ladder Symbol Variations Applicable Program Areas R S Angle radian data R Result sine Name Label Operation Error Flag ER ON if the source data is not a number NaN ON if the absolute value of the source data exceeds 65 535 OFF in all other cases Equals Flag ON if both the expo...

Page 717: ...0 DOUBLE RADIANS TO DEGREES DEGD 850 The following diagram shows the relationship between the angle and result Area S D CIO Area CIO 0000 to CIO 6140 Work Area W000 to W508 Holding Bit Area H000 to H508 Auxiliary Bit Area A000 to A956 A448 to A956 Timer Area T0000 to T4092 Counter Area C0000 to C4092 DM Area D00000 to D32764 EM Area without bank E00000 to E32764 EM Area with bank En_00000 to En_32...

Page 718: ... cases Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF Unchanged Underflow Flag UF Unchanged Negative Flag N ON if the result is negative OFF in all other cases TAND 853 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition TAND 853 Executed Once for Upward Differentiation TAND 853 Executed Once...

Page 719: ...9 DOUBLE DEGREES TO RADIANS RADD 849 or 3 16 10 DOUBLE RADIANS TO DEGREES DEGD 850 If the absolute value of the result is greater than the maximum value that can be expressed as floating point data the Overflow Flag will turn ON and the result will be output as The following diagram shows the relationship between the angle and result Indirect DM EM addresses in binary D00000 to D32767 E00000 to E3...

Page 720: ...ceeds 65 535 OFF in all other cases Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision 64 bit floating point value Underflow Flag UF Unchanged Negative Flag N ON if the result is negative OFF in all other cases ASIND 854 S D S First source word D First...

Page 721: ...xecuted The result is output to words D to D 3 as an angle in radians within the range of π 2 to π 2 The following diagram shows the relationship between the input data and result EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_0000...

Page 722: ... ON if the source data is not a number NaN ON if the absolute value of the source data exceeds 1 0 OFF in all other cases Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF Unchanged Underflow Flag UF Unchanged Negative Flag N ON if the result is negative OFF in all other cases ACOSD 855 S D S First source word D First destination word Vari...

Page 723: ... executed The result is output to words D to D 3 as an angle in radians within the range of 0 to π The following diagram shows the relationship between the input data and result EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 ...

Page 724: ...he source data is not a number NaN ON if the absolute value of the source data exceeds 1 0 OFF in all other cases Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF Unchanged Underflow Flag UF Unchanged Negative Flag N Unchanged ATAND 856 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition ATAND ...

Page 725: ...gle in radians within the range of π 2 to π 2 The following diagram shows the relationship between the input data and result Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registe...

Page 726: ...ses Equals Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF Unchanged Underflow Flag UF Unchanged Negative Flag N ON if the result is negative OFF in all other cases SQRTD 857 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition SQRTD 857 Executed Once for Upward Differentiation SQRTD 857 Executed Once...

Page 727: ... is greater than the maximum value that can be expressed as floating point data the Overflow Flag will turn ON and the result will be output as The following diagram shows the relationship between the input data and result Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to ...

Page 728: ...ls Flag ON if both the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision 64 bit floating point value Underflow Flag UF Unchanged Negative Flag N Unchanged EXPD 858 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition EXPD 858 Executed...

Page 729: ...s If the absolute value of the result is less than the minimum value that can be expressed as floating point data the Underflow Flag will turn ON and the result will be output as 0 Note The constant e is 2 718282 The following diagram shows the relationship between the input data and result Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect ...

Page 730: ...in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision 64 bit floating point value Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision 64 bit floating point value Negative Flag N Unchanged LOGD 859 S D S First source word D First destination word Variations Executed Each C...

Page 731: ...n be expressed as floating point data the Overflow Flag will turn ON and the result will be output as Note The constant e is 2 718282 The following diagram shows the relationship between the input data and result Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n...

Page 732: ...oth the exponent and mantissa of the result are 0 OFF in all other cases Overflow Flag OF ON if the absolute value of the result is too large to be expressed as a double precision 64 bit floating point value Underflow Flag UF Unchanged Negative Flag N ON if the result is negative OFF in all other cases PWRD 860 B E D B First base word E First exponent word D First destination word Variations Execu...

Page 733: ...2767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area B E D S1 1 S1 S1 3 S1 2 D 1 D D 3 D 2 S2 1 S2 S2 3 S2 2 Exponent d...

Page 734: ...t input comparison instructions Ladder Symbol Variations Applicable Program Areas Operand Specifications Underflow Flag UF ON if the absolute value of the result is too small to be expressed as a double precision floating point value Negative Flag N ON if the result is negative OFF in all other cases Name Label Operation S1 S2 S1 Comparison data 1 S2 Comparison data 2 Symbol options Variations Cre...

Page 735: ...nstructions to control the execution of subsequent instructions Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S1 S2 Input type Operation LD The instruction can be c...

Page 736: ...OUBLE FLOATING EQUAL 336 LD D LOAD DOUBLE FLOATING NOT EQUAL True if C1 C2 AND D AND DOUBLE FLOATING NOT EQUAL OR D OR DOUBLE FLOATING NOT EQUAL 337 LD D LOAD DOUBLE FLOATING LESS THAN True if C1 C2 AND D AND DOUBLE FLOATING LESS THAN OR D OR DOUBLE FLOATING LESS THAN 338 LD D LOAD DOUBLE FLOATING LESS THAN OR EQUAL True if C1 C2 AND D AND DOUBLE FLOATING LESS THAN OR EQUAL OR D OR DOUBLE FLOATING...

Page 737: ... C1 C2 OFF in all other cases Negative Flag N Unchanged Name Label Operation D D00100 D00200 000000 005000 34580 14876 3 4580E 48 1 4876E 48 1 0 0 0 1 0 1 1 0 1 0 0 0 1 0 0 1 1 1 0 0 1 1 1 0 1 1 0 1 1 0 0 1 0 1 0 1 0 0 1 1 1 1 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 1 1 15 0 S1 D00100 S1 1 D00101 S1 2 D00102 S1 3 D00103 0 1 1 1 1 0 0 1 0 0 1 1 1 1 1 0 1 0 1 0 1 0 0 0 0 1 0 1 1 0 0 0 1 1 0 0 1 1 0 1 ...

Page 738: ...T RECORD NUMBER GETR 636 720 DATA SEARCH SRCH 181 722 SWAP BYTES SWAP 637 725 FIND MAXIMUM MAX 182 727 FIND MINIMUM MIN 183 731 SUM SUM 184 735 FRAME CHECKSUM FCS 180 738 STACK NUMBER OUTPUT SNUM 638 742 STACK DATA READ SREAD 639 744 STACK DATA OVERWRITE SWRIT 640 747 STACK DATA INSERT SINS 641 750 STACK DATA DELETE SDEL 642 753 Group Purpose Instructions Stack Operate FIFO first in first out or L...

Page 739: ...erwrite insert and delete data elements in a stack For example when items are being handled on a conveyor these instructions can add remove or change a data element in the stack that corresponds to an item on the conveyor PUSH 632 Stores data in the address indicated by the stack pointer and increments the pointer by one FIFO 633 Reads first oldest word of data that was stored in the stack shifts ...

Page 740: ...in the stack The offset value indicates the location of the desired word the number of words before the cur rent pointer position A B A B Data region Pointer Stack A is the last word stored in the stack Pointer Stack Data region Decrements the pointer by one and reads content of A A A B C A B C Data region Pointer Pointer Unchanged Last word of data in stack Stack Data region Data in pointer posit...

Page 741: ...fore the current pointer position M A B C M B C Stack Data region Pointer Pointer Unchanged Last word of data in stack Stack Data region Pointer to last word in stack Data in pointer position n n 3 in this example Pointer Overwrites data at pointer position n n 3 in this example n n 3 M A B C M A B C Stack Data region Pointer Pointer Incremented by 1 Last word of data in stack Stack Data region Po...

Page 742: ...data Table data stored in the specified I O memory are can be registered as the table area using the DIM instruction Up to 16 separate tables can be defined with table numbers 0 to 15 A A B C B C C Stack Data region Pointer Pointer Decre mented by 1 Last word of data in stack Stack Data region Pointer to last word in stack Data in pointer position n n 3 in this example Pointer Deletes the data ele...

Page 743: ...ACK SSET 630 Purpose Defines a stack of the specified length beginning at the specified word Ladder Symbol Variations Applicable Program Areas Operands TB through TB 3 Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer the PLC memory address of the next word to be overwritten by PUSH 632 Record Record Record Tabl...

Page 744: ...t 4 digits PC memory address of the last word in the stack rightmost 4 digits 15 0 TB 4 TB N 1 Data storage region Area TB N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to ...

Page 745: ...tomatically updated when PUSH 632 FIFO 633 or LIFO 634 is executed Normally users need not be concerned about the stack control word When accessing the contents of the stack other than by using the above instructions set the stack pointer value using the Index Register IR for indirect referencing Flags Precautions The minimum value for the number of words in the stack N is 5 because N includes the...

Page 746: ...ack pointer the PLC memory address of the next word to be overwritten by PUSH 632 10 PC memory address Last word in stack Stack pointer PC memory address of last word in stack Stack pointer 10 words PUSH 632 TB S TB First stack address S Source word Variations Executed Each Cycle for ON Condition PUSH 632 Executed Once for Upward Differentiation PUSH 632 Executed Once for Downward Differentiation ...

Page 747: ...gits 15 0 TB 4 TB N 1 Data storage region Area TB S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00...

Page 748: ...e stack must be defined in advance with SSET 630 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area TB S m n n m D D 1 D 2 D 3 S m m 1 n n m 1 D D 1 D 2 D 3 A A A PLC memory address PLC memory Write A Pointer Increment pointer by 1 Pointer Name Label Operation Error Flag ER ON if the addre...

Page 749: ... address Write A Last word in stack Stack pointer PC memory address of last word in stack Stack pointer A PC memory address After the data is written to D00007 the stack pointer is incremented by one PC memory address of last word in stack Stack pointer Last word in stack FIFO 633 TB D TB First stack address D Destination word Variations Executed Each Cycle for ON Condition FIFO 633 Executed Once ...

Page 750: ... rightmost 4 digits PC memory address of the last word in the stack leftmost 4 digits Stack pointer rightmost 4 digits Stack pointer leftmost 4 digits 15 0 TB 4 TB N 1 Data storage region Area TB D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area ...

Page 751: ...irst in first out basis FIFO 633 reads the beginning data from the stack and deletes this data to move the next one forward Flags Precautions The stack must be defined in advance with SSET 630 Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area TB D m 1 TB TB 1 TB...

Page 752: ... of data written to the specified stack the newest data in the stack Ladder Symbol Variations Applicable Program Areas TB D D00300 TB Read by FIFO 633 Stack pointer PC memory address of last word in stack Last word in stack Stack pointer D D00300 1 Last word in stack Stack pointer PC memory address of last word in stack Stack pointer LIFO 634 TB D TB First stack address D Destination word Variatio...

Page 753: ...gits PC memory address of the last word in the stack leftmost 4 digits PC memory address of the last word in the stack rightmost 4 digits 15 0 TB 4 TB N 1 Data storage region Area TB D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank ...

Page 754: ...r indicates the address next to the last data Flags Precautions The stack must be defined in advance with SSET 630 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area TB D TB TB 1 TB 2 TB 3 TB TB 1 TB 2 TB 3 m 1 m 1 m 1 Reading A is left unchanged Stack pointer PC memory address PC memory a...

Page 755: ...declaring the length of each record and the number of records Up to 16 record tables can be defined Ladder Symbol Variations 1 TB Last word in stack Stack pointer Stack pointer PC memory address of last word in stack D D00300 Stack pointer PC memory address of last word in stack Read by LIFO 634 Last word in stack Stack pointer DIM 631 N LR NR TB N Table number LR Length of each record NR Number o...

Page 756: ...nged once the region has been declared as records Use DIM 631 in combination with SETR 635 SET RECORD NUMBER or GETR 636 GET RECORD NUMBER to simplify the calculation of Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N LR NR TB CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer A...

Page 757: ...ister GETR 636 outputs the record number of the record that includes the specified Index Register value PLC memory address Flags Precautions Records in a registered table are identified by their record numbers which range from 0 to NR 1 Depending on the settings for the record length LR and number of records NR it is possible that a single table from TB and TB LR NR 1 will overlap two data areas V...

Page 758: ...able number R Record number D Destination Index Register Variations Executed Each Cycle for ON Condition SETR 635 Executed Once for Upward Differentiation SETR 635 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N R D CIO Area CIO 0000 to CIO 6143 Work Area ...

Page 759: ...emory address of the first word of record 3 of table number 10 and stores this address in Index Register IR11 Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area N R D R IR SETR 635 writes the PC memory address m of the first word of record R to Index Register D PC memory addres...

Page 760: ...ch Cycle for ON Condition GETR 636 Executed Once for Upward Differentiation GETR 636 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N IR D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Tim...

Page 761: ...lowing example GETR 636 finds the record number of the record that contains the PLC memory address in Index Register IR11 and writes this record number to D01000 Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area N IR D IR n GETR 636 writes the record number of the record that ...

Page 762: ...ta area R1 First word in range R1 specifies the first word in the search range The words from R1 to R1 C 1 are searched for the desired data C is the number of words set in C SRCH 181 C R1 Cd C First control word R1 First word in range Cd Comparison data Variations Executed Each Cycle for ON Condition SRCH 181 Executed Once for Upward Differentiation SRCH 181 Executed Once for Downward Differentia...

Page 763: ... Work Area W000 to W510 W000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A958 A000 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM a...

Page 764: ...words that have the same content as D00200 The PLC memory address of the first word containing a match is written to IR00 and the total number of matches is written to DR00 Name Address Operation IR00 Output for Background Execution A595 and A596 When an index register is specified as the out put for an instruction processed in the back ground A595 and A596 receive the output instead of IR00 A595 ...

Page 765: ...icable Program Areas Operands N Number of words N specifies the number of words in the range and must be 0001 to FFFF hexadecimal or 1 to 65 535 R1 First word in range R1 specifies the first word in the range R1 and R1 N 1 must be in the same data area D00200 8000000A R1 Cd 10067 00010067 0003 Search Number of matches Number of matches PC memory address SWAP 637 N R1 N Number of words R1 First wor...

Page 766: ...00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0001 to FFFF binary or 1 to 65 535 Data Registers DR00 to DR15 Index Registers Indirect addre...

Page 767: ...iations Applicable Program Areas Operands C and C 1 Control words C specifies the number of words in the range bit 15 of C 1 indicates whether the data will be treated as signed binary or unsigned binary and bit 14 of C 1 indicates whether or not to output the PLC memory address of the word that contains the maximum value to IR00 Note C and C 1 must be in the same data area 10 N R1 to to to to MAX...

Page 768: ...0 C 15 0 14 0 C 1 13 00 0000 0000 0000 Output selection Data type Number of words in range 0 Does not output address to IR00 1 Outputs address to IR00 0 Unsigned binary data 1 Signed binary data R1 R1 C 1 15 0 to Search range Area C R1 D CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W510 W000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A958 ...

Page 769: ... Words Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to ...

Page 770: ...s ON in the following example MAX 182 searches the 10 word range beginning at D00200 for the maximum value The maxi mum value is written to D00300 and the PLC memory address of the word containing the maximum value is written to IR00 Name Label Operation Error Flag ER ON if the content of C is not within the specified range of 0001 through FFFF ON if the Communications Port Enabled Flag for the co...

Page 771: ...ck ground execution Ladder Symbol Variations C D00100 C 1 D00101 D D00300 R1 1 R1 2 1 3 000100CA 100CA 0 0 0 A 10 words Number of words Always 0 1 Outputs address to IR00 1 Treats data as signed binary Decimal equivalent Max value PC memory address MIN 183 C R1 D C First control word R1 First word in range D Destination word Variations Executed Each Cycle for ON Condition MIN 183 Executed Once for...

Page 772: ...ords from R1 to R1 C 1 are searched for the minimum value C is the number of words specified in C Note R1 and R1 C 1 must be in the same data area Operand Specifications Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK C 1 Data type Index Register output 0000 Unsigned binary No 4000 Unsigned binary Yes 8000 Signed binary No C000 Signed binary Yes 15 0 C 15 0 14 0 C 1 ...

Page 773: ... Series PLC Programming Manual W394 for details Auxiliary Bit Area A000 to A958 A000 to A959 A448 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4094 C0000 to C4095 DM Area D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32766 E00000 to E32767 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary ...

Page 774: ...minimum value is written to IR00 Name Address Operation IR00 Output for Background Execution A595 and A596 When an index register is specified as the out put for an instruction processed in the back ground A595 and A596 receive the output instead of IR00 A595 contains the rightmost digits and A596 contains the leftmost digits ER AER Flag for Background Execution A39510 This flag is turned ON if an...

Page 775: ...ned binary 1 Outputs address to IR00 Always 0 PC memory address Decimal equivalent Min value 10 words Number of words SUM 184 C R1 D C First control word R1 First word in range D First destination word Variations Executed Each Cycle for ON Condition SUM 184 Executed Once for Upward Differentiation SUM 184 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification N...

Page 776: ...tput to D 1 and D The leftmost four digits are stored in D 1 and the rightmost four digits are stored in D Operand Specifications 15 0 C 15 0 14 0 C 1 13 12 11 0000 0000 0000 Data type Effective if bit 14 is 0 Data type Units Starting byte Effective if bit 13 is 1 0 Unsigned binary data 1 Signed binary data 0 Binary 1 BCD 0 Words 1 Bytes 0 Leftmost byte 1 Rightmost byte Number of words bytes in ra...

Page 777: ...12 1 or the leftmost byte of R1 bit 12 0 Note SUM 184 can be processed in the background Refer to the SYSMAC CS CJ NSJ Series PLC Programming Manual W394 for details EM Area without bank E00000 to E32766 E00000 to E32767 E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E0...

Page 778: ... the BCD data has been specified but the range contains binary data ON if the Communications Port Enabled Flag for the com munications port number specified as the Com Port num ber for Background Execution is OFF when background processing is specified OFF in all other cases Equals Flag ON if the result is 0000 OFF in all other cases Negative Flag N ON if bit 15 is ON in the result OFF in all othe...

Page 779: ...e The length of the range depends on the number of units as well as the starting byte if bytes are being used in the calculation Note All of the words in the calculation range must be in the same data area FCS 180 C R1 D C First control word R1 First word in range D First destination word Variations Executed Each Cycle for ON Condition FCS 180 Executed Once for Upward Differentiation FCS 180 Execu...

Page 780: ...ytes of data In this case bit 12 determines whether the calculation starts with the rightmost byte of R1 bit 12 1 or the leftmost byte of R1 bit 12 0 Area C R1 D CIO Area CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W510 W000 to W511 Holding Bit Area H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A958 A000 to A959 A448 to A959 Timer Area T0000 to T4094 T0000 to T4095 Counter A...

Page 781: ...conversion FCS value Name Label Operation Error Flag ER ON if the content of C is not within the specified range of 0001 through FFFF ON if the Communications Port Enabled Flag for the com munications port number specified as the Com Port num ber for Background Execution is OFF when background processing is specified OFF in all other cases C D00300 C 1 D00301 R1 D D00200 0 2 0 4 0 6 0 8 0 0 3 0 0 ...

Page 782: ...d to store data SNUM 638 TB D TB First stack address D Destination word Variations Executed Each Cycle for ON Condition SNUM 638 Executed Once for Upward Differentiation SNUM 638 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK TB 0 15 TB 1 0 15 TB 2 0 15 TB 3 0 1...

Page 783: ...00 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15...

Page 784: ...riations Applicable Program Areas Operands TB through TB 3 Stack control words The first four words of the stack contain the PLC memory address of the last word in the stack and the stack pointer the PLC memory address of the next available word in the stack SNUM D00000 D00300 000000 D00000 D00001 D00002 D00003 D00004 D00005 D00006 D00007 D00008 D00009 D D00300 0003Hex PLC memory address Stack poi...

Page 785: ...tial value is the leftmost 4 digits of the PLC memory address for TB 4 15 0 TB 4 TB N 1 Data storage region Area TB C D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_0...

Page 786: ...D 639 reads the data in the specified word in the stack starting at D00000 and outputs the data to D00100 In this case the stack pointer indicates D00007 and the offset value is 3 so the data is read from D00004 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area TB C D A A B C TB TB 1 TB 2...

Page 787: ...7 D00008 D00009 A D00000 D00001 D00002 D00003 D00004 D00005 D00006 D00007 D00008 D00009 D00100 A 3 PLC memory address Stack pointer Last word in stack Stack pointer Stack pointer Last word in stack PLC memory address of last word in the stack The stack pointer position remains unchanged after the data is read PLC memory address of last word in the stack Stack pointer SWRIT 640 TB C S TB First stac...

Page 788: ...digits Stack pointer rightmost 4 digits Initial value is the rightmost 4 digits of the PLC memory address for TB 4 Stack pointer leftmost 4 digits Initial value is the leftmost 4 digits of the PLC memory address for TB 4 15 0 TB 4 TB N 1 Data storage region Area TB C S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Ti...

Page 789: ...s Examples When CIO 000000 is ON in the following example SWRIT 640 writes the data in D00100 to the specified word in the stack starting at D00000 In this Constants 0001 to FFFB Hexadecimal 0000 to FFFF Hexadecimal Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 A...

Page 790: ... D00000 D00001 D00002 D00003 D00004 D00005 D00006 D00007 D00008 D00009 A D00000 D00001 D00002 D00003 D00004 D00005 D00006 D00007 D00008 D00009 D00100 A 3 PLC memory address Stack pointer Last word in stack Stack pointer Stack pointer Last word in stack PLC memory address of last word in the stack The stack pointer position remains unchanged after the data is written Overwrite Stack pointer PLC mem...

Page 791: ...digits Stack pointer rightmost 4 digits Initial value is the rightmost 4 digits of the PLC memory address for TB 4 Stack pointer leftmost 4 digits Initial value is the leftmost 4 digits of the PLC memory address for TB 4 15 0 TB 4 TB N 1 Data storage region Area TB C S CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A959 Ti...

Page 792: ...ter than the address of the last word in the stack TB 1 and TB when SINS 641 is executed a stack overflow error will occur and the source data will not be inserted Constants 0001 to FFFB Hexadecimal 0000 to FFFF Hexadecimal Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 t...

Page 793: ...estination word and shifts the remaining the data in the stack upward The offset value indicates the location of the desired data ele ment how many data elements before the current pointer position This instruction is supported by CS1 H CJ1 H CJ1M and CS1D CPU Units only Ladder Symbol SINS D00000 0003 D00100 000000 B C D D00000 D00001 D00002 D00003 D00004 D00005 D00006 D00007 D00008 D00009 A B C D...

Page 794: ...shing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK TB 0 15 TB 1 0 15 TB 2 0 15 TB 3 0 15 PLC memory address of the last word in the stack rightmost 4 digits PLC memory address of the last word in the stack leftmost 4 digits Stack pointer rightmost 4 digits Initial value is the rightmost 4 digits of the PLC memory address for TB 4 Stack ...

Page 795: ...h bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0001 to FFFB Hexadecimal Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR1...

Page 796: ... word and the stack pointer is decremented from D00007 to D00006 Name Label Operation Error Flag ER ON if the content of the stack pointer TB 3 and TB 2 is less than or equal to the PLC memory address of first word in the data region of the stack TB 4 This is a stack underflow error ON if the offset value specified in C is 0 or greater than the maximum data region size FFFB hex OFF in all other ca...

Page 797: ... ON Condition PID 190 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK Not allowed 15 8 0 7 C 5 0 3 2 1 4 PID starting integral manipulated variable designation Set value SV Proportional band P Integral ...

Page 798: ...e manipulated variable in order to avoid the adverse effects of sud den changes When the execution condition turns ON the PV for the specified sampling period is entered and processing is performed Area S C D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6105 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W473 W000 to W511 Holding Bit Area H000 to H511 H000 to H473 H000 to H511 Auxiliary Bit ...

Page 799: ...ection of proportional operation can be designated as either forward or reverse The upper and lower limits of the manipulated variable output can be desig nated The sampling period can be designated in units of 10 ms 0 01 to 99 99 s but the actual PID action is determined by a combination of the sampling period and the time of PID 190 instruction execution with each cycle The timing of enabling ch...

Page 800: ...r limit At this time the results are output at the lower limit Within the PID parameters C to C 38 the only value that can be changed while the input condition is ON is the set value for C If any other value is changed be sure to turn the input condition from OFF to ON to enable the new value Example At the rising edge of CIO 000000 OFF to ON the work area in D00209 to D00238 is initialized accord...

Page 801: ...ID control Reverse operation bit 00 0 PID constant updating timing input condition is ON bit 01 0 Manipulated variable output designation 0 bit 03 0 2 PID parameter 0 65 bits 04 to 15 000 hex Manipulated variable output range 12 bits bits 00 to 03 4 hex Integral derivative constants time designation bits 04 to 07 9 hex Input range 12 bits bits 08 to 11 4 hex Manipulated variable limit control No b...

Page 802: ...Proportional band P 0 1 to 999 9 Integral constant Tik 1 to 8191 9999 No integral action for sampling period multiple 9999 Derivative constant Tdk 0 to 8191 No derivative action for sampling period multiple 0 Set value SV 0 to 65535 Valid up to maximum value of input range Measured value PV 0 to 65535 Valid up to maximum value of input range Manipulated variable MV 0 to 65535 Valid up to maximum v...

Page 803: ...Sets the period for executing the PID action 0001 to 270F hex 1 to 9999 0 01 to 99 99 s in units of 10 ms Not allowed Bits 04 to 15 of C 5 2 PID parameter α The input filter coefficient Nor mally use 0 65 i e a setting of 000 The filter efficiency decreases as the coefficient approaches 0 000 hex α 0 65 Setting from 100 to 163 hex means that the value of the right most two digits is set from α 0 0...

Page 804: ... variable when PID control is started i e when the input turns ON Bit 14 0 and bit 13 0 Start from same integral manipu lated value as manipulated vari able output designation Pre Ver 4 0 operation Bit 14 0 or 1 and bit 13 1 Bumpless operation i e start from an integral manipulated variable that will not abruptly change the manipulated vari able output and result in a con tinuous change Bit 14 1 a...

Page 805: ...V and within that band the manipulated vari able MV is made proportional to the deviation An example for reverse oper ation is shown in the following illustration If the proportional action is used and the present value PV becomes smaller than the proportional band the manipulated variable MV is 100 i e the maximum value Within the proportional band the MV is made proportional to the deviation the...

Page 806: ...original status A correction is executed with the manipulated variable made proportional to the incline derivative coefficient caused by the deviation The strength of the derivative action is indicated by the derivative time which is the time required for the manipulated variable of the derivative action to reach the same level as the manipulated variable of the proportional action with respect to...

Page 807: ...ol directions In either direction the MV increases as the difference between the SV and the PV increases Forward action MV is increased when the PV is larger than the SV Reverse action MV is increased when the PV is smaller than the SV 0 0 0 0 Ramp response Step response PD action P action D action Td Derivative time Manipulated variable Deviation Manipulated variable Deviation Derivative Action P...

Page 808: ...n operation is tied up by overshooting and undershooting it is probably because integral action is too strong The hunting will be reduced if the integral time is increased or the propor tional band is enlarged If the period is short and hunting occurs it may be that the control system response is quick and the derivative action is too strong In that case set the derivative action lower SV SV Outpu...

Page 809: ...1D CPU Units only Ladder Symbol Variations Applicable Program Areas PIDAT 191 S C D S Input word C First parameter word D Output word Variations Executed Each Cycle for ON Condition PIDAT 191 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subrouti...

Page 810: ... Manipulated variable output limit control C 7 C 8 0 15 C 11 C 40 C 9 C 10 0 15 0 15 12 14 13 0 0 0 Manipulated variable output lower limit Manipulated variable output upper limit Work area 30 words Cannot be used by user AT Command Bit AT Calculation Gain Limit cycle Hysteresis Area S C D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6105 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W473 W...

Page 811: ...ges When the execution condition turns ON the PV for the specified sampling period is entered and processing is performed Autotuning The status of the AT Command Bit bit 15 of C 9 is checked every cycle If this control bit is turned ON in a given cycle PIDAT 191 will begin autotuning the PID constants The changes in the SV will not be reflected while autotun ing is being performed The limit cycle ...

Page 812: ...s interrupted PID Control The number of valid input data bits within the 16 bits of the PV input S is designated by the input range setting in C 6 bits 08 to 11 For example if 12 bits 4 hex is designated for the input range the range from 0000 hex to 0FFF hex will be enabled as the PV Values greater than 0FFF hex will be regarded as 0FFF hex The set value range also depends on the input range Meas...

Page 813: ...od in the PID calculation This setting also allows the PID constants to be adjusted manually after autotuning Of the PID parameters C to C 38 only the following parameters can be changed when the execution condition is ON When any other values have been changed be sure to change the execution condition from OFF to ON to enable the new settings Set value SV in C Can be changed during PID control on...

Page 814: ... in all other cases Name Label Operation Control data Item Contents Setting range Change with ON input condition C Set value SV The target value of the process being controlled Binary data of the same number of bits as specified for the input range Allowed C 1 Proportional band The parameter for P action expressing the proportional con trol range total control range 0001 to 270F hex 1 to 9999 0 1 ...

Page 815: ...in a con tinuous change Bit 14 1 and bit 13 0 Start with integral manipulated variable 0 Bit 12 of C 6 Manipulated vari able output limit control Determines whether or not limit control will apply to the manipu lated variable output 0 Disabled no limit control 1 Enabled limit control Bits 08 to 11 of C 6 Input range The number of input data bits 0 8 bits 5 13 bits 1 9 bits 6 14 bits 2 10 bits 7 15...

Page 816: ...autotuning Auto tuning can be started while PIDAT 191 is being exe cuted This bit is turned OFF auto matically when autotuning is completed Autotuning will be interrupted if the AT Command Bit is turned OFF manually In this case the PID constants will be enabled if they were already calculated when autotuning was inter rupted As a Control Bit 0 1 Executes autotuning 1 0 Interrupts autotuning PID 1...

Page 817: ...0 5 s Reverse operation bit 00 0 PID constant change enable setting OFF bit 01 0 set value manipulated variable output 50 bit 03 1 2 PID parameter 0 65 bits 04 to 15 000 hex Manipulated variable output range 12 bits bits 00 to 03 4 hex Integral derivative constant time designation bits 04 to 07 9 hex Input range 12 bits bits 08 to 11 4 hex Manipulated variable output limit control disabled bit 12 ...

Page 818: ...pting Autotuning Before Completion Autotuning can be interrupted by turning bit 15 of D00209 C 9 from ON to OFF PID control will be restarted with the P I and D constants that were in effect before autotuning was started CIO 000000 PV SV MV PID 0010 D00200 0020 000000 S C D PID control and autotuning start Calculated PID constants are set PID control AT executing Bit 15 of D00209 Time Time CIO 000...

Page 819: ...CIO 6143 CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W510 W000 to W511 Holding Bit Area H000 to H511 H000 to H510 H000 to H511 Auxiliary Bit Area A000 to 959 A000 to A958 A448 to A959 Timer Area T0000 to T4095 T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4094 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32766 D00000 to D32767 EM Area withou...

Page 820: ...or equal to the lower limit C and less than or equal to the upper limit C 1 the input data S will be output to D Flags Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S C D C Lower limit data minimum output data C 1 Upper limit data maximum output data C 1 C Lower limit Upper limit Name...

Page 821: ...e Flag will turn ON Example If D00100 is 0050 hex 80 then 0064 hex 100 will be output to D00300 because 80 is less than the lower limit of 100 If D00100 is 00C8 hex 200 then 0064 hex 100 will be output to D00300 because 200 is within the upper and lower limits If D00100 is 012C hex 300 then 015E hex 350 will be output to D00300 because 350 is greater than the upper limit of 300 3 18 4 DEAD BAND CO...

Page 822: ...W000 to W510 W000 to W511 Holding Bit Area H000 to H511 H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A959 A000 to A958 A448 to A959 Timer Area T0000 to T4095 T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4094 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32766 E00000 to E32767 EM Area with ba...

Page 823: ...data S is greater than the upper limit the Greater Than Flag will turn ON If the output word D is 0000 hex the Equals Flag will turn ON If the input data S is less than the lower limit the Less Than Flag will turn ON If the status of the leftmost bit of the output word D is 1 the Negative Flag will turn ON Example If D00100 is 00B4 hex 180 then 180 200 FFEC hex 20 will be output to D00300 because ...

Page 824: ... Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area S C D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W510 W000 to W511 Holding Bit Area H000 to H511 H000 to H510 H000 to H511 Auxiliary Bit Area A000 to...

Page 825: ... If the output data is smaller than the 8000 hex or if is greater than 7FFF the sign will be reversed For example for a negative bias value of FF00 hex and input data of 8000 hex the output data will be as follows 8000 hex 32768 FF00 hex 256 7F00 hex 32512 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary ...

Page 826: ...ue is less than 0 and the resulting value will be stored in D00300 If the value of D00100 is 0 then 0000 hex will be stored in D00300 If the value of D00100 is greater than 0 then a bias of 100 will be applied and the resulting value will be stored in D00300 Name Label Operation Error Flag ER ON if the upper limit is less than the lower limit OFF in all other cases Greater Than Flag ON if the inpu...

Page 827: ...io 0000 to 2710 hex 0 00 to 100 00 Input manipulated variable See note 0000 to FFFF hex 0 to 65 535 max Bits 00 to 03 of C specify the manipulated variable range i e the number of valid bits in the manipulated variable Specify the same number of bits as specified for the output range setting in PID 190 Note If S is a manipulated variable specify the word containing the manip ulated variable output...

Page 828: ...R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6137 CIO 000000 to CIO 614315 Work Area W000 to W511 W000 to W505 W00000 to W51115 Holding Bit Area H000 to H511 H000 to H505 H00000 to H51115 Auxiliary Bit Area A000 to 959 A000 to A953 A44800 to A95915 Timer Area T0000 to T4095 T0000 to T4089 Counter Area C0000 to C4095 C0000 to C4089 DM Area D00000 to D32767 D00000 to D32761 EM Area without bank E...

Page 829: ... perform time proportional control of a heater proportional control of the ON OFF ratio Combining TPO 685 with a PID Control Instruction When combining TPO 685 with a PID control instruction the manipulated variable input is divided by the manipulated variable range to calculate the duty ratio that duty ratio is converted to a time proportional output and pulses are output In this case set the sam...

Page 830: ... ratio Setting range for S 0000 to 2710 hex 0 00 to 100 00 1 hex Manipulated variable Setting range for S 0000 to FFFF hex 0 to 65 535 The maximum setting depends on the MV range set with bits 00 to 03 of C Allowed 08 to 11 Input read timing Specifies the input read timing 0 hex Use the beginning value of the control period 1 hex Use lower value 2 hex Use higher value 3 hex Continuous adjustment A...

Page 831: ...g diagrams show the operation of each input read timing setting Input time setting 0 Use the beginning value of the control period Input read timing Description 0 Use the beginning value of the control period The duty ratio input is read at the beginning of the control period and the ratio cannot be changed during the control period 1 Use lower value If the duty ratio input falls below the duty ra...

Page 832: ...g overshooting when using time proportional control to control heating and using a relatively long control period 100 a 0 45 s a 0 55 s a 0 80 s 80 70 55 0 a 0 20 s 70 target is kept Control period a Control period a Time Output Duty ratio MV MV range 70 target raised to 80 If the duty ratio rises above the initial value early enough the duty ratio will be adjusted and the output will be turned ON...

Page 833: ...tio will be adjusted and the output will be turned OFF sooner If the duty ratio rises again after that the ratio will be adjusted again and the output will be turned ON This process is repeated continuously Use this setting to improve responsiveness when the control period is relatively long and the duty ratio changes quickly This setting is also appropriate for lighting or power applications that...

Page 834: ...00000 TPO D00000 D05000 002001 S C D D00200 D00201 D00206 D05000 S C R 4 4 1 PV input PID parameters Manipulated variable Manipulated variable Parameters Pulse output Set value SV Proportional band P When CIO 000000 goes from OFF to ON PID 190 reads the parameters performs the PID calculation with the PV input in CIO 0010 and outputs the manipulated variable MV to D00000 TPO 685 calculates the dut...

Page 835: ...uty ratio input read initial value and enable output limit function Control period 1 00 s Output lower limit 20 00 Output upper limit 80 00 0 to 100 00 Do not set Do not set Do not set 0 to 2710 hex TPO 685 takes the duty ratio in D00010 converts that duty ratio to a time proportional output and outputs the pulse output to bit 00 of CIO 0001 SCL 194 S P1 R S Source word P1 First parameter word R R...

Page 836: ...Area H000 to H511 H000 to H508 H000 to H511 Auxiliary Bit Area A000 to A959 A000 to A956 A448 to A959 Timer Area T0000 to T4095 T0000 to T4092 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4092 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32764 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32764 E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C En_00...

Page 837: ...results of analog signal conversion values from Analog Input Units according to user defined scale parameters For example if a 1 to 5 V input to an Analog Input Unit is input to memory as 0000 to 0FA0 hexadecimal the value in memory can be scaled to 50 to 200 C using SCL 194 SCL 194 converts unsigned binary to unsigned BCD To convert a negative value it will be necessary to first add the maximum n...

Page 838: ... D00103 and the result is output to D00200 Negative Values An Analog Input Unit actually inputs values from FF38 to 1068 hexadecimal for 0 8 to 5 2 V SCL 194 however can handle only unsigned binary values between 0000 and FFFF hexadecimal making it impossible to use SCL 194 directly to handle signed binary values below 1 V 0000 hexadecimal i e FF38 to FFFF hexadecimal In an actual application it i...

Page 839: ...also be used by setting As Bs and Ar Br The follow ing relationship will result Reverse scaling can be used for example to convert reverse scale 1 to 5 V 0000 to 0FA0 hexadecimal to 0300 to 0000 respectively as shown in the fol lowing diagram BCD BIN BCD BIN P1 D00100 P1 1 D00101 P1 2 D00102 P1 3 D00103 00C8 He x Contents of D 00200 R Point B Point A Contents of D 00000 S Point A 00C8 Hex 0000 BCD...

Page 840: ...le for ON Condition SCL2 486 Executed Once for Upward Differentiation SCL2 486 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Y X P1 P1 1 P1 2 15 0 15 0 15 0 Offset of linear function 8000 to 7FFF signed binary 8000 to 7FFF signed binary 0000 to 9999 BCD Area S ...

Page 841: ...solute BCD conversion value and the sign will be indicated by the Carry Flag The result can thus be between 9999 and 9999 If the result is less than 9999 9999 will be output as the result If the result is greater than 9999 9999 will be output DM Area D00000 to D32767 D00000 to D32765 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32765 E00000 to E32767 EM Area with bank En_00000...

Page 842: ...in the result word is negative Examples Scaling 1 to 5 V Analog Input to 0 to 300 In the following example it is assumed that an analog signal from 1 to 5 V is converted and input to CIO 0205 as 0000 to 0FA0 hexadecimal SCL2 486 is used to convert scale the value in CIO 0205 to a value between 0000 and 0300 BCD When CIO 000000 is ON the contents of CIO 0205 is scaled using the linear function defi...

Page 843: ...IO 2005 to a value between 0200 and 0200 BCD When CIO 000000 is ON the contents of CIO 2005 is scaled using the linear function defined by X 0FA0 Y 0400 and the offset 07D0 These values are contained in D00100 to D00102 and the result is output to D00200 X Y X P1 P1 1 P1 2 P1 R Contents of R D00200 Contents of S CIO 0205 Offset 1068Hex X P1 P1 1 P1 2 0400 Y P1 R 0 F A 0 D00100 D00101 D00102 Y Offs...

Page 844: ...in the same area SCL3 487 S P1 R S Source word P1 First parameter word R Result word Variations Executed Each Cycle for ON Condition SCL3 487 Executed Once for Upward Differentiation SCL3 487 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Y X P1 P1 1 P1 2 P1 3 P...

Page 845: ...the nearest integer Area S P1 R CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6139 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W507 W000 to W511 Holding Bit Area H000 to H511 H000 to H507 H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A000 to A443 A448 to A955 A448 to A959 Timer Area T0000 to T4095 T0000 to T4091 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4091 C0000 to...

Page 846: ...of S is not BCD or if the value for X C 1 is not between 0001 and 9999 BCD The Equals Flag will turn ON when the contents of the result word D is 0000 The Negative Flag will turn ON if the MSB of the result in R is 1 i e if the result is negative Examples When a value from 0 to 200 is scaled to an analog signal 1 to 5 V for exam ple a signed BCD value of 0000 to 0200 is converted scaled to signed ...

Page 847: ...01 and 0040 hexadecimal 0 to 64 cycles R Result Word and R 1 First Work Area Word R will contain the average value after the specified number of cycles R 1 pro vides information on the averaging process and R 2 to R N 1 contain the previous values of S as shown in the following diagram X 0200 Y X P1 R Offset Contents of R 2011 signed binary Y 0FA0 Hex Contents of S D00000 signed BCD Max conversion...

Page 848: ... R N 1 Used by system Previous value 1 Previous value N R Average R 1 Processing information Average Valid Flag OFF Not valid AVG 195 has not yet been executed the specified number of cycles ON Valid Area S N R CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area...

Page 849: ...first time the program is executed at the start of operation If AVG 195 is to be executed in the first program scan clear the First Work Area Word from the program If N Number of Cycles contains 0000 an error will occur and the Error Flag will turn ON When CIO 000000 is ON in the following example the contents of D00100 will be stored one time each scan for the number of scans specified in D00200 ...

Page 850: ...nged On the third and later cycles AVG 195 calculates the average value of the contents of D01002 to D01004 and writes that average value to D01000 S D00100 N D00200 R CIO 0300 R 1 CIO 0301 R 2 CIO 0302 R 3 CIO 0303 R 11 CIO 0311 S N R Average Pointer Average Valid Flag 10 times S scan 2 S scan 1 S scan n D01000 0000 0001 0001 0002 D01001 0001 0002 8000 8001 D01002 0000 0000 0000 0003 D01003 0001 ...

Page 851: ...routine with the specified subroutine number The sub routine is the program section between SBN 092 and RET 093 When the SBS 091 N N Subroutine number Variations Executed Each Cycle for ON Condition SBS 091 Executed Once for Upward Differentiation SBS 091 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas...

Page 852: ...1 Subroutines can be nested up to 16 levels Nesting is when another subrou tine is called from within a subroutine program such as shown in the following example which is nested to 3 levels Subroutine program SBN 092 to RET 093 Main program Execution condition ON Program end SBN 10 SBN 11 RET SBN 11 SBS 12 RET RET SBN 12 ...

Page 853: ...is executed more than once in the same cycle In the following example subroutine 0001 is executed when CIO 000000 is ON and CIO 000100 is turned ON by DIFU 013 when CIO 000001 has gone from OFF to ON If CIO 000001 is ON in the same cycle subroutine 0001 will be executed again but this time DIFU 013 will turn CIO 000100 OFF without checking the status of CIO 000001 Execution condition ON Main progr...

Page 854: ...000 when it is within a program section interlocked by IL 002 and ILC 003 When SBS 091 is executed in the following cases the subroutine will not actually be called and the Error Flag will be turned ON 1 2 3 1 The specified subroutine is not defined within the current task 2 The subroutine is calling itself 3 Subroutine nesting exceeds 16 levels 4 The specified subroutine is being executed Example...

Page 855: ...xample subroutine 1 is executed and program execution returns to the next instruction after SBS 091 1 When CIO 000001 is ON subroutine 2 is executed and program execution returns to the next instruction after SBS 091 2 1 3 A S B A B CIO 000000 ON 2 Subroutine 1 Main program Subroutine program S Order of execution ...

Page 856: ...in subroutine 1 and program execution returns to the next instruction after SBS 091 2 when sub routine 2 is completed Execution of subroutine 1 continues and program exe cution returns to the next instruction after SBS 091 1 when subroutine 1 is completed 1 3 5 2 4 A S1 B S2 C A S1 B C A B S2 C A B C CIO 000000 ON CIO 000001 ON Subroutines Program end Main program Order of execution ...

Page 857: ...ions 1 5 2 4 3 CIO 000000 ON CIO 000001 ON 1 2 2 1 A S1 1 S2 S1 2 B A S1 1 S1 2 B A B A B Subroutine 1 Subroutine 2 Order of execution MCRO 099 N S D N Subroutine number S First input parameter word D First output parameter word Variations Executed Each Cycle for ON Condition MCRO 099 Executed Once for Upward Differentiation MCRO 099 Executed Once for Downward Differentiation Not supported Immedia...

Page 858: ...ine is completed the contents of A604 through A607 macro area outputs are copied to D through D 3 and program execution continues with the next instruction after MCRO 099 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N S D CIO Area CIO 0000 to CIO 6140 Work Area W000 to W508 Holding Bit Area H000 to H508 Auxiliary Bit Area A000 to A444 A448 to A956 A448 to A95...

Page 859: ...wing example two MCRO 099 instruc tions pass different input and output data to subroutine 1 1 2 3 1 The first MCRO 099 instruction passes the input data in CIO 0100 to CIO 0103 and executes the subroutine When the subroutine is complet ed the output data is stored in CIO 0300 to CIO 0303 MCRO 099 MCRO 099 Execution of subrou tine between SBN 092 and RET 093 The subroutine uses A600 to A603 as inp...

Page 860: ...ates in the same way but the input data in CIO 0200 to CIO 0203 is passed to A600 to A603 and the output data in A604 to A607 is passed to CIO 0400 to CIO 0403 D 0300 D 1 0301 D 2 0302 D 3 0303 A604 A605 A606 A607 1 1 1 Input Output Subroutine 1 Output data is passed when returning from the subroutine Macro area output words Input data is passed when the subroutine is called Macro area input words...

Page 861: ... subrou tine number The end of the subroutine is indicated by RET 093 The region of the program beginning at the first SBN 092 instruction is the subroutine region A subroutine is executed only when it has been called by SBS 091 or MCRO 099 SBN 092 N N Subroutine number Variations Executed Each Cycle for ON Condition SBN 092 Immediate Refreshing Specification Not supported Block program areas Step...

Page 862: ...red Note The input method for the subroutine number N is different for the CX Pro grammer and a Programming Console Input 0 to 1023 on the CX Program mer and 0000 to 1023 on a Programming Console Be sure to place each subroutine in the same program task as its corre sponding SBS 091 or MCRO 099 instruction A subroutine in one task can not be called from another task It is possible to program a sub...

Page 863: ...n subrou tines Example When CIO 000000 is ON in the following example subroutine 10 is executed and program execution returns to the next instruction after the SBS 091 or MCRO 099 instruction that called the subroutine OK Task 2 Task 1 Task Not allowed Not allowed OR 10 10 10 Subroutine 10 ...

Page 864: ...annot be called Precautions When the subroutine is not being executed the instructions are treated as NOP 000 Example See 3 19 3 SUBROUTINE ENTRY SBN 092 for examples of the operation of RET 093 3 19 5 GLOBAL SUBROUTINE CALL GSBS 750 Purpose Calls the global subroutine with the specified subroutine number and exe cutes that program The same global subroutine can be called from two or more tasks Th...

Page 865: ...obal subrou tine number to call that program from the different tasks The program can be modularized by making global subroutines into standard subroutines that are common to many tasks The global subroutine region between GSBN 751 and GRET 752 must be defined in interrupt task 0 If it is defined in another task an error will occur and the Error Flag will be turned ON when the GSBS 750 instruction...

Page 866: ...o GRET 752 can be defined in interrupt task 0 B A END A GSBN n GRET C A B GSBS n 000000 C GSBS n 000001 Execution condition ON Execution condition ON Main program Cyclic or interrupt task Cyclic or interrupt task Interrupt task 0 Global subroutine program GSBN 751 to GRET 752 ...

Page 867: ...4 or up down differentiated instructions in sub routines The operation of differentiated instructions in a global subroutine is unpredict able if a subroutine is executed more than once in the same cycle In the fol lowing example global subroutine 0001 is executed when CIO 000000 is ON B A D C B GSBS n 000000 D GSBS m 000001 END A GSBN n C GSBN m GRET END GRET Execution condition ON Execution cond...

Page 868: ...13 or DIFD 014 would remain ON if the instruction was executed and the output was turned ON but the same global subroutine was not called a second time In the following example global subroutine 0001 is executed if CIO 000000 is ON Output CIO 000100 is turned ON by DIFU 013 when CIO 000001 has gone from OFF to ON If CIO 000000 is OFF in the following cycle subrou tine 0001 will not be executed aga...

Page 869: ... than once When GSBS 750 is executed in the following cases the global subroutine will not actually be called and the Error Flag will be turned ON 1 2 3 1 The specified global subroutine is not defined 2 Subroutine nesting counting both regular and global subroutines ex ceeds 16 levels 3 The global subroutine is calling itself 4 The specified global subroutine is being executed 5 The specified glo...

Page 870: ...xt instruction after GSBS 750 Example 2 Two or more global subroutine programs can be programmed in interrupt task 0 In this case interrupt task 0 can be divided and used as the subroutine function s task Status of CIO 000000 Order of program execution ON A S B OFF A B Status of CIO 000000 Order of program execution ON C S D OFF C D GSBN 1 END B GSBS n A 000000 GRET END END D GSBS n C 000001 CIO 0...

Page 871: ...D 000000 GSBN 1 GSBN 2 GRET GRET 000001 CIO 000000 ON Cyclic or interrupt task It is possible to debug problems within particular tasks by using regular subroutines in the local task only as well as global subroutines that are shared with other tasks Interrupt task 0 Global subroutine program S1 Global subroutine program S2 Subroutine program S CIO 000001 OFF CIO 000001 ON ...

Page 872: ...e number must be between the range 0 to 255 decimal Operand Specifications Note For CJ1M CPU11 and CJ1M CPU21 CPU Units the range is 0 to 255 deci mal Description GSBN 751 indicates the beginning of the global subroutine with the specified subroutine number The end of the subroutine is indicated by GRET 752 GSBN 751 N N Global subroutine number Variations Executed Each Cycle for ON Condition GSBN ...

Page 873: ...luding extra cyclic tasks and interrupt tasks Precautions When the subroutine is not being executed the instructions are treated as NOP 000 Place the global subroutine region GSBN 751 to GRET 752 in inter rupt task 0 just before the END 001 instruction When two or more global subroutines are being used group them together in interrupt task 0 after the end of the main program If part of the main pr...

Page 874: ...ming Console Always place the global subroutines in interrupt task 0 An error will occur if a global subroutine is called and the subroutine is not in interrupt task 0 The step instructions STEP 008 and SNXT 009 cannot be used in glo bal subroutines GSBS n END GSBN n GRET END GSBS n END GSBN n GRET END Cyclic task 1 Not allowed OK Cyclic task 1 Cyclic task 2 Interrupt task 0 GSBN SNXT STEP GRET No...

Page 875: ...cates the end of a global subroutine and GSBN 751 indicates the beginning of a global subroutine See 3 19 6 GLOBAL SUBROUTINE ENTRY GSBN 751 for more details on the operation of global subroutines When program execution reaches GRET 752 it is automatically returned to the next instruction after the GSBS 750 instruction that called the global sub routine Precautions When the subroutine is not being...

Page 876: ...y IORD 222 or IOWR 223 is being executed within an interrupt task to refresh I O in a Special I O Unit cyclic refreshing with that Special I O Unit must be disabled in the PLC Setup If cyclic refreshing with the Special I O Unit is enabled in the PLC Setup and one of the following operations occurs during an interrupt task a non fatal Duplicate Refresh Error will occur and the Interrupt Task Error...

Page 877: ...nterrupt number Furthermore the recorded interrupt is not cleared until its interrupt task has been com pleted so a new interrupt input will be ignored if it is received while its inter rupt task is being executed Precautions for Scheduled Interrupts Be sure that the time interval is longer than the time required to execute the scheduled interrupt task For scheduled interrupts MSKS 690 is used onl...

Page 878: ... and an IORF 097 FIORF 225 CJ1 H R only IORD 222 or IOWR 223 instruction is executed for the same Special I O Unit there will be duplicate refreshing and an Interrupt Task Error will occur Interrupt Task Error Cause Flag A42615 Indicates whether Interrupt Task Error 1 or 2 occurred Interrupt Task Error Task Number A42600 to A42611 For error 1 Indicates the interrupt task number For error 2 Indicat...

Page 879: ...rupt tasks are stopped Use MSKS 690 to enable the I O interrupts and timer interrupts so that the corresponding interrupt tasks can be executed Ladder Symbol Variations Applicable Program Areas MSKS 690 N C N Interrupt identifier C Control data Variations Executed Each Cycle for ON Condition MSKS 690 Executed Once for Upward Differentiation MSKS 690 Executed Once for Downward Differentiation Not s...

Page 880: ...fy the Interrupt Input Unit s unit number 0 Unit number 0 interrupt tasks 100 to 107 1 Unit number 1 interrupt tasks 108 to 115 2 Unit number 2 interrupt tasks 116 to 123 3 Unit number 3 interrupt tasks 124 to 131 C Interrupt mask Set to 0000 to 00FF hex Bits 0 to 7 correspond to each interrupt task Individual bit settings are as follows 0 Enable unmasks the interrupt 1 Disable masks the interrupt...

Page 881: ...nterrupt task 142 13 Interrupt input 3 interrupt task 143 C Interrupt mask 0000 hex Up differentiation Detect rising edge 0001 hex Down differentiation Detect falling edge Operand Contents N Specify the scheduled interrupt number 4 Interrupt task 0 interrupt task 2 5 Interrupt task 1 interrupt task 3 Note Only scheduled interrupt 0 can be used with the CJ1M CPU11 21 C Scheduled interrupt time unit...

Page 882: ...x Enable interrupt Reset internal timer value and then start timer with an interrupt interval between 1 and 9 999 ms 0 1 ms 5 to 9 999 decimal 0005 to 270F hex Enable interrupt Reset internal timer value and then start timer with interrupt interval between 0 5 and 999 9 ms Note Settings 0001 to 0004 cannot be used An error will occur if one of these settings is used Area N S CIO Area CIO 0000 to C...

Page 883: ...d by setting C to 0 With this function MSKS 690 can con trol whether or not each scheduled task is executed When MSKS 690 is used to restart the internal timer the time from the execution of MSKS 690 to the start of the first scheduled interrupt task is uncertain because the existing internal timer PV is used When you want to specify the interrupt start time use CLI 691 together with MSKS 690 4 N ...

Page 884: ...duled interrupt time is set using MSKS 690 0 10 ms default 1 1 0 ms 2 0 1 ms CJ1M and CJ1 H R CPU Units only Name Label Operation Error Flag ER ON if N is not within the specified range of 0 to 5 0 to 15 for the CJ1M CPU Unit s built in interrupt inputs Errors when specifying I O Interrupts When using C200HS INT01 interrupt inputs the Error Flag will go ON if C is not between 0000 and 00FF hex Whe...

Page 885: ...nly 2 If Interrupt Task Error Detection is enabled in the PLC Setup the Interrupt Task Error Flag will turn ON if the following conditions occur for the same Special I O Unit There is a conflict between an IORF FIORF CJ1 H R only IORD or IOWR instruction executed in the interrupt task and an IORF FIORF CJ1 H R only IORD or IOWR instruction executed in the cyclic task There is a conflict between an...

Page 886: ...terrupt task number 2 15 ms 15 ms 15 ms MSKS 4 15 W00000 4 0 W00001 N C N C 2 Execution of MSKS 690 Interrupt stopped MSKS MSKR 692 N D N Interrupt number D Destination word Variations Executed Each Cycle for ON Condition MSKR 692 Executed Once for Upward Differentiation MSKR 692 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Function bloc...

Page 887: ...nts N Specify the Interrupt Input Unit s unit number 0 Unit number 0 interrupt tasks 100 to 107 1 Unit number 1 interrupt tasks 108 to 115 2 Unit number 2 interrupt tasks 116 to 123 3 Unit number 3 interrupt tasks 124 to 131 D Range 0000 to 00FF hex Bits 0 to 7 correspond to each interrupt task The meaning of the individual flags is as follows 0 Interrupt enabled unmasked 1 Interrupt disabled mask...

Page 888: ...ask 141 12 Interrupt input 2 interrupt task 142 13 Interrupt input 3 interrupt task 143 D 0000 hex Up differentiation Detect rising edge 0001 hex Down differentiation Detect falling edge Operand Contents N Specify the scheduled interrupt number 4 Interrupt task 0 interrupt task 2 5 Interrupt task 1 interrupt task 3 Note Only scheduled interrupt 0 can be used with the CJ1M CPU11 21 C Scheduled inte...

Page 889: ...s 0 to 9 999 decimal 0000 to 270F hex Interrupt timer PV between 0 and 99 990 ms 1 ms 0 to 9 999 decimal 0000 to 270F hex Interrupt timer PV between 1 and 9 999 ms 0 1 ms 0 to 9 999 decimal 0000 to 270F hex Interrupt timer PV between 0 0 and 999 9 ms Operand Contents Area N D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Ar...

Page 890: ...ed ule Interrupt Interval in the PLC Setup Flags Precautions MSKR 692 can be executed in the main program or in interrupt tasks Operation Examples Example for CS1W INT01 CJ1W INT01 When CIO 000000 turns ON in the following example MSKR 692 reads the current mask status of Interrupt Input Unit 2 and stores it in D00100 When CIO 000001 turns ON in the following example MSKS 690 reads the rising fall...

Page 891: ... ms Cyclic task 24 ms 24 ms 24 ms MSKR 5 D00100 W00000 N D Scheduled interrupt task number 3 24 ms 12 ms 12 ms Execution of MSKR Reads 24 Execution of MSKS Interrupt enabled 12 ms Execution of MSKR Reads 12 CLI 691 N C N Interrupt number C Control data Variations Executed Each Cycle for ON Condition CLI 691 Executed Once for Upward Differentiation CLI 691 Executed Once for Downward Differentiation...

Page 892: ...6 to 123 3 Unit number 3 interrupt tasks 124 to 131 C Set to 0000 to 00FF hex Bits 0 to 7 correspond to each interrupt task Individual bit settings are as follows 0 Retain the recorded interrupt 1 Clear the recorded interrupt Operand Contents N Specify the interrupt input number 6 Interrupt input 0 interrupt task 140 7 Interrupt input 1 interrupt task 141 8 Interrupt input 2 interrupt task 142 9 I...

Page 893: ...input 0 interrupt task 2 11 High speed counter input 1 interrupt task 3 C 0000 hex Retain the recorded interrupt 0001 hex Clear the recorded interrupt Area N C CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area ...

Page 894: ...CLI 691 clears or retains the recorded high speed counter interrupt either target or range comparison specified by N Flags Interrupts have different priority levels A power OFF interrupt is given the highest priority followed by I O interrupts external interrupts and finally scheduled interrupts Lower numbered I O interrupts are given priority over a higher numbered I O interrupts Operation Exampl...

Page 895: ...hen a CS1D CPU Unit for Single CPU System or a CS1 H CJ1 H or CJ1M CPU Unit is being used and the power OFF interrupt task is disabled it is pos sible to disable power OFF interrupt processing simultaneously Ladder Symbol Variations CL1 0 D00100 000000 N S 1 1 1 1 15 14 13 12 0 1 0 1 11 10 9 8 1 1 1 1 7 6 5 4 0 0 1 0 3 2 1 0 F 5 F 2 D00100 0 Recorded interrupt input retained 1 Recorded interrupt i...

Page 896: ...s The following word is in the Auxiliary Area Precautions All interrupt tasks will remain disabled until EI 694 is executed DI 693 cannot be executed from an interrupt task DI 693 cannot be executed for more than one cyclic task To disable more than one cycle execution task insert DI 693 in each cyclic task Any inter rupts that occur while one cycle execution task is being executed will be exe cut...

Page 897: ...0 is ON in the following example DI 693 disables all inter rupt tasks other than the power OFF interrupt task DI END DI END DI instruction is valid Interrupt tasks are executed under registered conditions DI instruction is valid Task No 0 Task No 1 DI END EI END The mask on power OFF interrupt processing is enabled Task No 0 Task No 1 000000 Disables execution of all interrupt tasks except the pow...

Page 898: ...the CPU Unit will not be reset even if a power interruption is detected The CPU Unit will be reset after all of the instruction s between DI 693 and EI 694 have been executed Refer to 3 20 4 DISABLE INTERRUPTS DI 693 for details on using DI 693 to disable power OFF interrupt process ing Flags Related Flags and Words The following word is in the Auxiliary Area EI 694 Variations Executed Each Cycle ...

Page 899: ...were disabled by DI 693 Note When the power OFF interrupt task is disabled for a CS1 H CJ1 H CJ1M CPU Unit or CS1D CPU Unit for Single CPU System power OFF processing will also be enabled at the same time 3 20 6 Summary of Interrupt Control The interrupt control instructions control or read settings for I O interrupts and scheduled interrupts DI 693 and EI 694 control the operation of external int...

Page 900: ...t Input Unit 0 When interrupt input 3 goes from OFF to ON execution of the main program will be interrupted and I O interrupt task 3 interrupt task 103 will be exe cuted Execution of the main program execution is resumed at the point of interruption after I O interrupt task 3 has been completed I O Interrupt Task Priority Levels When two or more interrupt inputs are received simultaneously the int...

Page 901: ...executed all of the inputs will be recorded and the interrupt tasks will be executed in order after interrupt task 3 is completed The interrupt tasks are executed in order of their priority from the lowest interrupt number to the highest Note 1 It is not always necessary to use CLI 691 2 When CLI 691 is not executed all of the I O interrupt inputs received dur ing the execution of an interrupt tas...

Page 902: ...nd the time to the first sched uled interrupt set with CLI 691 has passed the task currently being processed will be interrupted and the scheduled interrupt task will be executed When the scheduled interrupt task execution reaches an END 001 in struction program execution will resume at the point where the sched uled interrupt occurred Program execution will be interrupted and the scheduled interr...

Page 903: ...cessing is disabled by executing MSKS 690 with a time interval of 0000 The following timing chart shows the operation of the example listed above Precautions Be sure that the scheduled time interval is longer than the time required to execute the scheduled interrupt task If the scheduled time interval is too short the interrupt task will be executed continuously and a Cycle Time Too Long Error wil...

Page 904: ...his section describes instructions used to control the high speed counters and pulse outputs 3 21 1 MODE CONTROL INI 880 CJ1M CPU21 22 23 Only Purpose INI 880 can be used to execute the following operations for built in I O of CJ1M CPU Units To start comparison with the high speed counter comparison table To stop comparison with the high speed counter comparison table To change the PV of the high ...

Page 905: ...880 P C NV P Port specifier C Control data NV First word with new PV Variations Executed Each Cycle for ON Condition INI 880 Executed Once for Upward Differentiation INI 880 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK P Port 0000 hex Pulse output 0 0001 hex P...

Page 906: ...DM Area D00000 to D32766 EM Area without bank EM Area with bank Indirect DM EM addresses in binary D00000 to D32767 Indirect DM EM addresses in BCD D00000 to D32767 Constants See descrip tion of oper and See descrip tion of oper and Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to I...

Page 907: ...tting range Pulse output P 0000 or 0001 hex The present value of the pulse output is changed The new value is speci fied in NV and NV 1 Note This instruction can be executed only when pulse output is stopped An error will occur if it is executed during pulse output 8000 0000 to 7FFF FFFF hex 2 147 483 648 to 2 147 483 647 High speed counter input P 0010 or 0011 hex Linear Mode Differential inputs ...

Page 908: ...ently out putting pulses ON if changing the PV of a high speed counter is speci fied for a port that is not specified for a high speed counter ON if a value that is out of range is specified as the PV for an interrupt input in counter mode ON if INI 880 is executed in an interrupt task for a high speed counter and an interrupt occurs when CTBL 882 is executed ON if executed for a port not set for ...

Page 909: ...cifier C Control data D First destination word Variations Executed Each Cycle for ON Condition PRV 881 Executed Once for Upward Differentiation PRV 881 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK P Port 0000 hex Pulse output 0 0001 hex Pulse output 1 0010 hex...

Page 910: ...ing method for high fre quency supported only by CJ1M CPU Units Ver 3 0 or later C PRV 881 function Variations D D 1 0 15 D PV 0 15 Lower word of PV Upper word of PV 2 word PV Pulse output PV high speed counter input PV high speed counter input frequency for high speed counter input 0 1 word PV Interrupt input PV in counter mode status range comparison results Area P C D CIO Area CIO 0000 to CIO 6...

Page 911: ...wed OK See note Not allowed Not allowed Not allowed 0010 or 0011 hex High speed counter input OK OK OK OK high speed counter 0 only OK See note high speed counter 0 only OK See note high speed counter 0 only OK See note high speed counter 0 only 0100 0101 0102 or 0103 hex Interrupt input in counter mode OK Not allowed Not allowed Not allowed Not allowed Not allowed Not allowed 1000 or 1001 hex PWM...

Page 912: ...rror Pulse Output Status Flag OFF Constant speed ON Accelerating decelerating PV Overflow Underflow Flag OFF Normal ON Error Pulse Output Amount Set Flag OFF Not set ON Set Pulse Output Completed Flag OFF Output not completed ON Output completed Pulse Output In progress Flag OFF Stopped ON Outputting No origin Flag OFF Origin established ON Origin not established At origin Flag OFF Not stopped at ...

Page 913: ...s can be selected by setting the rightmost two digits of C Low frequency counting At frequencies below 1 kHz the Standard Calculation Method is used regardless of the sampling time setting Value of P Conversion result 0000 or 0001 hex Reading the frequency of pulse output 0 or 1 0000 0000 to 0001 86A0 hex 0 to 100 000 0010 hex Reading the frequency of high speed counter 0 Counter input method Any ...

Page 914: ...nput from a high speed counter and either converts the frequency to a rotational speed or converts the counter PV to the total number of revolutions The result is output to the destination words as 8 digit hexadecimal Pulses can be input from high speed counter 0 only This instruction is supported only by the CJ1M CPU21 22 23 CPU Unit Ver 2 0 or later Name Label Operation Error Flag ER ON if the s...

Page 915: ...te Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK C1 PRV2 883 function 0 0 hex See note Converts frequency to rotation speed 0001 hex Converts counter PV to total number of revolutions C1 0 Conversion Type 0 hex Frequency to speed 1 hex Counter PV to total revolutions When Conversion Type is Frequency to speed Pulse Frequency C...

Page 916: ...of C is 1 PRV2 883 calculates the rotation speed in r s from the frequency data and pulses revolution setting Rotation speed r s Frequency Pulses revolution Rotation Speed Units r h CJM1 CPU Unit Ver 3 0 or later only When the second digit of C is 2 PRV2 883 calculates the rotation speed in r h from the frequency data and pulses revolution setting Rotation speed r h Frequency Pulses revolution 60 ...

Page 917: ...nction counts the number of pulses within a fixed interval the sampling time and calculates the fre quency from that count One of the following three sampling times can be selected by the third digit of C1 Low frequency counting At frequencies below 1 kHz the Standard Calculation Method is used regardless of the sampling time setting Converting Counter PV to Total Number of Revolutions C1 0001 hex...

Page 918: ...m comparisons for a high speed counter PV Either target value or range comparisons are possible An interrupt task is executed when a specified condition is met This instruction is supported by CJ1M CPU21 22 23 CPU Units only Ladder Symbol Variations Applicable Program Areas PRV2 0000 0003 D00200 000100 Converting frequency to rotation speed Pulses per revolution PRV2 0001 0003 D00300 000100 Conver...

Page 919: ... eight ranges set the interrupt task number to FFFF hex for all unused ranges P Port 0000 hex High speed counter 0 0001 hex High speed counter 1 C CTBL 882 function 0000 hex Registers a target value comparison table and starts comparison 0001 hex Registers a range comparison table and performs one comparison 0002 hex Registers a target value comparison table Comparison is started with INI 880 0003...

Page 920: ...00 0000 to FFFF FFFF hex See note 0000 0000 to FFFF FFFF hex See note 0000 0000 to FFFF FFFF hex See note 0000 0000 to FFFF FFFF hex See note Interrupt task number 0000 to 00FF hex Interrupt task number 0 to 255 AAAA hex Do not execute interrupt task FFFF hex Ignore the settings for this range Lower word of range 8 lower limit Upper word of range 8 lower limit Lower word of range 8 upper limit Upp...

Page 921: ...the PV is being decremented The comparison table can contain up to 48 target values and the number of target values is specified in TB i e the length of the table depends on the number of target values that is specified Comparisons are performed for all target values registered in the table Note 1 An error will occur if the same target value with the same comparison di rection is registered more t...

Page 922: ...equency creating stepwise changes in the speed This instruction is supported by CJ1M CPU21 22 23 CPU Units only Name Label Operation Error Flag ER ON if the specified range for P or C is exceeded ON if the number of target values specified for target value comparison is set to 0 ON if the number of target values specified for target value comparison exceeds 48 ON if the same target value is specif...

Page 923: ...tiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK P Port 0000 hex Pulse output 0 0001 hex Pulse output 1 0 3 4 7 8 11 12 15 M Mode 0 hex Continuous 1 hex Independent Direction 0 hex CW 1 hex CCW Pulse output method See note 0 hex CW CCW 1 hex Pulse direction Always 0 hex Note Use the same pulse outp...

Page 924: ...lse output will continue until stopped from the program An error will occur if the mode is changed between independent and continu ous mode while pulses are being output Continuous Mode Speed Control When continuous mode operation is started pulse output will be continued until it is stopped from the program EM Area with bank Indirect DM EM addresses in binary D00000 to D32767 Indirect DM EM addre...

Page 925: ...uction Starting pulse output To output with spec ified speed Changing the speed fre quency in one step Outputs pulses at a specified frequency SPED 885 Con tinuous Changing settings To change speed in one step Changing the speed during operation Changes the fre quency higher or lower of the pulse output in one step SPED 885 Con tinuous SPED 885 Con tinuous Stopping pulse output Stop pulse out put ...

Page 926: ...dent Stopping pulse output To stop pulse out put Num ber of pulses setting is not pre served Immediate stop Stops the pulse out put immediately and clears the number of output pulses set ting PULS 886 SPED 885 Independent INI 880 PLS2 887 INI 880 Stop pulse out put Num ber of pulses setting is not pre served Immediate stop Stops the pulse out put immediately and clears the number of output pulses ...

Page 927: ...ceeded ON if PLS2 887 or ORG 889 is already being executed to control pulse output for the specified port ON if SPED 885 or INI 880 is used to change the mode between continuous and independent output during pulse output ON if SPED 885 is executed in an interrupt task when an instruction controlling pulse output is being executed in a cyclic task ON if SPEC 885 is executed in independent mode with...

Page 928: ...t pulses the set number of pulses the PV Operand Specifications Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK P Port 0000 hex Pulse output 0 0001 hex Pulse output 1 T Pulse type 0000 hex Relative 0001 hex Absolute N N 1 0 15 Lower word with number of pulses Upper word with number of pulses Relative pulse output 0 to 2 147 483 647 0000 0000 to 7FFF FFFF hex Absolute...

Page 929: ...the range of the PV of the pulse output amount 2 147 483 648 to 2 147 483 647 Example When CIO 000000 turns ON in the following programming example PULS 886 sets the number of output pulses for pulse output 0 An absolute value of 5 000 pulses is set SPED 885 is executed next to start pulse output using the CW CCW method in the clockwise direction in independent mode at a target frequency of 500 Hz...

Page 930: ...s instruction is supported by CJ1M CPU21 22 23 CPU Units only Ladder Symbol Variations Applicable Program Areas Operands P Port Specifier The port specifier indicates the port M Output Mode The content of M specifies the parameters for the pulse output as follows PLS2 887 P M S F P Port specifier M Output mode S First word of settings table F First word of starting frequency Variations Executed Ea...

Page 931: ...get frequency 1 to 100 000 Hz 0000 0000 to 0001 86A0 hex Specify the frequency after acceleration in Hz Acceleration rate Deceleration rate 1 to 2 000 Hz 0001 to 07D0 hex 1 to 2 000 Hz 0001 to 07D0 hex Specify the increase or decrease in the frequency per pulse control period 4 ms F F 1 0 15 Lower word with starting frequency Upper word with starting frequency 0 to 100 000 Hz 0000 0000 to 0001 86A...

Page 932: ...the instruction or an execution condition that is turned ON only for one scan PLS2 887 can be used only for positioning With the CJ1M CPU Units PLS2 887 can be executed during pulse output for ACC 888 in either independent or continuous mode and during accelera tion constant speed or deceleration See note ACC 888 can also be exe cuted during pulse output for PLS2 887 during acceleration constant s...

Page 933: ...ates PLS2 887 PLS2 887 PULS 886 ACC 888 Indepen dent PLS2 887 To change target position Changing the tar get position dur ing positioning multiple start function PLS2 887 can be exe cuted during position ing to change the target position num ber of pulses acceler ation rate deceleration rate and target fre quency Note If a constant speed cannot be maintained after changing the set tings an error w...

Page 934: ...pulses setting is not pre served Immediate stop Stops the pulse output immediately and clears the number of output pulses PLS2 887 INI 880 Stop pulse out put smoothly Number of pulses setting is not pre served Decelerate to a stop Decelerates the pulse output to a stop PLS2 887 ACC 888 Indepen dent target frequency of 0 Hz Opera tion Purpose Application Frequency changes Description Procedure inst...

Page 935: ...ription Procedure instruction Change from speed control to fixed distance positioning during oper ation PLS2 887 can be exe cuted during a speed control operation started with ACC 888 to change to positioning operation ACC 888 Continu ous PLS2 887 Fixed distance feed interrupt Pulse frequency Target frequency Outputs the number of pulses specified in PLS2 887 Both relative and absolute pulse speci...

Page 936: ...d in combination with PULS 886 ACC 888 can also be executed during pulse output to change the target frequency or acceleration deceleration rate enabling smooth sloped speed changes This instruction is supported by CJ1M CPU21 22 23 CPU Units only Ladder Symbol Name Label Operation Error Flag ER ON if the specified range for P M S or F is exceeded ON if PLS2 887 is executed for a port that is alrea...

Page 937: ...rrupt tasks OK OK OK OK P Port 0000 hex Pulse output 0 0001 hex Pulse output 1 0 3 4 7 8 11 12 15 M Mode 0 hex Continuous mode 1 hex Independent mode Direction 0 hex CW 1 hex CCW Pulse output method See note 0 hex CW CCW 1 hex Pulse direction Always 0 hex Note Use the same pulse output method when using both pulse outputs 0 and 1 S 1 S 2 S 0 15 Lower word with target frequency Upper word with targ...

Page 938: ...87 can be executed during pulse output for ACC 888 in either independent or continuous mode and during accelera tion constant speed or deceleration See note ACC 888 can also be exe cuted during pulse output for PLS2 887 during acceleration constant speed or deceleration Note Executing PLS2 887 during speed control with ACC 888 continuous mode with the same target frequency as ACC 888 can be used t...

Page 939: ...lyline curve during operation Changes the accel eration or decelera tion rate during acceleration or deceleration ACC 888 Continu ous ACC 888 Continu ous Decelerating to a stop The deceleration rate is changed while decelerating Note If the target frequency is set to 0 Hz the current deceleration rate will be used ACC 888 Continu ous ACC 888 Continu ous ACC 888 Continu ous target frequency of 0 Hz...

Page 940: ... in the ACC 888 operand will be ignored if the number of pulses is set with PULS 881 as an absolute value Stopping pulse output To stop pulse out put Immediate stop Immediately stops pulse output ACC 888 Continu ous INI 880 Continu ous To stop pulse out put Immediate stop Immediately stops pulse output ACC 888 Continu ous SPED 885 Continu ous target frequency of 0 To stop pulse out put smoothly De...

Page 941: ...pulse out put To stop pulse out put Num ber of pulses set ting is not preserved Immediate stop Pulse output is stopped immedi ately and the remaining number of output pulses is cleared PULS 886 ACC 888 Indepen dent INI 880 To stop pulseoutput smoothly Number of pulses set ting is not preserved Decelerating to a stop Decelerates the pulse output to a stop Note If ACC 888 started the operation the o...

Page 942: ...or Flag ER ON if the specified range for P M or S is exceeded ON if pulses are being output using ORG 889 for the specified port ON if ACC 888 is executed to switch between indepen dent and continuous mode for a port that is outputting pulses for SPED 885 ACC 888 or PLS2 887 ON if ACC 888 is executed in an interrupt task when an instruction controlling pulse output is being executed in a cyclic ta...

Page 943: ...re the pulses will be output C Control Data The value of C determines the origin search method Operand Specifications ORG 889 P C P Port specifier C Control data Variations Executed Each Cycle for ON Condition ORG 889 Executed Once for Upward Differentiation ORG 889 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step pr...

Page 944: ...agram Pulses are then output at constant speed until the Origin Input Signal turns ON 5 in diagram Pulse output is stopped when the Origin Input Signal turns ON 6 in diagram When the origin search operation has been completed the Error Counter Reset Output will be turned ON The above operation however depends on the operating mode origin detection method and other parameters Refer to the CJ series...

Page 945: ...d Origin Proximity Input Signal Stop Origin Input Signal Time Origin search acceleration rate Origin search deceleration rate A B C D E Pulse frequency ORG 889 executed Origin return target speed Origin return deceleration rate Stop Time Origin return initial speed Origin return acceleration rate Name Label Operation Error Flag ER ON if the specified range for P or C is exceeded ON if ORG 889 is s...

Page 946: ... 100 pps Pulse output 0 Origin return CW CWW method Time Speed ORG 889 executed Output stopped Parameter Setting Pulse Output 0 Starting Speed for Origin Search and Origin Return 0000 0064 hex 100 pps Pulse Output 0 Origin Return Target Speed 0000 00C8 hex 200 pps Pulse Output 0 Origin Return Acceleration Rate 0032 hex 50 hex 4 ms Pulse Output 0 Origin Return Deceleration Rate 0032 hex 50 hex 4 ms...

Page 947: ...ored Pulse output is started each time PWM 891 is executed It is thus normally sufficient to use the differentiated version PWM 891 of the instruction or an execution condition that is turned ON only for one scan The pulse output will continue either until INI 880 is executed to stop it C 0003 hex stop pulse output or until the CPU Unit is switched to PROGRAM mode Area P F D CIO Area CIO 0000 to C...

Page 948: ... range for P F or D is exceeded ON if pulses are being output using ORG 889 for the specified port ON if PWM 891 is executed in an interrupt task when an instruction controlling pulse output is being executed in a cyclic task PWM 0000 07D0 0032 000000 PWM 0000 07D0 0019 000001 CIO 000000 ON CIO 000001 ON Pulse output 0 Frequency 200 0 Hz Duty factor 50 Pulse output 0 Frequency 200 0 Hz Duty factor...

Page 949: ...e start of each process and specified the control bit for it It is also placed at the end of the step programming area after the last SNXT 009 to indicate the end of the step programming area When it appears at the end of the step programming area STEP 008 does not take a control bit Ladder Symbols Process A Process B Process C End Corresponds Process A Process B Process C a turns ON Starts the st...

Page 950: ...ON Condition STEP 008 SNXT 009 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK Not allowed Not allowed Area B CIO Area Work Area W00000 to W51115 Holding Bit Area Auxiliary Bit Area Timer Area Counter Area...

Page 951: ...008 functionS in following 2 ways depending on its position and whether or not a control bit has been specified 1 2 3 1 Starts a specific step 2 Ends the step programming area i e step execution Starting a Step STEP 008 is placed at the beginning of each step with an operand B that serves as the control bit for the step The control bit B will be turned ON by SNXT 009 and the instruction in the ste...

Page 952: ...om the same word SNXT 009 will be executed only once i e on the rising edge of the execution condition Input SNXT 009 at the end of the step programming area and make sure that the control bit is a dummy bit in the Work Area If a control bit for a step is used in the last SNXT 009 in the step programming area the corresponding step will be started when SNXT 009 is executed An error will occur and ...

Page 953: ...d Within Step Programs The instructions that cannot be used within step programs are listed in the fol lowing table Related Bits Function Mnemonic Name Sequence Control Instruc tions END 001 END IL 002 INTERLOCK ILC 003 INTERLOCK CLEAR JMP 004 JUMP JME 005 JUMP END CJP 510 CONDITIONAL JUMP CJPN 511 CONDITIONAL JUMP NOT JMP0 515 MULTIPLE JUMP JME0 516 MULTIPLE JUMP END Subroutine Instructions SBN 0...

Page 954: ...ns Section 3 22 Step a starts when C turns ON A executed When d turns ON b starts A is interlocked B executed e turns ON B is interlocked End of step programming area Normal ladder program Returns to normal ladder program ...

Page 955: ...W00000 W00000 turns OFF W00001 turns ON and step W00001 starts Step W00001 starts from the next instruction W00001 turns OFF and dummy bit W10000 turns ON End of step programming area Step W00001 End of step programming area W00000 W00001 W00002 Step A Step B Step C End 000001 Step A starting condition 000002 Step A Step B transition condition 000003 Step B Step C transition condition 000004 Step ...

Page 956: ...C Step C ladder program Step B ladder program Step A ladder program W00000 W00001 W00002 Step A Step B Step C End 000005 Step C reset conditions 000001 Step A starting condition 000002 Step B starting condition 000003 Step A Step C transition condition 000004 Step B Step C transition condition ...

Page 957: ...ted for W00002 the branch ing moves onto the next steps even though the same control bit is used twice This is not picked up as an error in the program check using the CX Program mer A duplicate bit error will only occur in a step ladder program only when a control bit in a step instructions is also used in the normal ladder diagram Step A ladder program Step B ladder program Step C ladder program...

Page 958: ...0002 W00004 Step A Step B Step C End 000005 Step C reset conditions Step D Step E 000004 When both Step B and Step D are complete moves to Step E 000003 Step C Step D transition condition 000001 Step A C simultaneous starting condition 000002 Step A Step B transition condition ...

Page 959: ...ep Instructions Section 3 22 Step A ladder program Step W00000 A Step W00001 B Step B ladder program Step W00002 C Step C ladder program Step W00003 D Step D ladder program Step W00004 E Step E ladder program ...

Page 960: ...sors SW1 SW2 SW3 and SW4 are positioned to signal when processes are to start and end The following diagram demonstrates the flow of processing and the switches that are used for execution control The program for this process shown below utilizes the most basic type of step programming each step is completed by a unique SNXT 009 that starts the next step Each step starts when the switch that indic...

Page 961: ...009 W00000 000002 STEP 008 W00000 000100 LD 000002 000101 SNXT 009 W00001 000102 STEP 008 W00001 000100 LD 000003 000101 SNXT 009 W00002 000102 STEP 008 W00002 000200 LD 000004 000201 SNXT 009 W00003 000202 STEP 008 W00003 Process A Process B Process C Address Instruction Operands Process A started Process A reset Process B started Process B reset Process C started Process C reset Programming for ...

Page 962: ...ng diagram demonstrates the flow of processing and the switches that are used for execution control Here either process A or process B is used depending on the status of SW A1 and SW B1 SW A1 SW B1 SW A2 SW B2 SW D Process A Process C End Process B ...

Page 963: ...NOT 000002 000002 SNXT 009 010000 000003 LD NOT 000001 000004 AND 000002 000005 SNXT 009 010001 000006 STEP 008 010000 000100 LD 000003 000101 SNXT 009 010002 000102 STEP 008 010001 000100 LD 000004 000101 SNXT 009 010002 000102 STEP 008 010002 000200 LD 000005 000202 STEP 008 Process A Process B Process C Instruction Operands Address Note In the above programming CIO 010002 is used in two SNXT 00...

Page 964: ...instruction line and are always executed together starting steps for both A and C When the steps for both A and C have finished the steps for process B and D begin immediately When both process B and process D have finished i e when SW5 and SW6 turn ON processes B and D are reset together by the SNXT 009 at the end of the programming for process B Although there is no SNXT 009 at the end of proces...

Page 965: ...0001 000001 SNXT 009 W00000 000002 SNXT 009 W00002 000003 STEP 008 W00000 000100 LD 000002 000101 SNXT 009 W00001 000102 STEP 008 W00001 Process A Process B Process C Process D Process E Instruction Operands Process A started Process C started Address Programming for process A Process A reset Process B started Used to turn off process D Process E started Programming for process C Process C reset P...

Page 966: ...6 SPECIAL I O UNIT I O REFRESH FIORF 225 929 CPU BUS UNIT I O REFRESH DLNK 226 932 7 SEGMENT DECODER SDEC 078 937 INTELLIGENT I O READ IORD 222 962 INTELLIGENT I O WRITE IOWR 223 967 DIGITAL SWITCH INPUT DSW 210 940 TEN KEY INPUT TKY 211 945 HEXADECIMAL KEY INPUT HKY 212 948 MATRIX INPUT MTR 213 953 7 SEGMENT DISPLAY OUTPUT 7SEG 214 957 IORF 097 St E St Starting word E End word Variations Executed...

Page 967: ...oth C200H Special I O Units and CS Special I O Units can be refreshed using the same instruction CS Series only All of the words allocated to C200H Group 2 High density I O Units must be refreshed at one time The Unit s I O words will be refreshed if the first word allocated to the Unit is in the specified range of I O words The Unit s words will not be refreshed if the starting word is after the ...

Page 968: ... process ing of specific I O data with an interrupt If IORF 097 is used in an interrupt task always disable cyclic refreshing of the specified Special I O Unit by turn ing ON the corresponding Special I O Unit Cyclic Refreshing Disable Bit in the PLC Setup When cyclic refreshing of the specified Special I O Unit is enabled in the PLC Setup the corresponding Special I O Unit Cyclic Refreshing Disab...

Page 969: ...3 2 SPECIAL I O UNIT I O REFRESH FIORF 225 Purpose Performs I O refreshing immediately for the specified Special I O Unit s allo cated CIO Area and DM Area words t with the specified unit number This instruction is supported by the CJ1 H R CPU Units only Ladder Symbol Variations Applicable Program Areas Operands N Unit number Specifies the Special I O Unit s unit number 0000 to 005F hex or 0 to 95...

Page 970: ...a C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to 005F binary or 0 to 95 decimal Data Registers DR0 to DR15 I...

Page 971: ...F 097 I O refreshing of words used by Basic I O Units I O refreshing of the CIO words and DM words used by Special I O Units FIORF 225 I O refreshing of the CIO words and DM words used by a Spe cial I O Unit DLNK 226 I O refreshing of the CS1 CPU Bus Unit Area in the CIO Area 25 words I O refreshing of the CS1 CPU Bus Unit Area in the DM Area 100 words Refreshing of data specific to the CPU Bus Un...

Page 972: ...ORF 097 or FIORF 225 is not executed within 11 seconds to refresh the Unit s data a CPU Unit Monitor Error will occur in the Special I O Unit and the ERH and RUN Indicators will be lit Operation Examples When CIO 000000 is ON FIORF 225 immediately refreshes the CIO Area and DM Area words allocated to the Special I O Unit set as unit number 0 3 23 3 CPU BUS UNIT I O REFRESH DLNK 226 Purpose Perform...

Page 973: ...as Subroutines Interrupt tasks OK OK OK OK Area N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 E...

Page 974: ...refreshing with a CPU Bus Unit if that Unit is currently exchanging data If DLNK 226 is executed too frequently I O refreshing will not be performed We recommend allowing a delay between executions of DLNK 226 that is longer than the communications cycle time Instruction Operation IORF 097 I O refreshing of words used by Basic I O Units I O refreshing of the CIO words and DM words used by Special ...

Page 975: ...his case a Controller Link Unit If I O refreshing cannot be performed because the Controller Link Unit is refreshing data the Equals Flag will be turned OFF causing W001 to be turned ON so that the instruction execution will be retried in the next cycle When the I O refreshing is completed normally the Equals Flag will be turned ON and the instruction will not be retried in the next cycle Name Lab...

Page 976: ...is input was received from the network the last time that the token right was acquired The data received is delayed up to 1 communications cycle time max Examples of Data Transfer Processing Transferring Data from the Previous I O Refreshing 000000 DLNK 1 W001 W001 W000 W000 Equals Flag Equals Flag DLNK 1 000000 Controller Link Refresh Data link area Controller Link Unit with unit number 1 Data li...

Page 977: ...078 S Di D S Source word Di Digit designator D First destination word Variations Executed Each Cycle for ON Condition SDEC 078 Executed Once for Upward Differentiation SDEC 078 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 0 1 0 m n 15 12 11 8 7 4 3 0 Di First ...

Page 978: ...Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only Data Registers DR0 to DR15 Index Registers Indirect addressing us...

Page 979: ...in a destination word receives con verted data the other byte is left unchanged Examples When CIO 000000 turns ON in the following example the contents of the 3 digits beginning with digit 1 in D00100 will be converted from hexadecimal data to 7 segment data and the results will be output to the upper byte of D00200 and both bytes of D00201 The specifications of the bytes to be con verted and the ...

Page 980: ...1 0 0 0 0 0 1 1 0 06 2 0 0 1 0 0 1 0 1 1 0 1 1 5B 3 0 0 1 1 0 1 0 0 1 1 1 1 4F 4 0 1 0 0 0 1 1 0 0 1 1 0 66 5 0 1 0 1 0 1 1 0 1 1 0 1 6D 6 0 1 1 0 0 1 1 1 1 1 0 1 7D 7 0 1 1 1 0 0 1 0 0 1 1 1 27 8 1 0 0 0 0 1 1 1 1 1 1 1 7F 9 1 0 0 1 0 1 1 0 1 1 1 1 6F A 1 0 1 0 0 1 1 1 0 1 1 1 77 B 1 0 1 1 0 1 1 1 1 1 0 0 7C C 1 1 0 0 0 0 1 1 1 0 0 1 39 D 1 1 0 1 0 1 0 1 1 1 1 0 5E E 1 1 1 0 0 1 1 1 1 0 0 1 79 F ...

Page 981: ...d C1 Number of Digits Specifies the number of digits that will be read from the external digital switch Set C1 to 0000 hex to read 4 digits or 0001 hex to read 8 digits C2 System Word Specifies a work word used by the instruction This word cannot be used in any other application Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK Not allowed 0 1 2 3 4 5 6 7 8 9 10 ...

Page 982: ...A959 Timer Area T0000 to T4095 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C D00000 to D32767 E00000 to E32767 En_...

Page 983: ... program unlike the C200HX HG HE and CQM1H Series External Connections Connect the digital switch or thumbwheel switch to Input Unit contacts 0 to 7 and Output Unit contacts 0 to 4 as shown in the following diagram The fol lowing example illustrates connections for an A7B Thumbwheel Switch The inputs and outputs can be connected to the following kinds of Basic I O Units and High density I O Units ...

Page 984: ...than the cycle time or do not connect the digital switch or thumbwheel switch to the following Units Basic I O Units or High density I O Units mounted in a SYSMAC BUS Remote I O Slave Rack Communications Slaves DeviceNet or CompoBus S Slaves Example In this example DSW 210 is used to read an 8 digit number from a digital switch and outputs the resulting value constantly to D00000 and D00001 The di...

Page 985: ... key key pad s 0 to 9 data lines to the Input Unit as shown in the following diagram D1 First Register Word Specifies the leading word address where the ten key keypad s numeric input up to 8 digits will be stored I O D C1 C2 DSW 210 0100 0200 D00000 D32000 D32001 P_On Always ON Flag TKY 211 I D1 D2 I Input word D1 First register word D2 Key input word Variations Executed Each Cycle for ON Conditi...

Page 986: ...press ed Remains on until another key is pressed Area I D1 D2 CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W510 W000 to W511 Holding Bit Area H000 to H511 H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A958 A448 to A959 Timer Area T0000 to T4095 T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4094 C000...

Page 987: ... 1 is lost When executed TKY 211 begins reading the key input data from the first cycle regardless of the point at which the last instruction was stopped When one of the keypad keys is being pressed input from the other keys is disabled There is no restriction on the number of times that TKY 211 can appear in the program unlike the C200HX HG HE and CQM1H Series External Connections Connect the ten...

Page 988: ...res the inputs in CIO 200 and CIO 201 The ten key keypad is connected to CIO 0100 allocated to a CS1W ID211 16 point DC Input Unit 3 23 7 HEXADECIMAL KEY INPUT HKY 212 Purpose Reads numeric data from a hexadecimal keypad connected to an Input Unit and Output Unit and stores up to 8 digits of hexadecimal data in the specified words This instruction is supported only by CS CJ series CPU Unit Ver 2 0...

Page 989: ...s to the Output Unit as shown in the follow ing diagram HKY 212 I O D C I Input word O Output word D First register word C System word Variations Executed Each Cycle for ON Condition HKY 212 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutin...

Page 990: ... when the corresponding key is pressed Remains on until another key is pressed C 15 0 System word Cannot be accessed by the user Area I O D C CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6141 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W509 W000 to W511 Holding Bit Area H000 to H511 H000 to H509 H000 to H511 Auxiliary Bit Area A000 to A957 A448 to A959 A448 to A957 A448 to A959 Timer Area...

Page 991: ... When executed HKY 212 begins reading the key input data from the first selection signal regardless of the point at which the last instruction was stopped The two word register in D1 and D1 1 operates as an 8 digit shift register When a key is pressed on the ten key keypad the corresponding hexadeci mal digit is shifted into the least significant digit of D1 The other digits of D1 D1 1 are shifted...

Page 992: ...its with 8 or more input points Transistor Output Units with 8 or more output points Timing Chart 1 3 5 7 9 11 13 15 COM 0 2 4 6 8 10 12 14 COM ID212 1 3 5 7 9 11 13 15 COM 0 2 4 6 8 10 12 14 COM OD212 C 8 4 0 D 9 5 1 E A 6 2 F B 3 7 Input Unit Output Unit 0000 0000 D 1 D 0000 D 1 000F D 0000 D 1 00F9 D I 0 9 D 2 00 09 15 O 04 F 00 01 02 03 1 2 3 4 5 6 7 8 9 101112 0 to to to to Once per 12 cycles...

Page 993: ... up to 8 digits of hexadecimal data from a hexadecimal keypad and stores the data in D00000 and D00001 The hexa decimal keypad is connected through CIO 0100 allocated to a CS1W ID211 16 point DC Input Unit and CIO 0200 allocated to a CS1W OD211 16 point Transistor Output Unit D32000 is used as the system word 3 23 8 MATRIX INPUT MTR 213 Purpose Inputs up to 64 signals from an 8 8 matrix connected ...

Page 994: ...First Register Word Specifies the leading word address of the 4 words that contain the data from the 8 8 matrix 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 I 0 1 2 3 4 5 6 7 Bits 00 to 07 correspond to Input Unit inputs 0 to 7 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 O 0 1 2 3 4 5 6 7 Bits 00 to 07 correspond to Output Unit outputs 0 to 7 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 D 0 1 2 3 4 5 6 7 15 14 13 12 ...

Page 995: ...143 Work Area W000 to W511 W000 to W508 W000 to W511 Holding Bit Area H000 to H511 H000 to H508 H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 A448 to A956 A448 to A959 Timer Area T0000 to T4095 T0000 to T4092 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4092 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32764 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to...

Page 996: ...number of times that MTR 213 can appear in the program unlike the C200HX HG HE and CQM1H Series External Connections Connect the hexadecimal keypad to Input Unit contacts 0 to 3 and Output Unit contacts 0 to 3 as shown in the following diagram The inputs and outputs can be connected to the following kinds of Basic I O Units and High density I O Units as long as they are not mounted in a SYS MAC BU...

Page 997: ... I O Units or High density I O Units mounted in a SYSMAC BUS Remote I O Slave Rack Communications Slaves DeviceNet or CompoBus S Slaves Example In this example MTR 213 reads the 64 bits of data from the 8 8 matrix and stores the data in W000 to W003 The 8 8 matrix is connected through CIO 0100 allocated to a CS1W ID211 16 point DC Input Unit and CIO 0200 allocated to a CS1W OD211 16 point Transist...

Page 998: ...rd Variations Executed Each Cycle for ON Condition 7SEG 214 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks Not allowed OK OK Not allowed S 8 15 1211 0 3 4 7 S 1 8 15 1211 0 3 4 7 Digit 1 Digit 2 Digit 3 Digit 4 Digit 5 ...

Page 999: ...t 0004 Different from Output Unit 0005 Different from Output Unit Same as Output Unit 0006 Different from Output Unit 0007 D 15 0 System word Cannot be accessed by the user Area S O C D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W511 Holding Bit Area H000 to H511 H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 A448 to A959 Timer Area T0000 to T4095 ...

Page 1000: ...s in the next 12 cycles When executed 7SEG 214 begins on latch output 0 at the beginning of the round regardless of the point at which the last instruction was stopped Even if the connected 7 segment display has fewer than 4 digits or 8 digits in its display 7SEG 214 will still output 4 digits or 8 digits of data External Connections Connect the 7 segment display to the Output Unit as shown in the...

Page 1001: ...4 6 8 10 12 14 DC OD212 D0 D1 D2 D3 VDD VSS 0 LE3 LE2 LE1 LE0 D0 D1 D2 D3 VDD VSS 0 LE3 LE2 LE1 LE0 7 segment display Leftmost 4 digits Rightmost 4 digits Output Unit Function Bit s in O Output status Data and latch logic depends on C 4 digits 1 block 4 digits 2 blocks Latch output 2 Latch output 3 One Round Flag Latch output 1 Latch output 0 Data output 06 07 08 05 04 00 to 03 10 11 12 09 08 00 t...

Page 1002: ... display con nected to a CS1W OD211 16 point Transistor Output Unit There are 8 digits of data being output and the 7 segment display s logic is the same as the Output Unit s logic so the control data C is set to 0004 D32000 is used as the system word D 3 23 10 INTELLIGENT I O READ IORD 222 Purpose Reads the contents of memory area of a Special I O Unit or CPU Bus Unit see note Note There are rest...

Page 1003: ...IO 0000 to CIO 6143 Work Area W000 to W511 W000 to W510 W000 to W511 Holding Bit Area H000 to H511 H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A959 A000 to A958 A448 to A959 Timer Area T0000 to T4095 T0000 to T4094 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4094 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32766 D00000 to D32767 EM Area without bank E00000 to E32767 E00000...

Page 1004: ...t Lot numbers indicate the manufacturing date as follows YYMMDD nnnn YY Rightmost two digits of the year MM Month as a numeric value DD Day of month nnnn Serial number CJ1 H CJ1M and CS1D CPU Units Reading from a CPU Bus Unit is possible only for CPU Unit Ver 2 0 or later Note If IORD 222 is executed for a CPU Bus Unit running under a CPU Unit that does not support using IORD 222 for CPU Bus Units...

Page 1005: ... reading is completed Input the condition flags such as the Equals Flag with output branching from the same input conditions as the IORD 222 instruction If the Special I O Unit or CPU Bus Unit is busy the reading operation will not be executed Use the Equals Flag to create a self maintaining program as shown below so that IORD 222 will be executed with each cycle until the reading operation is exe...

Page 1006: ...ch allows high speed pro cessing of specific I O data with an interrupt If IORD 222 is used in an inter rupt task always disable cyclic refreshing of the specified Special I O Unit by turning ON the corresponding Special I O Unit Cyclic Refreshing Disable Bit in the PLC Setup When cyclic refreshing of the specified Special I O Unit is enabled in the PLC Setup the corresponding Special I O Unit Cyc...

Page 1007: ...it 8000 to 800F hex to specify unit numbers 0 to F hex S 1 S S CPU Unit Special I O Unit Unit 3 10 words The control code C varies depending on the Special I O Unit Number of words to transfer 10 Unit number 3 When CIO 000000 is turned ON 10 words are read from the Special I O Unit with unit number 3 and are stored in D00100 to D00109 IOWR 223 C S D C Control data S Transfer source and number of w...

Page 1008: ...0 to W511 W000 to W510 Holding Bit Area H000 to H511 H000 to H510 Auxiliary Bit Area A000 to A959 A000 to A958 Timer Area T0000 to T4095 T0000 to T4094 Counter Area C0000 to C4095 C0000 to C4094 DM Area D00000 to D32767 D00000 to D32766 EM Area without bank E00000 to E32767 E00000 to E32766 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32766 n 0 to C Indirect DM EM addresses in bi...

Page 1009: ... Lot numbers indicate the manufacturing date as follows YYMMDD nnnn YY Rightmost two digits of the year MM Month as a numeric value DD Day of month nnnn Serial number CJ1 H CJ1M and CS1D CPU Units Writing to a CPU Bus Unit is possible only for CPU Unit Ver 2 0 or later Note If IOWR 223 is executed for a CPU Bus Unit running under a CPU Unit that does not support using IOWR 223 for CPU Bus Units an...

Page 1010: ...I O Unit setting error or a Special I O Unit error is designated A CPU Bus Unit with a CPU Bus Unit setting error or a CPU Bus Unit error is designated When IOWR 223 is executed the execution results are reflected in the condi tion flags In particular the Equals Flag turns ON when reading is completed Input the condition flags such as the Equals Flag with output branching from the same input condi...

Page 1011: ...ction IOWR 223 can be used in an interrupt task which allows high speed pro cessing of specific I O data with an interrupt If IOWR 223 is used in an inter rupt task always disable cyclic refreshing of the specified Special I O Unit by turning ON the corresponding Special I O Unit Cyclic Refreshing Disable Bit in the PLC Setup When cyclic refreshing of the specified Special I O Unit is enabled in t...

Page 1012: ...XD 236 and RXD 235 instructions transfer data only through the CPU Unit s built in serial port or a serial port on a Serial Communications Board Ver 1 2 or later 2 The TXDU 256 and RXDU 255 instructions transfer data only through a Serial Communications Unit Ver 1 2 or later D D 1 D CPU Unit When CIO 000000 is turned ON the 10 words in D00100 to D00109 are written to the Special I O Unit Number of...

Page 1013: ...nly End Code Data Data Any of the following can be used No Start or End Code Start and End Code Only Start Code CR LF End Code Start and CR LF End Code Header Address The following type of frames messages can be created to meet the requirements of the external device Data Error check Terminator Communications steps can be created I O memory Read write TXD 236 RXD 235 RXD 235 TXD 236 TXD 236 and RX...

Page 1014: ...0 and 00FA hex 0 and 250 decimal words can be sent If there is no operand specified in the execution sequence such as a direct or linked word specify the constant 0000 for S If a word address or register is PMCR 260 C1 C2 S R C1 Control word 1 C2 Control word 2 S First send word R First receive word Variations Executed Each Cycle for ON Condition PMCR 260 Executed Once for Upward Differentiation P...

Page 1015: ... there is no receive data If a constant is set an error will occur the Error Flag will turn ON and PMCR 260 will not be executed If there is no receive data R will not be used and can be used for other purposes If there is no operand specified in the execution sequence such as a direct or linked word specify the constant 0000 for R If a word address or register is specified the data in the word or...

Page 1016: ... the receive buffer and stored in the R 1 onward again Flags Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only 0000 to 03E7Hex 0 to 999 0000 binary Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0...

Page 1017: ...ata has been written to the specified receive area A N C input for the corresponding Protocol Macro Execution Flag should be used as part of the execution condition whenever executing PMCR 260 to be sure that only one communications sequence is being executed at the same time for the same physical port An example is shown below SEND 090 RECV 098 and CMND 490 also use the logical ports 0 to 7 to ex...

Page 1018: ...follows A certain value backup data is set in advance so that the present value will not be read as zero when transmis sion failure occurs while protocol is being executed for reading the present value of a controller Related Flags and Words The following flags and words can be used as required when executing PMCR 260 Auxiliary Area PMCR 260 PMCR 260 CPU Unit Name Address Contents Communications P...

Page 1019: ...ution has been completed The contents of these words is cleared when operation is started Code Contents 1106 hex No corresponding program number Specified Send Receive Sequence No that has not been registered Modify the Send Receive Sequence No or add the number using the CX Programmer 2201 hex Not operable due to protocol execution Since one protocol macro has already been executed no further exe...

Page 1020: ... specified for the symbol in a receive message 2 words of data will be stored starting from D00201 and the number of words received 1 will be written to D00200 Name Address Contents Port 1 Protocol Macro Exe cution Flag CIO 190915 ON when PMCR 260 is executed The flag will remain OFF if execution fails The flag will turn OFF when the com munications sequence has been com pleted either an end or ab...

Page 1021: ...uted This pre vents the receive area from being temporarily cleared to all zeros by writing the most recent receive data when new receive data is not successfully obtained Specify the number of words of the receive area to be maintained as the value m If 0 or 1 is specified the holding function will be disabled and the receive area will be cleared to all zeros 0 1 0 0 0 2 0 0 R 3 2 Sent Note Proto...

Page 1022: ...er if new data is not successfully received Receive buffer Protocol Macro Execution Flag Communica tions Port En abled Flag Always ON Flag Error Recv Error Recv Receive Area Not Held Receive Area Held Communications sequence Receive buffer Cleared Receive area starting at R 1 Cleared data all zeros stored Communications sequence Receive buffer Cleared and previous data stored Receive area starting...

Page 1023: ...tiation TXD 236 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 8 0 11 3 7 4 12 C Serial port specifier 0 CPU Unit s RS 232C port 1 Serial Communications Board port 1 2 Serial Communications Board port 2 Always 0 Byte order 0 Most significant bytes first 1 Lea...

Page 1024: ...when the port s Send Ready Flag is ON The Send Ready Flag is A39205 for the CPU Unit s RS 232C port A35605 for Serial Communications Board port 1 or A35613 for Serial Communications Board port 2 Up to 259 bytes can be sent including the send data N 256 bytes max the start code and the end code EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E0000...

Page 1025: ...ta Data Data Data Data N bytes of data is sent in the following order when sending the most significant bytes first is specified 1 2 3 4 5 6 No Start or End Code N send bytes 256 max Only Start Code Send bytes after ST 256 max Send bytes before ED 256 max Start and End Code Send bytes between ST and ED 256 max Send bytes before CR LF 256 max Send bytes between ST and CR LF 256 max Start and CR LF ...

Page 1026: ... S will be used as the ER signal If 1 2 or 3 hex is specified for RS and ER signal control in C TXD 236 will be executed regardless of the status of the Send Ready Flag A39205 A35605 or A35613 depending on the port being used If the TXD 236 instruction is executed for a Board that does not support no protocol mode a Serial Communications Board without a version number Name Label Operation Error Fl...

Page 1027: ... or RXD 235 was being executed for the Serial Communica tions Board in the cyclic task the cyclic task was interrupted and another TXD 236 or RXD 235 instruction was executed for the Serial Communi cations Board in the interrupt task TXD 236 was executed for a serial port on a Serial Communications Board that was being restarted Note Do not program TXD 236 RXD 235 for a Serial Communications Board...

Page 1028: ... protocol Mode Number of bytes of Data 00 256 bytes 01 to FF 1 to 255 bytes Setup Area word Bit Name Settings Port 1 Port 2 D32002 D32012 15 No protocol Mode Send Delay Specifier 0 Default 0 ms 1 Use delay in bits 1 to 14 0 to 14 No protocol Mode Send Delay Time 0000 to 7530 hex 0 to 300 000 ms decimal in 10 ms units D32004 D32014 8 to 15 No protocol Mode Start Code 00 to FF hex 0 to 7 No protocol...

Page 1029: ...5 and the ER signal is set according to the status of D00300 bit 14 S ST 12 34 AB CD EF ED 0 3 0 C D00400 8 12 3 4 15 0 7 11 Byte order 0 Most significant byte to least significant byte RS and ER signal control 3 RS and ER signal control Always 0 Serial port specifier 0 CPU Unit s RS 232C port 0 0 S D00300 1 0 0 0 15 14 13 12 ER signal set to 0 RS signal set to 1 TXD D00300 D00400 0 000001 S C N A...

Page 1030: ...iven in the following table These are the default settings C D00400 S D00300 3 0 1 0 0 0 15 14 13 12 0 0 RS and ER signal control 3 RS and ER signal control ER signal set to 0 RS signal set to 1 TXD D00300 D00400 0 S C N 000001 A39205 RS 232C port s Send Ready Flag Byte order 0 Most significant byte to least significant byte Always 0 Serial port specifier 0 CPU Unit s RS 232C port Monitor F150 M05...

Page 1031: ...e normal read command used as a trigger input to the Code Reader from the RS 232C line Data bit length 8 bits Parity None Stop bits 1 Start code None End code 000D CR Item Setting 4 E 0 0 4 0 3 5 15 8 7 11 12 3 4 0 S D00010 TXD D00010 D00020 00001 A39205 S C 3 N RS 232C Port Send Ready Flag D00011 RXD D00100 D00020 00002 A39206 A393 RS 232C Port Receive Ready Flag RS 232C Port Reception Counter Al...

Page 1032: ...0 0 0 3 15 8 7 11 12 3 4 0 C D00400 0 15 13 14 12 S D00300 Turns OFF ER signal 0 0 1 Turns ON RS signal Always 0 Serial Port Specifier 0 CPU Unit s built in RS 232C port RS and ER Signal Control 3 RS and ER signal control Byte Order 0 Most significant bytes first When CIO 00001 turns ON the status of bit 15 of D00300 is output as the RS signal and the status of bit 14 is output as the ER signal ...

Page 1033: ... and 9 No protocol Mode End Code Specifier 0 hex None 1 hex Use end code 2 hex Use CR LF 0 to 7 No protocol Mode Number of Bytes of Data 00 hex 256 bytes default 01 to FF hex 1 to 255 bytes Setup Area word Bit Name Settings Port 1 Port 2 D32002 D32012 15 No protocol Mode Send Delay Specifier 0 Default 0 ms 1 Use delay in bits 1 to 14 0 to 14 No protocol Mode Send Delay Time 0000 to 7530 hex 0 to 3...

Page 1034: ...nd DR signal monitoring 1 CS signal monitoring 2 DR signal monitoring 3 CS and DR signal monitoring Always 0 Serial port specifier 0 CPU Unit s RS 232C port 1 Serial Communications Board port 1 2 Serial Communications Board port 2 Area D C N CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A448 to A959 A000 to A447 A448 to A959 Timer Area T0000 ...

Page 1035: ...he port s Receive Ready Flag is ON The Receive Ready Flag is A39206 for the CPU Unit s RS 232C port A35606 for Serial Communications Board port 1 or A35614 for Serial Communications Board port 2 Execute RXD 235 only when the corresponding Receive Ready Flag is ON Up to 259 bytes can be received including the receive data N 256 bytes max the start code and the end code The following diagram shows t...

Page 1036: ...ween ST and ED 256 max Receive bytes before CR LF 256 max Receive bytes between ST and CR LF 256 max When receiving the most signifi cant bytes first is specified 0 Most signifi cant bytes Least signif icant bytes When receiving the least signifi cant bytes first is specified 0 Most signifi cant bytes Least signif icant bytes N bytes stored in the specified or der Max 256 bytes Received CPU Unit s...

Page 1037: ...ed Reception will be stopped if 259 bytes of data are received If more data is input after that the Overrun Error Flag note 5 and Transmission Error Flag note 6 will turn ON When more data is input to the Serial Communications Board s serial port than is specified in N that data will be discarded when RXD 235 is executed In contrast extra data input to the CPU Unit s RS 232C port will not be dis c...

Page 1038: ...5 instruction is executed for a Board that does not support no protocol mode a Serial Communications Board without a version number the Inner Board Service Disabled Flag A42404 non fatal error and the Error Flag will turn ON Note 1 Reception Completed Flags Built in RS232C port A39206 Serial Communications Board port 1 A35606 Serial Communications Board port 2 A35614 2 Reception Counters Built in ...

Page 1039: ...be executed repeatedly to read a block of data in parts If an overrun error framing error or parity error occurs on the CPU Unit s built in serial port serial port reception will stop The serial port must be restarted to begin reception again RXD 235 was executed for a serial port on a Serial Communications Board that was being restarted Related Flags and Words The following PLC Setup settings and...

Page 1040: ...ll turn ON when the end code is received or when 256 bytes have been received RS 232C Port Reception Overflow Flag A39207 ON when more that the expected num ber of receive bytes has been received Number of Receive Bytes Specified The flag will turn ON when anything is received after reception has been com pleted and execution of the next RXD 235 End Code Specified The flag will turn ON when anythi...

Page 1041: ... or more bytes of data are received in the buffer before RXD 235 is executed Port 2 Reception Completed Flag A35614 ON when no protocol reception is com pleted Number of Receive Bytes Specified The flag will turn ON when the specified number of bytes has been received End Code Specified The flag will turn ON when the end code is received or when 256 bytes have been received Reception Overflow Flag...

Page 1042: ...Unit First set the reading conditions for the Code Reader D C D00200 10 0 0 Always 0 Stored This example assumes that both a start and end code have been specified in the PC Setup ST Start code e g 02 hex ED End code e g 03 hex Most signifi cant bytes Least signif icant bytes CS and DR signal monitoring 0 No CS and DR signal monitoring Byte order 1 Least significant bytes first Serial port specifi...

Page 1043: ...in RS 232C port and stored starting from the upper byte of D00100 Item Setting Communications mode No protocol Baud rate 38 400 bps Data bit length 8 bits Parity None Stop bits 1 Start code None End code 000D CR 2 F 0 3 3 0 6 3 15 8 7 11 12 3 4 0 S D00100 TXD D00010 D00020 00001 A39205 S C 3 N D00101 RXD D00100 D00020 00002 A39206 A393 0 0 0 0 15 8 7 11 12 3 4 0 C D00020 31 20 31 D00102 4F 4D 4F 5...

Page 1044: ... 0 0 0 3 15 8 7 11 12 3 4 0 C D00400 0 15 13 14 12 D D00100 0 0 1 Turns OFF ER signal Turns ON RS signal Always 0 Serial Port Specifier 0 CPU Unit s built in RS 232C port RS and ER Signal Control 3 RS and ER signal control Byte Order 0 Most significant bytes first When CIO 00001 turns ON the status of bit 15 of D00300 is output as the RS signal and the status of bit 14 is output as the ER signal ...

Page 1045: ...ode 8 and 9 No protocol Mode End Code Specifier 0 hex None 1 hex Use end code 2 hex Use CR LF 0 to 7 No protocol Mode Number of Bytes of Data 00 hex 256 bytes default 01 to FF hex 1 to 255 bytes Setup Area word Bit Name Settings Port 1 Port 2 D32002 D32012 15 No protocol Mode Send Delay Specifier 0 Default 0 ms 1 Use delay in bits 1 to 14 0 to 14 No protocol Mode Send Delay Time 0000 to 7530 hex 0...

Page 1046: ... 12 C 15 8 0 11 3 7 4 12 C 1 Destination unit address See note Serial Communications Unit s unit address unit number 10 hex Serial port number 0 Specify directly See note 1 Port 1 2 Port 2 Port number specifier Internal logical port Specify 0 to 7 or F F Automatic allocation Always 00 Byte order 0 Most significant bytes first 1 Least significant bytes first RS and ER signal control 0 No RS and ER ...

Page 1047: ...bled Flag for the specified logical port A20200 to A20207 for ports 0 to 7 is ON and the TXDU Instruction Executing Flag in the allocated DM Setup Area is OFF Note The logical port number can be allocated automatically by setting bits 12 to 15 of C 1 to F For details refer to Automatic Allocation of Communications Ports on page 1032 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32...

Page 1048: ...ified in C Nothing will be sent if 0 is specified for N If RS signal control is specified in C bit 15 of S will be used as the RS signal 1 3 5 2 4 6 CR LF CR LF End Code Only End Code Data Data Data Data Data Data N bytes of data is sent in the following order when sending the most significant bytes first is specified 1 2 3 4 5 6 No Start or End Code N send bytes 256 max Only Start Code Send bytes...

Page 1049: ...n 9 or n 19 where n CIO 1500 25 unit number is ON To ensure that another TXDU 256 is not executed for the port before the first TXDU 256 is completed program the port s TXDU Instruction Executing Flag as a normally closed condition An error will occur and the Error Flag will turn ON in the following cases The Communications Port Enabled Flag for the specified logical port is OFF when TXDU 256 is e...

Page 1050: ...tion is completed These words are cleared to 0000 when PLC opera tion starts Communications Port Error Flags A219 ON when an error occurred during execution of a communications instruction When a flag is ON check the completion code in A203 to A210 to trou bleshoot the error OFF when execution has been finished normally Bits 00 to 07 correspond to communications ports 0 to 7 The flag status is ret...

Page 1051: ...ial port 1 of the Serial Communications Unit with unit number 2 The 5 bytes of output data are read from the DM Area beginning at the rightmost byte of D00100 and output through logical port 3 to a general purpose device such as a printer Word Bit Name Status Port 1 Port 2 n 9 n 19 05 TXDU Instruction Executing Flag 0 TXDU 256 is not being executed 1 TXDU 256 is being executed Instruction executio...

Page 1052: ...g the serial port number to 0 and setting the Serial Communications Unit s unit address to the serial port s unit address Set the unit address to 80 hex 4 x unit number for port 1 or 81 hex 4 x unit number for port 2 Port number specifier 3 Logical port 3 Serial Communications Unit s unit address 88 hex 80 hex 4 x unit number Serial port number 0 Specify port directly Port number specifier 3 Logic...

Page 1053: ... D C N D First destination word C First control word N Number of bytes 0000 to 0100 hex 0 to 256 Variations Executed Each Cycle for ON Condition RXDU 255 Executed Once for Upward Differentiation RXDU 255 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 8 0 11 3...

Page 1054: ...ally by setting bits 12 to 15 of C 1 to F For details refer to Automatic Allocation of Communications Ports on page 1032 Area D C D CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6142 CIO 0000 to CIO 6143 Work Area W000 to W511 W000 to W510 W000 to W511 Holding Bit Area H000 to H511 H000 to H510 H000 to H511 Auxiliary Bit Area A000 to A959 A000 to A958 A000 to A959 Timer Area T0000 to T4095 T0000 t...

Page 1055: ...art and End Code Number of bytes between ST and ED 256 max Number of bytes up to CR LF 256 max Number of bytes between ST and CR LF 256 max Start and CR LF End Code Serial port on Serial Communications Unit Data received Number of bytes Specified in allocated DM Setup Area Bytes N Storage order 256 bytes max Most signifi cant bytes Least signif icant bytes Byte order 0 Most significant bytes first...

Page 1056: ...55 is executed data is stored in memory starting at D the Reception Completed Flag note 1 will turn OFF even if the Reception Over flow Flag note 3 is ON and the Reception Counter note 2 will be cleared to 0 Data will be stored in memory in the order specified in C If 0 is specified for N the Reception Completed Flag note 1 and Reception Overflow Flag note 3 will be turned OFF the Reception Counte...

Page 1057: ...Counters n CIO 1500 25 unit number Port 1 n 10 Port 2 n 20 3 Reception Overflow Flags n CIO 1500 25 unit number Port 1 Bit 7 of n 9 Port 2 Bit 7 of n 19 4 Overrun Error Flags n CIO 1500 25 unit number Port 1 Bit 4 of n 8 Port 2 Bit 4 of n 18 5 Transmission Error Flags n CIO 1500 25 unit number Port 1 Bit 15 of n 8 Port 2 Bit 15 of n 18 6 Further data cannot be received until the received data is r...

Page 1058: ...t numbers when communications instructions have been executed Words A203 to A210 correspond to communications ports 0 to 7 The code is 00 while the instruction is being executed and contains the relevant code when execution is completed These words are cleared to 0000 when PLC opera tion starts Communications Port Error Flags A219 ON when an error occurred during execution of a communications inst...

Page 1059: ...ain or restarting the Board n 9 n 19 06 Reception Completed Flag 0 No data received or currently receiving data 1 Reception completed 0 1 The Board or Unit has received the specified number of bytes 1 0 RXD 235 or RXDU 255 was executed to write the data from the buffer to a CPU Unit data area n 9 n 19 07 Reception Overflow Flag 0 The Board or Unit has not received more than the specified number of...

Page 1060: ...nit number 2 Logical communica tions port number 3 is used to receive the data from a general purpose device such as a bar code reader The 10 bytes of received data are written to the DM Area beginning at the rightmost byte of D00100 End code or specified number of bytes received Instruction execution ON OFF Communications Port Enabled Flag A20200 to A20207 correspond to communications ports 0 to ...

Page 1061: ...E F G H I J K L 10 bytes 34 12 ST 56 78 AB CD ST Start code e g 02 hex ED End code e g 03 hex Data received D 3 7 C H E F L I J G K D00103 D00104 EF GH IJ KL ED C 1 D00201 C 1 3 0 88 80 04_Unit No 2 7 8 15 0 11 12 8 8 43 3 Communications port No 3 Communications port No specifier internal logic port 0 Directly specified serial port unit address Note Allocated DM Area Settings Start code end code D...

Page 1062: ...ort number 1 hex Peripheral port on CPU Unit or Port 1 on CPU Bus Unit or Inner Board 2 hex Built in RS 232C port on CPU Unit or Port 2 on CPU Bus Unit or Inner Board Settings 3 and 4 hex are reserved Always set to 0 Area C S CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6134 Work Area W000 to W511 W000 to W502 Holding Bit Area H000 to H511 H000 to H502 Auxiliary Bit Area A000 to A438 A448 to A959...

Page 1063: ...rs DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area C S Unit address Unit Port No Serial port Serial port communications setup area 00 hex CPU Unit 1 hex Port 1 Communications parameters for the peripheral port in the PLC Setup 2 hex Port 2 Communications parameters for the R...

Page 1064: ...l mode to the protocol macro mode CPU Unit Status of communications parameters CS1 H CJ1 H CJ1M or CS1D If the PLC is turned OFF and then ON again the communications parameters revert to the settings that existed before they were changed with STUP 237 CS1 If the PLC is turned OFF and then ON again the communications parameters set with STUP 237 are retained Name Label Operation Error Flag ER ON if...

Page 1065: ...tion 3 24 S D00100 S 1 D00101 S 2 D00102 S 9 D00109 6 6 to to to to Port setting Default Protocol mode 6 hex protocol macro Baud rate Default 9 600 bps Transferred DM words allocated to the communications setup of the Serial Communications Board ...

Page 1066: ...t by specifying the network address node number and unit number of the destination Unit In the following example a FINS command is sent to the CPU Unit through node number 2 in network address 00 1 2 3 1 Network address Address of the network local network 00 2 Node number Logical address in the network 3 Unit number Unit number of the destination Unit a CPU Unit 00 b CPU Bus Unit Unit number 10 h...

Page 1067: ... show three types of network communications com munications from a PLC to other devices in a network communications from a Unit number hexadecimal Destination device 00 Unit number 10 E1 01 Node number Node number Node number Node number Inner Board CPU Unit Serial Communications Unit Serial port 1 Serial port 2 Serial port 1 Serial port 2 Serial port 2 Peripheral Serial port 1 RS 232C Unit number...

Page 1068: ...ions from a PLC to serial ports in devices in the network The first shows communications to serial ports in devices in another PLC the CPU Unit CPU Bus Unit or Inner Board and the second shows communications to a serial port within the CPU Rack itself Note Communications can span up to 8 network levels including the local network The local network is the network where the communications originate ...

Page 1069: ...st Link system the necessary Host Link header and terminator are attached to the FINS command and the command is sent to the host com puter Serial Gateway Communications to a Component or Host Link Slave It is possible to send FINS commands or send receive data to a component or Host Link Slave connected to the PLC through its serial port with the serial gateway function Sending to a Component Whe...

Page 1070: ...puter Host Link It is possible to send FINS commands from a host computer to the PLC to which it is connected as well as other devices in the network CPU Units Spe cial I O Units computers etc In this case the necessary Host Link header and terminator must be attached to the FINS command when it is sent Serial cable Modbus RTU Slave device Modbus RTU CMND PLC Serial cable PLC Host Link Slave CMND ...

Page 1071: ...nstruction can be exe cuted at a time for each communications port Exclusive control must be used when more than 8 instructions are executed These 8 communications port numbers are shared by the network instructions SEND 090 RECV 098 and CMND 490 the serial communications instructions TXDU 256 and RXDU 255 and the PROTOCOL MACRO instruction PMCR 260 Be sure not to specify the same port number on t...

Page 1072: ...he ladder program it was necessary to confirm the availability of com munications ports before using them KEEP A DIFU B KEEP C Reset B Reset D Execution condition Communications Port Enabled Flag Local Node Active Flag Destination Node Active Flag Creates op erand or control data with MOV or XFER SEND RECEIVE CMND Communications Port Enabled Flag Communications Port Error Flag Execution condition ...

Page 1073: ...Enabled Flag here for port 0 A20200 b Executing c Executing Communica tions port 1 KEEP Communica tions instruction Communica tions port 0 Communica tions instruction Communica tions port 0 Communica tions instruction a Executing Exclusive control was required by the user when the same communications port was used more than once Item Specific number assignments Automatic allocation Specification o...

Page 1074: ... A215 00 to 07 First Cycle Flags after Network Communications Error Each flag will turn ON for just one cycle after a communications error occurs Bits 00 to 07 correspond to ports 0 to 7 Use the Used Communications Port Number stored in A218 to determine which flag to access Note These flags are not effective until the next cycle after the communications instruction is executed Delay accessing the...

Page 1075: ...rs when communications instructions have been exe cuted Words A203 to A210 correspond to communications ports 0 to 7 A219 00 to 07 Communications Port Error Flags ON when an error occurred during execution of a communications instruction When a flag is ON check the completion code in A203 to A210 to troubleshoot the error Turn OFF then execution has been finished normally Bits 00 to 07 correspond ...

Page 1076: ...e communications port number that was automatically allocated is stored in a work word b Used port from A218 Used Communications Port Number Confirms that the First Cycle Flags after Network Communications Finished for the automatically allocated port number corresponding bit for word b in A214 is ON Confirms that the First Cycle Flags after Network Communications Error for the automatically alloc...

Page 1077: ...eted When a Executing turns ON a communications instruction SEND 090 RECV 098 CMND 490 or PMCR 260 is executed with the communications port specified as F The communications port number that was automatically allocated is stored in a work word b Used port from A218 Used Communications Port Number Places the I O memory address A216 containing the completion code for the communications instruction e...

Page 1078: ... composes a FINS command based on the oper ands see note and sends the FINS command to the Communications Unit or other destination node A20201 W00000 A20201 W00001 Communications were previously enabled by exclusively controlling operation using W00000 and W00001 Automatic port alloca tion was add ed to the pro gram This instruction may at times use communications port 1 Even if W00000 or W00001 ...

Page 1079: ...es the port s Communications Port Error Flag A21900 to A21907 and Communications Port Completion Code A203 to A210 3 25 2 About Explicit Message Instructions Methods for Using Explicit Message Communications There are two methods that can be used to send explicit messages from a PLC Use the CMND 490 to send a FINS command code of 2801 hex EXPLICIT MESSAGE SEND Use the following Explicit Message In...

Page 1080: ...ssage was never sent i e when the flag is ON or if there was an error in the explicit message that was sent i e when the flag is OFF The Communications Port Completion Code will contain 0000 hex after a nor mal end an explicit message error code after an explicit communications error end and a FINS message completion code after a FINS error end Instruction Name Outline EXPLT 720 EXPLICIT MES SAGE ...

Page 1081: ... to 7 will turn ON After completion the Communications Port Completion Code A203 to A210 Communications port No 0 to 7 will contain the FINS message error code OK OK OK OK CPU Unit FINS header FINS header FINS response Explicit response Explicit response CPU Bus Unit e g DeviceNet Unit Explicit message Explicit message Explicit message sent Processed normally Normal explicit response received PLC ...

Page 1082: ...hex 0000 hex Communications Port Enabled Flag Explicit Message Instruction Explicit Communications Error Flag Communications Port Error Flag Communications Port Completion Code Instruction being executed FINS end code Previous Instruction being executed OK Error OK Explicit error CPU Unit FINS header FINS header FINS response Explicit error response Explicit response CPU Bus Unit e g DeviceNet Uni...

Page 1083: ...d ON when a Executing turns ON and the Communications Port Enabled Flag A20200 turns ON If the Explicit Communications Error Flag A21300 when execution is completed explicit memory communications were completed normally and normal processing after network communications is performed If the Explicit Communications Error Flag A21300 is ON when execution is completed an error has occurred in explicit...

Page 1084: ...atically allocated communications port is OFF in A213 i e the bit corresponding to b port Detects when the Explicit Communications Error Flag for the automatically allocated communications port is ON in A213 i e the bit corresponding to b port c turns OFF in the cycle after communications instruction execution is completed and communications completion or errors are detected from that cycle KEEP a...

Page 1085: ...of C 1 to 1 for port 1 or 2 for port 2 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Word Bits 00 to 07 Bits 08 to 15 C Number of words 0001 to maximum allowed1 4 digit hexadecimal C 1 Destination network address 00 to 7F 0 to 127 2 4 Bits 08 to 11 Serial port number3 physical port 1 hex Port 1 2 hex Port 2 Do not set 0 3 or 4 Bits 12 to 15 Always 0 C 2 Destination...

Page 1086: ...tomatic allocation of the communications port number logical port 8 When the destination node number is set to FF broadcast transmission there will be no response even if bits 12 to 15 are set to 0 Port Port s unit address Example Unit number 1 Port 1 80 hex 4 unit number 80 4 1 84 hex 132 decimal Port 2 81 hex 4 unit number 81 4 1 85 hex 133 decimal Port Port s unit address Port 1 E4 hex 228 deci...

Page 1087: ...articular serial port in the des tination device as well as the device itself Area S D C CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6139 Work Area W000 to W511 W000 to W507 Holding Bit Area H000 to H511 H000 to H507 Auxiliary Bit Area A000 toA959 A000 to A955 Timer Area T0000 to T4095 T0000 to T4091 Counter Area C0000 to C4095 C0000 to C4091 DM Area D00000 to D32767 D00000 to D32763 EM Area wit...

Page 1088: ... data from the PLC to the host computer the next time that the PLC has the right to transmit It is also possible to transmit to other host computers connected to other PLCs elsewhere in the network If SEND 090 is sent to the serial port of the CPU Unit a Serial Communica tions Board CS Series only or Serial Communications Unit a command is sent from the serial port to the host computer The command...

Page 1089: ... Flag is OFF for the communications port number specified in C 3 OFF in all other cases Name Address Operation Communications Port Enabled Flag A20200 to A20207 These flags are turned ON to indicate that net work instructions including PMCR 260 may be executed for the corresponding ports 00 to 07 A flag is turned OFF when a network instruction is being executed for the corresponding port and turne...

Page 1090: ... to the host computer connected to port 1 of the Serial Communications Unit with unit address 10 hex at node number 3 in network 0 It is necessary create a program at the host computer to receive the data and send a response Example 2 When CIO 000000 and A20207 the Communications Port Enabled Flag for port 07 are ON in the following example the ten words from D00100 to D00109 are transmitted to no...

Page 1091: ...ions from the PLC RECV 098 S D C S First source word remote node D First destination word local node C First control word Variations Executed Each Cycle for ON Condition RECV 098 Executed Once for Upward Differentiation RECV 098 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt task...

Page 1092: ...dress indicates the Unit as shown in the following table Unit address C 2 bits 00 to 07 Unit Serial port number C 1 bits 08 to 11 Serial port 00 hex CPU Unit 1 hex Built in RS 232C port 2 hex Peripheral port 10 hex unit number Serial Communications Unit CPU Bus Unit 1 hex Port 1 2 hex Port 2 E1 hex Serial Communications Board Inner Board CS Series only 1 hex Port 1 2 hex Port 2 Port Port s unit ad...

Page 1093: ...ort FD hex 253 decimal RS 232C port FC hex 252 decimal Unit Unit address setting Area S D C CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6139 Work Area W000 to W511 W000 to W507 Holding Bit Area H000 to H511 H000 to H507 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 A000 to A443 A448 to A955 Timer Area T0000 to T4095 T0000 to T4091 Counter Area C0000 to C4095 C0000 to C4091 DM Area D0...

Page 1094: ...en SEND 090 is executed the corresponding Communi cations Port Enabled Flag ports 00 to 07 A20200 to A20207 and Communi cations Port Error Flag ports 00 to 07 A21900 to A21907 will be turned OFF and 0000 will be written to the word that contains the completion code ports 00 to 07 A203 to A210 Data will be received from the destination node once the flags have be set Transmission through the Networ...

Page 1095: ...lave PLC Connected by Serial Gateway The serial gateway function can be used to receive data from a PLC con nected as a host link Slave to a Serial Communications Board or Unit In this case the source node address must be set to the host link unit number 1 Flags The following table shows relevant bits and flags in the Auxiliary Area Serial cable PLC Host Link Slave Set the source node address to t...

Page 1096: ... PMCR 260 if the instructions are using the same port number Noise and other factors can cause the transmission or response to be cor rupted or lost so we recommend setting the number of retries to a non zero value which will cause RECV 098 to be executed again if the response is not received within the response monitoring time 3 25 5 DELIVER COMMAND CMND 490 Purpose Sends an FINS command and rece...

Page 1097: ...d response data are determined by the network with the smallest maximum data lengths 4 Set the destination network address to 00 to transmit within the local net work When two or more CPU Bus Units are mounted the network address will be the unit number of the Unit with the lowest unit number Variations Executed Each Cycle for ON Condition CMND 490 Executed Once for Upward Differentiation CMND 490...

Page 1098: ... gate way function conversion to host link FINS set the serial port s unit ad dress in the destination network address byte 7 The unit address indicates the Unit as shown in the following table Unit address C 3 bits 00 to 07 Unit Serial port number C 2 bits 08 to 11 Serial port 00 hex CPU Unit 1 hex Built in RS 232C port 2 hex Peripheral port 10 hex unit number Serial Communications Unit CPU Bus U...

Page 1099: ... Refer to Automatic Allocation of Communications Ports on page 1032 for details on using automatic allocation of the communications port number logical port 11 When the destination node number is set to FF broadcast transmission there will be no response even if bits 12 to 15 are set to 0 Unit connected to network not necessary to specify Unit FE hex Direct specification of the serial port s unit ...

Page 1100: ...ng Bit Area H000 to H511 H000 to H506 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 A000 to A442 A448 to A954 Timer Area T0000 to T4095 T0000 to T4090 Counter Area C0000 to C4095 C0000 to C4090 DM Area D00000 to D32767 D00000 to D32762 EM Area without bank E00000 to E32767 E00000 to E32762 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32763 n 0 to C Indirect DM EM addr...

Page 1101: ...There will be no response and no retries for broadcast transmissions For instructions that require no response set the response setting to not required An error will occur if the amount of response data exceeds the number of bytes of response data set in C 1 FINS command data can be transmitted to a host computer connected to a PLC serial port when set to host link mode as well as a PLC CPU Unit I...

Page 1102: ...ved com mand the FINS command enclosed in the host link header and terminator If the destination serial port is in the local PLC set the network address to 00 local network in C 2 set the node address to 00 local PLC in C 3 and set the unit address to 00 CPU Unit E1 Inner Board CS Series only or unit number 10 hexadecimal Serial Port Unit Serial Gateway Communications to a Component or Host Link S...

Page 1103: ...of V For example file memory commands command codes 22 hex can be sent to format file memory delete files copy files and perform other operations Refer to 5 2 Manipulating Files of the CS CJ series CPU Unit Programming Manual for details The File Memory Operation Flag A34313 will turn ON when any FINS com mand is sent to the local CPU Unit even for FINS commands not related to file memory Always u...

Page 1104: ...peration Flag A34313 is ON OFF in all other cases Name Address Operation Communications Port Enabled Flag A20200 to A20207 These flags are turned ON to indicate that net work instructions including PMCR 260 may be executed for the corresponding ports 00 to 07 A flag is turned OFF when a network instruction is being executed for the corresponding port and turned ON again when the instruction is com...

Page 1105: ...eads 10 words from D00010 to D00019 The response contains the 2 byte command code 0101 the 2 byte completion code and then the 10 words of data for a total of 12 words or 24 bytes The data will be retransmitted up to 3 times if a response is not received within ten seconds The following program section shows an example of sending a FINS com mand to the local CPU Unit When CIO 000000 and A20207 the...

Page 1106: ...or port 7 File Memory Operation Flag Command code 2215 Hex CREATE DELETE DIRECTORY Parameter 0000 Hex create directory Disk No 8000 Hex Memory Card Subdirectory name CS1 space Directory name length 0006 6 characters Absolute directory path OMRON Bytes of command data 001A 26 decimal Bytes of response data 0004 4 Destination network address 00 Hex local network Destination unit address 00 Hex Desti...

Page 1107: ...f there are 5 words of data S 1 to S 5 Do not include the 2 bytes in word S itself Include the leftmost bytes of S 1 to S 5 which contain 00 Also include the number of bytes of Service Data starting at S 6 If the first or last word contains just one byte of data do not count the empty byte in that word Destination Node Address 00 to max node address hex If the Attribute ID is not used set it to FF...

Page 1108: ... contains just one byte of data the empty byte in that word is not counted Service Data C 0 15 C 1 8 11 12 15 0 7 C 2 15 0 C 3 15 0 Set the total number of words of response data beginning at D The allowed setting range is 0 to 010E hex 270 words If the number of words of received data exceeds the value set here a FINS error will occur response too long code 11 0B and no data at all will be stored...

Page 1109: ...there is 1 byte of service data there are 5 bytes of data all together and D contains 0005 hex The setting in bits 12 to 15 of C 1 0 or 8 hex determines the byte order of the service data stored at S 6 and D 3 Area S D C CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6140 Work Area W000 to W511 W000 to W508 Holding Bit Area H000 to H511 H000 to H508 Auxiliary Bit Area A000 to A959 A448 to A959 A000...

Page 1110: ...219 OFF The corresponding Communications Port Completion Code A203 to A210 will be 0000 hex if the instruction ended normally an explicit message error code if an explicit messaging error occurred or a FINS error code if a FINS error occurred For details on the general operation of the explicit message instructions refer to 3 25 2 About Explicit Message Instructions A 15 A D 3 D 4 B C D 08 07 00 B...

Page 1111: ...executed even if an error occurred previously Communications Port Error Flag A21900 to A21907 These flags are turned ON to indicate that the explicit message itself was not sent from the cor responding ports 00 to 07 during execution of an explicit message instruction The flag status is retained until the next network instruction is executed The flag will be turned OFF when the next instruction is...

Page 1112: ...red in S 6 in the same way Example In this example EXPLT 720 is used to read the total ON time or number of contact operations from a DRT2 Slave I O Terminal 34 15 3 4 1 D 3 2 08 07 00 12 Frame The data in the frame is in the order 34 12 In this case 1234 hex is stored from the leftmost byte in the order 34 12 34 15 D 3 08 07 00 12 1 2 3 4 Frame The data in the frame is in the order 34 12 In this ...

Page 1113: ...ssage DRM2 OD16 Slave with node address 45 S D00000 0 0 0 A S 1 D00001 0 0 2 D S 2 D00002 0 0 0 E S 3 D00003 0 0 0 9 S 4 D00004 0 0 0 3 S 5 D00005 0 0 6 6 D D00100 0 0 0 8 D 1 D00101 0 0 2 D D 2 D00102 0 0 8 E D 3 D00103 2 7 F E D 4 D00104 2 9 0 0 C D00200 0 0 0 4 C 1 D00201 0 6 1 2 C 2 D00202 0 0 0 0 C 3 D00203 0 0 0 0 Number of bytes of data S 1 to S 5 5 words 10 bytes 0A hex Slave s node addres...

Page 1114: ...First word of received message C First control word Variations Executed Each Cycle for ON Condition EGATR 721 Executed Once for Upward Differentiation EGATR 721 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK S 0 0 8 11 12 15 0 7 S 1 0 0 8 11 12 15 0 7 S 2 0 0 8 ...

Page 1115: ...a FINS error will occur response too long code 11 0B and no data at all will be stored in the area starting at D 3 If the number of words of received data is less than the value set here the remaining words in the area starting at D 3 will be left unchanged FINS unit address of relaying Communications Unit CPU Bus Unit 10 to 1F hex unit number 10 hex Special I O Unit 20 to 7F hex unit number 20 he...

Page 1116: ...ex determines the byte order of the service data stored at S 6 and D 3 Storing Data from the Leftmost Byte Set bits 12 to 15 of C 1 to 0 hex Counter Area C0000 to C4092 C0000 to C4095 C0000 to C4092 DM Area D00000 to D32764 D00000 to D32767 D00000 to D32764 EM Area without bank E00000 to E32764 E00000 to E32767 E00000 to E32764 EM Area with bank En_00000 to En_32764 n 0 to C En_00000 to En_32767 n...

Page 1117: ...a A 15 B D 1 D 2 A D C 08 07 00 B C D Frame order of data in line Stored from rightmost byte Note A B C and D represent bytes of data Data area Name Label Operation Error Flag ER ON if the Communications Port Enabled Flag is OFF for the communications port number specified in C OFF in all other cases Name Address Operation Communications Port Enabled Flag A20200 to A20207 These flags are turned ON...

Page 1118: ...usly Communications Port Completion Codes A203 to A210 These words contain the completion codes for the corresponding ports 00 to 07 following execu tion of a network instruction The corresponding word will contain 0000 while the Explicit Communications Error Flag is OFF The corresponding word will contain a FINS error code when that port s Explicit Communi cations Error Flag and Communications Po...

Page 1119: ... O Terminal In this case the Total ON Time or Number of Contact Operations for input 3 are read Service Code 0E hex Class ID 95 hex Instance ID 01 hex and Attribute ID 65 hex The general status is returned in 1 byte 34 15 1 2 3 D 1 4 08 07 00 12 Frame The data in the frame is in the order 34 12 In this case 1234 hex is stored from the rightmost byte in the order 34 12 78 15 7 8 5 D 1 D 2 6 3 4 1 2...

Page 1120: ...6 hex port 6 and the DeviceNet Unit s unit address 12 hex Response monitoring time 0000 hex 2 s Explicit format type 0000 hex DeviceNet format Slave s node address 10 0A hex Class ID 95 hex Instance ID 01 hex Attribute ID 65 hex D D00100 0 0 0 1 D 1 D00101 0 0 4 8 7 6 5 4 3 2 1 0 D00101 0 1 0 0 1 0 0 0 Basic Unit s I O Power Status Flag Expansion Unit s I O Power Status Flag Low Network Power Volt...

Page 1121: ...es CPU Unit Ver 2 0 or later Ladder Symbol Variations Applicable Program Areas ESATR 722 S C S First word of send message C First control word Variations Executed Each Cycle for ON Condition ESATR 722 Executed Once for Upward Differentiation ESATR 722 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Sub...

Page 1122: ...tination Node Address 00 to max node address hex 00 to 3F hex 0 to 63 for DeviceNet If the Attribute ID is not used set it to FFFF hex The Attribute ID cannot be set to 0000 hex When there is Service Data data other than the Attribute ID the byte order of this data is specified in bits 12 to 15 of C 1 Up to 534 bytes 267 words can be set C 8 11 12 15 0 7 C 1 15 0 C 2 15 0 Response monitoring time ...

Page 1123: ... to W509 Holding Bit Area H000 to H511 H000 to H509 Auxiliary Bit Area A000 to A959 A000 to A957 Timer Area T0000 to T4095 T0000 to T4093 Counter Area C0000 to C4095 C0000 to C4093 DM Area D00000 to D32767 D00000 to D32765 EM Area without bank E00000 to E32767 E00000 to E32765 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32765 n 0 to C Indirect DM EM addresses in binary D00000 to...

Page 1124: ... A 15 B S 5 S 6 A D C 08 07 00 B C D Frame order of data in line Stored from rightmost byte Note A B C and D represent bytes of data Data area Name Label Operation Error Flag ER ON if the Communications Port Enabled Flag is OFF for the communications port number specified in C OFF in all other cases Name Address Operation Communications Port Enabled Flag A20200 to A20207 These flags are turned ON ...

Page 1125: ...usly Communications Port Completion Codes A203 to A210 These words contain the completion codes for the corresponding ports 00 to 07 following execu tion of a network instruction The corresponding word will contain 0000 while the Explicit Communications Error Flag is OFF The corresponding word will contain a FINS error code when that port s Explicit Communi cations Error Flag and Communications Po...

Page 1126: ...06 are ON EXPLT 720 writes the Number of Contact Operations set value for input 2 in a DRT2 Slave I O Terminal Service Code 10 hex Class ID 08 hex Instance ID 02 hex and Attribute ID 68 hex 34 15 1 2 3 S 5 4 08 07 00 12 Frame The data in the frame is in the order 34 12 In this case 1234 hex is stored from the rightmost byte in the order 34 12 78 15 7 8 5 S 5 S 6 6 3 4 1 2 08 07 00 56 34 12 Frame T...

Page 1127: ... with node address 10 Explicit message S D00000 0 0 0 C S 1 D00001 0 0 0 A S 2 D00002 0 0 0 8 S 3 D00003 0 0 0 2 S 4 D00004 0 0 6 8 S 5 D00005 0 1 F 4 S 6 D00006 0 0 0 0 C D00201 8 6 1 2 C 1 D00202 0 0 0 0 C 2 D00203 0 0 0 0 Number of bytes of data S 1 to S 6 6 words 12 bytes 0C hex Slave s node address 10 0A hex Class ID 08 hex Instance ID 02 hex Attribute ID 68 hex Service Data F401 hex Byte ord...

Page 1128: ...ex unit number 20 hex Port number of the communications port logical port for the network instruction 0 to 7 hex F hex Automatic allocation Source node address remote CPU Unit 00 to maximum node address hex Example DeviceNet 00 to 3F hex 0 to 63 Read data size words 01 to 64 hex 1 to 100 words Response monitoring time 0001 to FFFF hex 0 1 to 6553 5 s 0000 hex 2 s default setting Explicit message f...

Page 1129: ...he message corresponding flag in A219 OFF The corresponding Communications Port Completion Code A203 to A210 will be 0000 hex if the instruction ended normally an explicit message error code if an explicit messaging error occurred or a FINS error code if a FINS error occurred For details on the general operation of the network instructions refer to 3 25 2 About Explicit Message Instructions Indire...

Page 1130: ... error occurred previously Communications Port Error Flag A21900 to A21907 These flags are turned ON to indicate that the explicit message itself was not sent from the cor responding ports 00 to 07 during execution of an explicit message instruction The flag status is retained until the next network instruction is executed The flag will be turned OFF when the next instruction is executed even if a...

Page 1131: ...ode address 07 CS1W DRM21 DeviceNet Unit CPU Unit ECHRD 723 instruction DeviceNet CPU Unit Unit address 12 hex because the unit number is 2 Explicit message 15 0 D D00100 D 1 D00100 D 2 15 0 S D00000 S 1 D00001 S 2 D00002 15 8 7 0 D00200 0 0 0 7 C 1 D00201 0 0 0 3 C 2 D00202 0 6 1 2 C 3 D00203 0 0 0 0 C 4 D00204 0 0 0 0 C Node address of remote CPU Unit to be read 07 hex node 07 Read data size num...

Page 1132: ...t 00 to 3F hex 0 to 63 Write data size words 01 to 64 hex 1 to 100 words Response monitoring time 0001 to FFFF hex 0 1 to 6553 5 s 0000 hex 2 s default setting Explicit message format0000 hex DeviceNet same as using the 2801 FINS command Area S D C CIO Area CIO 0000 to CIO 6143 CIO 0000 to CIO 6139 Work Area W000 to W511 W000 to W507 Holding Bit Area H000 to H511 H000 to H507 Auxiliary Bit Area A0...

Page 1133: ...ctions The following table shows relevant bits and flags in the Auxiliary Area Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D C Name Label Operation Error Flag ER ON if the Communications Port Enabled Flag is OFF for the communications port number specified...

Page 1134: ...en the next instruction is executed even if an error occurred previously Communications Port Completion Codes A203 to A210 These words contain the completion codes for the corresponding ports 00 to 07 following execu tion of a network instruction The corresponding word will contain 0000 while the Explicit Communications Error Flag is OFF The corresponding word will contain a FINS error code when t...

Page 1135: ...les that can be placed in the root directory of a Memory Card just as there is a limit for a hard disk Although the limit depends on the type and format of the Memory Card it will be between 128 and 512 files When using applications that write log files or other files at a specific interval write the files to a subdirectory rather than to the root direc tory DeviceNet CJ1W DRM21 DeviceNet Unit CPU...

Page 1136: ...rate however the access speed will be reduced The allocation unit size of the Memory Card can be checked from a DOS prompt using CHKDSK The specific procedure is omitted here Refer to gen eral computer references for more information on allocation unit sizes Memory Card Access Precautions When the PLC is accessing the Memory Card the BUSY indicator will light on the CPU Unit Observe the following ...

Page 1137: ...s delete files copy files and change file names by sending FINS commands for Memory Card operations For details refer to Section 5 File Memory Functions in the SYSMAC CS CJ Series Programmable Controllers Programming Manual W394 For binary format IOM the data will be as follows when 1234 hex 5678 hex 9ABC hex and DEF0 hex are stored in the file ABC IOM although the user does not normally need to b...

Page 1138: ...d is not formatted or a formatting error has occurred Memory Card Detected Flag version 1 V1 or higher only A34315 ON when a Memory Card has been detected OFF when a Memory Card is not detected Name Address Operation File Write Error Flag A34308 ON when an error occurred when writing to the file ON when the file being written is write pro tected File Write Impossible Flag A34309 ON when the data c...

Page 1139: ...A346 contains the rightmost 16 bits and A347 contains the leftmost 16 bits of the 32 bit binary value Name Address Operation EM File Memory For mat Error Flag A34306 ON when there is a format error in the starting bank of EM file memory EM File Format Starting Bank A344 Contains the starting bank number of the EM Area that has been formatted for use as EM file memory Contains FFFF when none of the...

Page 1140: ...ds the number of words in the data file the data in the file will be trans ferred normally and no error will occur 15 8 0 11 3 7 4 12 C File memory specifier 0 Memory Card 1 EM file memory Function specifier 0 Read data 1 Read number of words Carriage returns 0 No returns 8 Return every 10 fields 9 Return every 1 field A Return every 2 fields B Return every 4 fields C Return every 5 fields D Retur...

Page 1141: ... IOM extension will be added automatically Word 1 hex non delimited 3 hex comma delimited or 5 hex tab delimited Number of fields to read from file memory i e the number of words to read from file memory 00000000 to 1FFFFFFF hex Double word 2 hex non delimited 4 hex comma delimited or 6 hex tab delimited Number of fields to read from file memory i e half the number of words to read from file memor...

Page 1142: ...lename extension IOM TXT or CSV beginning at the address specified in S1 2 and S1 3 The data is then written to RAM beginning at the word specified in D Note Data is stored in order by absolute internal memory addresses so the output data will overwrite data in the next data area if it exceeds the capacity of the data area specified in D See Precautions for more details When FREAD 700 is executed ...

Page 1143: ...T0000 to T4092 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4092 C0000 to C4095 DM Area D00000 to D32767 D00000 to D32764 D00000 to D32767 EM Area without bank E00000 to E32767 E00000 to E32764 E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C En_00000 to En_32764 n 0 to C En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_0...

Page 1144: ...or Flag A34310 ON when a file could not be read because its data was corrupted or if it contains the wrong data type File Missing Flag A34311 ON when data could not be read because the specified file does not exist File Memory Operation Flag A34313 ON for any of the following The CPU Unit has sent a FINS command to itself using CMND 490 FREAD 700 or FWRIT 701 are being exe cuted The program is bei...

Page 1145: ...he specified file contains the wrong data type or the file data is corrupted For text or CSV files the character code must be hexadeci mal data and delimiters must be every 4 digits for word data and every 8 digits for double word data Data will be read up to the point where an illegal charac ter is detected A few seconds is required for the CPU Unit to detect a Memory Card after it has been inser...

Page 1146: ...e ABC XYZ IOM CPU Unit Wd 0 Ignored Wd 5 Wd 14 File memory Memory Card Function Read data Number of words to read 10 words Starting word Beginning of file 5 words Directory name ABC Filename XYZ 5 words 10 words FWRIT 701 C D1 D2 S C Control word D1 First destination word D2 Filename S First source word Variations Executed Each Cycle for ON Condition FWRIT 701 Executed Once for Upward Differentiat...

Page 1147: ... non delimited words or double words are specified the data for all fields is written continuously without any delimiters 5 If carriage returns are specified a carriage return will be added after each set of the specified number of words If no carriage returns is specified the data will be written continuously without carriage returns C 15 8 0 11 3 7 4 12 File memory specifier 0 Memory Card 1 EM f...

Page 1148: ...t allowed in the filename because the null character is used to mark the end of the character Data type Bits 12 to 15 of C Contents of D1 and D1 1 Binary 0 hex binary Number of words to write from file memory 00000000 to 3FFFFFFF hex Word 1 hex non delimited 3 hex comma delimited or 5 hex tab delimited Number of fields to write from file memory i e the number of words to write from file memory 000...

Page 1149: ...OFF in following cycles When transfer has been completed the File Memory Operation Flag A34313 will turn OFF This flag can be used for exclusive control of file mem ory instructions The time required to complete data transfer for FWRIT 701 will depend on the amount of data being transferred the service time allocated to file access processing and other conditions As a guideline the transfer times ...

Page 1150: ...exist FWRIT 701 creates a new file with that name and filename extension IOM TXT or CVS and writes the speci fied source data in the specified data type starting at the beginning of the file In this case it does not matter if appending to overwriting data is specified Operand Specifications File specified in D2 CPU Unit Starting address specified in S Starting word specified in D1 2 and D1 3 Numbe...

Page 1151: ...00 to En_32767 n 0 to C Constants Specified val ues only Data Registers Index Registers Indirect addressing using Index Regis ters IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area C D1 D2 S Name Label Operation Error Flag ER ON if the file memory type specified in C does not exist ON if the settings in C are not within the specified range ON if...

Page 1152: ...g CMND 490 FREAD 700 or FWRIT 701 are being exe cuted The program is being overwritten using a con trol bit in memory A simple backup operation is being performed Accessing File Flag A34314 ON when file data is actually being accessed Use this flag as an execution condition to pre vent a file memory instruction from being exe cuted while another is in progress Memory Card Detected Flag A34315 ON w...

Page 1153: ...ads ASCII data from I O memory and stores that data in the Memory Card as a text file writing a new file or appending a file The data is stored in the TXT format This instruction is supported by CS CJ series CPU Units with unit version 4 0 or later only Ladder Symbol Variations Applicable Program Areas Operand C Control word 0000 Append file 0001 Create new file or overwrite S1 Number of write byt...

Page 1154: ...written Note It is not necessary for all of the source words starting at S3 to be in the same data area The data will be read in PLC memory address order and written as a file S4 Delimiter character Specifies the delimiter characters up to 2 bytes for the write data in ASCII If a delimiter is not required specify 0000 Up to 2 bytes can be specified When 1 byte is being specified set the right most...

Page 1155: ...ata to an existing file EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to 0001 0000 to FFFF Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047...

Page 1156: ... widely depending on the type of Memory Card being used and the number of files in the Memory Card When transfer has been completed the File Memory Operation Flag A34313 will turn OFF This flag can be used for exclusive control of file mem ory instructions The source data is read from absolute PLC memory addresses in RAM so the entire block of data will be read even if the data spans two or more d...

Page 1157: ...ting from the leftmost byte of S2 If the specified directory does not exist the No File Flag A34311 will be turned ON and the file will not be overwritten Example Writing to Directory ABC and Filename XYZ Flags The following table shows relevant flags in the Auxiliary Area S3 3132 3334 S3 1 3536 3738 S3 2 S3 3 When Writing the String 12345678 Characters 12 Characters 34 Characters 56 Characters 78...

Page 1158: ...he Memory Card has been detected Example This example records the daily production total number of units produced in D00100 and D00101 in 8 digit hexadecimal Every day at 23 00 the program converts the daily production total to BCD format and appends the file LOG TXT in the Memory Card s root directory No File Flag A34311 ON when the specified directory does not exist when writing a file File Memo...

Page 1159: ...0FF W0 STR4 A352 D302 Current date converted to ASCII MOV 2020 D303 BCDL D100 W100 STR8 W100 D304 MOV 5C4C D200 MOV 4F47 D201 MOV 0000 D202 TWRIT 1 16 D200 D300 0D0A D100 D101 W100 W101 Puts 2 spaces between the date and data Converts the day s production total to BCD Converts the day s BCD production total to ASCII Directory Root Filename LOG Daily production total 12345 dec 000012345 BCD 3030 he...

Page 1160: ...nged by overwriting the message in the message storage area To clear a message that has been registered execute MSG 046 with S set to the message number of the message you want to clear and N set to a con stant 0000 to FFFF Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N M CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxil...

Page 1161: ...e rightmost byte An error will occur and the Error Flag will turn ON if N is not between 0 and 7 Examples The following diagram shows how 16 words of hexadecimal data are con verted to a message displayed on the Programming Console When CIO 000000 turns ON in the following example the 16 words of data in D00100 through D00115 are read as the 32 characters of ASCII data for mes sage number 7 and di...

Page 1162: ...Function code Page CALENDAR ADD CADD 730 1122 CALENDAR SUBTRACT CSUB 731 1126 HOURS TO SECONDS SEC 065 1129 SECONDS TO HOURS HMS 066 1131 CLOCK ADJUSTMENT DATE 735 1134 CADD 730 C T R C First calendar word T First time word R First result word Variations Executed Each Cycle for ON Condition CADD 730 Executed Once for Upward Differentiation CADD 730 Executed Once for Downward Differentiation Not su...

Page 1163: ... same data area T and T 1 Time Data Set the time data in T and T 1 as shown in the following diagram T and T 1 must be in the same data area 15 8 0 7 C 15 8 0 7 C 1 15 8 0 7 C 2 Seconds 00 to 59 BCD Minutes 00 to 59 BCD Hour 00 to 23 BCD Month 01 to 12 BCD Year 00 to 99 BCD Day 01 to 31 BCD 15 8 0 7 T 15 0 T 1 Seconds 00 to 59 BCD Minutes 00 to 59 BCD Hours 0000 to 9999 BCD ...

Page 1164: ...to H509 H000 to H510 H000 to H509 Auxiliary Bit Area A000 to A957 A000 to A958 A448 to A957 Timer Area T0000 to T4093 T0000 to T4094 T0000 to T4093 Counter Area C0000 to C4093 C0000 to C4094 C0000 to C4093 DM Area D00000 to D32765 D00000 to D32766 D00000 to D32765 EM Area without bank E00000 to E32765 E00000 to E32766 E00000 to E32765 EM Area with bank En_00000 to En_32765 n 0 to C En_00000 to En_...

Page 1165: ...o D00300 through D00302 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR005 to IR15 IR0 to IR15 Area C T R C 1 C C 2 T 1 T R 1 R R 2 Minutes Seconds Day Hour Year Month Minutes Seconds Minutes Seconds Day Hour Year Month Hours Name Label Operation Error Flag ER ON if the calendar data in C through C 2 is not with...

Page 1166: ...ame data area CSUB 731 C T R C First calendar word T First time word R First result word Variations Executed Each Cycle for ON Condition CSUB 731 Executed Once for Upward Differentiation CSUB 731 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 8 0 7 C 15 8 0 7...

Page 1167: ...o 9999 BCD 15 8 0 7 R 15 8 0 7 R 1 15 8 0 7 R 2 Seconds 00 to 59 BCD Minutes 00 to 59 BCD Hour 00 to 23 BCD Day 01 to 31 BCD Month 01 to 12 BCD Year 00 to 99 BCD Area C T R CIO Area CIO 0000 to CIO 6141 CIO 0000 to CIO 6142 CIO 0000 to CIO 6141 Work Area W000 to W509 W000 to W510 W000 to W509 Holding Bit Area H000 to H509 H000 to H510 H000 to H509 Auxiliary Bit Area A000 to A957 A000 to A958 A448 ...

Page 1168: ... En_00000 to En_32766 n 0 to C En_00000 to 3En_2765 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to...

Page 1169: ... must be in the same data area C T R 18 30 20 16 20 05 C T R 10 July 1998 50 hours 10 minutes 15 seconds 8 July 1998 SEC 065 S D S First source word D First destination word Variations Executed Each Cycle for ON Condition SEC 065 Executed Once for Upward Differentiation SEC 065 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program a...

Page 1170: ...ea A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants S...

Page 1171: ...onverts seconds data to an equivalent time in hours minutes seconds for mat Ladder Symbol Variations Hours Seconds Minutes Seconds Name Label Operation Error Flag ER ON if the minutes data in S bits 08 to 15 is not BCD and in the range 00 to 59 ON if the seconds data in S bits 00 to 07 is not BCD and in the range 00 to 59 OFF in all other cases Equals Flag ON if the content of D is 0000 after the ...

Page 1172: ...s OK OK OK OK Area S D CIO Area CIO 0000 to CIO 6142 Work Area W000 to W510 Holding Bit Area H000 to H510 Auxiliary Bit Area A000 to A958 A448 to A958 Timer Area T0000 to T4094 Counter Area C0000 to C4094 DM Area D00000 to D32766 EM Area without bank E00000 to E32766 EM Area with bank En_00000 to En_32766 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_...

Page 1173: ...t is output to D00200 and D00201 Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 00000000 to 35999999 BCD Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D Seconds Hours Minutes Seconds Name Label Operation Error...

Page 1174: ...S through S 3 must be in the same data area S DATE 735 S First source word Variations Executed Each Cycle for ON Condition DATE 735 Executed Once for Upward Differentiation DATE 735 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 8 0 7 S 15 8 0 7 S 1 15 8 0 7 ...

Page 1175: ...00 to 06 Sunday to Saturday hexadecimal A35408 to A35415 Always set to 00 Area S CIO Area CIO 0000 to CIO 6140 Work Area W000 to W508 Holding Bit Area H000 to H508 Auxiliary Bit Area A000 to A956 Timer Area T0000 to T4092 Counter Area C0000 to C4092 DM Area D00000 to D32764 EM Area without bank E00000 to E32764 EM Area with bank En_00000 to En_32764 n 0 to C Indirect DM EM addresses in binary D000...

Page 1176: ...d stored in Trace Memory TRSM 045 can be used anywhere in the program any number of times Ladder Symbol Variations Applicable Program Areas Name Label Operation Error Flag ER ON if the new clock setting in S through S 3 is not within the specified range OFF in all other cases S Second Hour Minute Day of the month Year Month Always set to 00 Day of the week TRSM 045 Variations Executed Each Cycle T...

Page 1177: ...ted as if it had an ON execution condition Connect TRSM 045 directly to the left bus bar Use TRSM 045 to sample the value of the specified bit or word at the point in the program when the instruction s execution condition is ON If the instruc tion s execution condition is ON every cycle the specified bit or word s value will be stored in Trace Memory every cycle It is possible to incorporate two o...

Page 1178: ...be valid beginning with the next sample plus or minus the number of samples set with the delay setting The Trace Trigger Monitor Flag A50811 will be turned ON at the same time 4 The trace will end when TRSM 045 has been executed enough times to fill the Trace Memory When the trace ends the Trace Completed Flag A50812 will be turned ON and the Trace Busy Flag A50813 will be turned OFF 5 Read the co...

Page 1179: ...d when this bit is turned from OFF to ON Samples will be recorded after the specified delay positive delay or the specified number of existing samples will be valid negative delay Sampling Start Bit A50815 When this bit is turned from OFF to ON from a Peripheral Device data samples will start being stored in Trace Memory with one of the following three methods used to determine sampling 1 Periodic...

Page 1180: ...ds when FAL 006 is used to generate clear user defined errors is slightly different from the function when FAL 006 is used to generate system errors CS1 H CJ1 H CJ1M and CS1D CPU Units only Instruction Mnemonic Function code Page FAILURE ALARM FAL 006 1140 SEVERE FAILURE ALARM FALS 007 1148 FAILURE POINT DETECTION FPD 269 1156 N S FAL 006 N FAL number S First message word or constant 0000 to FFFF ...

Page 1181: ... bers 0000 to FFFF Generates a non fatal error with the corre sponding FAL number no message Word address Generates a non fatal error with the corre sponding FAL number The 16 character ASCII message contained in S through S 7 will be displayed on the Pro gramming Device Operand Function N 1 to 511 These FAL numbers are shared with FALS numbers S Error code that will be generated See Description b...

Page 1182: ...urs at the same time as the FAL 006 instruction the more serious error s error code will be written to A400 4 The error code and the time that the error occurred will be written to the Error Log Area A100 through A199 Note The error record will not be written to the Error Log Area if the Don t register FAL to error log Option in the PLC Setup is selected This option is supported only by the CS1 H ...

Page 1183: ...or code and the time that the error occurred will be written to the Error Log Area A100 through A199 3 The appropriate Auxiliary Area Flags are set based on the error code and error details 4 The ERR Indicator on the CPU Unit will flash and PLC operation will con tinue 5 The non fatal error message for the specified system error will be dis played on the Programming Console Note 1 FAL 006 can be u...

Page 1184: ...ned FAL 006 errors when you want to record only the system generated errors For example this function is useful during debugging if the FAL 006 instructions are used in several applications and the Error Log is becoming full of user defined FAL 006 errors Error name S S 1 Interrupt Task Error 008B hex Bit 15 OFF Interrupt task error Bits 00 to 14 Task number of interrupt task where error occurred ...

Page 1185: ...alue of S will determine the processing as shown in the following ta ble 2 Clearing Non fatal System Errors CS1 H CJ1 H CJ1M and CS1D CPU Units Only There are two ways to clear non fatal system errors generated with FAL 006 Turn the PLC OFF and then ON again Item Setting Programming Console setting address Word 129 Bit 15 Name FAL Error Log Registration Settings 0 Record FAL Errors in Error Log 1 ...

Page 1186: ...he highest error code will be stored in A400 Name Label Operation Error Flag ER ON if N is not within the specified range of 0 to 511 deci mal ON if a non fatal system error is being generated CS1 H CJ1 H CJ1M CS1D Only but the specified error code or error details code is incorrect OFF in all other cases Name Address Operation FAL Error Flag A40215 ON when an error is generated with FAL 006 Execu...

Page 1187: ...Non fatal Error When CIO 000003 is ON in the following example FAL 006 will clear the most serious non fatal error that has occurred and reset the error code in A400 If the cleared error was originally generated by FAL 006 the corre sponding Executed FAL Number Flag and the FAL Error Flag A40215 will be turned OFF Generating a Non fatal System Error CS1 H CJ1 H CJ1M or CS1D Only When CIO 000000 is...

Page 1188: ...efined fatal errors Fatal errors stop PLC operation With CS1 H CJ1 H CJ1M and CS1D CPU Units FALS 007 can also be used to generate fatal system errors Ladder Symbol Generating User defined Fatal Errors Generating Fatal System Errors CS1 H CJ1 H CJ1M or CS1D Only Variations MOV 000A A529 000A A529CH S D00200 D00201 0400 0001 000000 FAL 10 D00200 N S Error code 0400 CPU Bus Unit Setup Error Matching...

Page 1189: ...e first of eight words containing an ASCII message to be displayed on the Programming Device Specify a constant 0000 to FFFF if a message is not required Operand Function N 1 to 511 These FALS numbers are shared with FAL numbers S Error code that will be generated See Description below S 1 Error details code that will be generated See Description below Area N S CIO Area CIO 0000 to CIO 6143 Work A...

Page 1190: ...ate that the error occurred will be written to the Error Log Area A100 through A199 4 The ERR Indicator on the CPU Unit will be lit 5 If a word address has been specified in S the ASCII message beginning at S will be registered displayed on the Peripheral Device The following table shows the error codes for FALS 007 Note The input method for the FALS number N is different for the CX Programmer and...

Page 1191: ... will be stopped 5 The fatal error message for the specified system error will be displayed on the Programming Console Note 1 The value of A529 the system generated FAL FALS number is a dummy FAL number FAL FALS and FPD numbers are shared used when a non fatal error is generated intentionally by the system This number is a dummy FAL number so it is not reflected in the error code When it is necess...

Page 1192: ...name S S 1 Error code Error details Memory Error 80F1 hex Bits 00 to 09 Memory Error Location Bit 00 User program Bit 04 PLC Setup Bit 05 Registered I O table Bit 07 Routing table Bit 08 CPU Bus Unit Setup Bit 09 Memory Card transfer error Bits 10 to 15 Invalid I O Bus Error 80C0 hex Bits 00 to 07 Slot number where the I O Bus error occurred Slot 0 to 9 00 to 09 hex Slot unknown 0F hex Bits 08 to ...

Page 1193: ...Bits 00 to 12 All zeroes A Slave Unit s unit number is duplicated or a C500 Slave Unit has more than 320 I O points Bits 13 to 15 010 Bits 00 to 12 Slave Unit s unit number binary The unit number of an I O Interface excluding Slave Racks is duplicated Bits 13 to 15 011 Bits 00 to 12 Unit number binary A Master Unit s unit number is duplicated or out side of the allowed setting range Bits 13 to 15 ...

Page 1194: ...code and the time date that the error occurred will be written to the Error Log Area A100 through A199 4 The ERR Indicator on the CPU Unit will be lit 5 The ASCII message in D00100 to D00107 will be displayed at the Periph eral Device If a message is not required specify a constant for S Name Label Operation Error Flag ER ON if N is not within the specified range of 0001 to 01FF 1 to 511 decimal O...

Page 1195: ...400 if it is the most se rious error 2 The error code and the time date that the error occurred will be written to the Error Log Area A100 through A199 3 The Too Many I O Points Flag A40111 will be turned ON 4 The CPU Unit s ERR Indicator will light and PLC operation will stop 5 A message TOO MANY I O PNT will be displayed at the Programming Console indicating that a Too Many I O Points Error has ...

Page 1196: ... time from 0 1 to 999 9 seconds R First Register Word The functions of the register words are described on page 1159 Operand Specifications FPD 269 C T R C Control word T Monitoring time R First register word Variations Executed Each Cycle for ON Condition FPD 269 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Sp...

Page 1197: ..._32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Specified values only 0000 to 270F binary Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR...

Page 1198: ...h a higher error code at the same time the error code of the more serious error will be stored in A400 4 The error code and the time date that the error occurred will be written to the Error Log Area A100 through A199 5 The ERR Indicator on the CPU Unit will flash 6 If the output mode has been set for bit address and message output left most digit of C set to 8 the ASCII message stored in R 2 thro...

Page 1199: ...ds with the first OUT not OUT TR or other right hand instruction There are two diagnostic output modes set with the leftmost digit of C 1 2 3 1 Bit address output mode Leftmost digit of C 0 Bit 15 of R the Bit Address Found Flag is turned ON when an input bit address has been found and bit 14 of R indicates whether the input is nor mally ON or normally OFF The 8 digit hexadecimal PLC memory addres...

Page 1200: ...r words R 2 to R 4 indicate the address of the input which prevented the diagnostic output from being turned ON The bit address is output to these words in ASCII The following table shows the ASCII representations for each area Area ASCII text Notes Auxiliary Area A00000 to A95915 Holding Area H00000 to H51115 Work Area W00000 to W51115 CIO Area 000000 to 665515 Task Flags TK0000 to TK0031 Timer A...

Page 1201: ...tup so that the non fatal errors gen erated by FAL 006 are not recorded in the Error Log Even though the error will not be recorded in the Error Log the FAL Error Flag 40215 will be turned ON the corresponding flag in the Executed FAL Num ber Flags A36001 to A39115 will be turned ON and the error code will be written to A400 Disable Error Log entries for FPD 269 time monitoring errors when you wan...

Page 1202: ... time will be stored in T Flags The following table shows relevant words and flags in the Auxiliary Area Item Setting Programming Console setting address Word 129 Bit 15 Name FAL Error Log Registration Settings 0 Record FAL Errors in Error Log 1 Do not record FAL Errors in Error Log Default setting 0 Record FAL Errors in Error Log Times that PLC Setup set ting is read Every cycle when an FAL Error...

Page 1203: ...he operation of the time monitoring function and logic diagnosis function In this example the diagnostic output CIO 020000 does not go ON because CIO 010000 and CIO 010003 remain OFF in the logic diagnosis execution condition Time Monitoring Function If the diagnostic output CIO 020000 does not go ON within 10 seconds after CIO 030000 and CIO 030001 are both ON a non fatal error will be generated ...

Page 1204: ...ting the Monitoring Time with the Teaching Function The monitoring time can be set automatically with the teaching function when a word address has been specified for T R Not used Not used Bit Address Found Flag 1 Bit address found FAL number 10 Diagnostic output mode 0 bit address output Input type 0 Normally open Contains internal I O memory address R 1 D00301 R D00300 R 2 D00302 R 3 D00303 R 4 ...

Page 1205: ...5 3 31 Other Instructions This section describes instructions for manipulating the Carry Flag selecting the EM bank and extending the maximum cycle time T R The teaching function can set the monitoring time in T automatically Execution condition Diagnostic output A59800 CIO 030000 CIO 020000 t s ta 1 5 No error generated Measured time ta Teaching FPD Teaching Bit Execution condition Diagnostic out...

Page 1206: ...et and clear the Carry Flag 3 31 2 CLEAR CARRY CLC 041 Purpose Turns OFF the Carry Flag CY Ladder Symbol Variations DISABLE PERIPHERAL SERVICING IOSP 287 1183 ENABLE PERIPHERAL SERVICING IORS 288 1185 Instruction Mnemonic Function code Page STC 040 Variations Executed Each Cycle for ON Condition STC 040 Executed Once for Upward Differentiation STC 040 Executed Once for Downward Differentiation Not...

Page 1207: ... the Carry Flag in their rotation shift operations When using any of these instructions use STC 040 and CLC 041 to set and clear the Carry Flag Note The 400 L 401 B 404 BL 405 410 L 411 B 414 and BL 415 instructions do no include the Carry Flag in their addition and sub traction operations In general use these instructions when performing addi tion or subtraction 3 31 3 SELECT EM BANK EMBC 281 Pur...

Page 1208: ...O Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 Indirect DM EM addresses in BCD ...

Page 1209: ...ank number is changed to bank C and the new bank number 000C hex is output to A301 3 31 4 EXTEND MAXIMUM CYCLE TIME WDT 094 Purpose Extends the maximum cycle time but only for the cycle in which the instruc tion is executed WDT 094 can be used to prevent errors for long cycle times when a longer cycle time is temporarily required for special processing Ladder Symbol Variations Applicable Program A...

Page 1210: ...M EM addresses in BCD Constants 0000 to 0F9F binary Data Registers Index Registers Indirect addressing using Index Registers Area T Name Function Settings Watchcycle time A Cycle Time Too Long error fatal error will be registered if the cycle time exceeds the maximum setting 0 Default setting 1 000 ms 1 User time setting Sets the maximum cycle time This setting is valid only when the first setting...

Page 1211: ...me by another 1 000 ms Since the maximum cycle time has already reached the upper limit of 40 000 ms the third WDT 094 instruction is not executed 3 31 5 SAVE CONDITION FLAGS CCS 282 Saves the current status of the Condition Flags in a separate area within the CPU Unit The current status of the Flags is preserved so that it can be read restored with CCL 283 at a different location in the program i...

Page 1212: ...een a cyclic task and interrupt task 2 When CCS 282 is executed it overwrites the previous Condition Flag in formation that was saved All of the Condition Flags are cleared when operation switches from one task to another Use the CCS 282 and CCL 283 instructions to save and load the Condition Flag status between tasks or cycles For example the CCS 282 and CCL 283 instructions make it possible to u...

Page 1213: ...CS FPD CCL Task The results of the comparison are stored in the Condition Flags In this case the results of the COMPARE Instruction can be used in instruction B even if those results are affected by execution of instruction A Preserves the status of the Condition Flags in a separate location in the CPU Unit Restores the status of the Condition Flags The Equals Flag will reflect the result of the C...

Page 1214: ...and the result can be restored later The result does not have to be used immediately after execution of the instruction Refer to 3 31 5 SAVE CONDITION FLAGS CCS 282 for more examples showing how to use CCS 282 and CCL 283 Flags There are no flags affected by these instructions 3 31 7 CONVERT ADDRESS FROM CV FRMCV 284 Purpose Converts a CV series PLC memory address to its corresponding CS CJ series...

Page 1215: ...S D S Word containing the CV series PLC memory address D Destination Index Register Variations Executed Each Cycle for ON Condition FRMCV 284 Executed Once for Upward Differentiation FRMCV 284 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK FRMCV D00000 IR1 2001 ...

Page 1216: ...LC memory ad dress in DM 2 When using CV series PLC memory addresses directly as values when storing PLC memory addresses in Index Registers with direct ad dressing using an instruction such as MOV 021 Operand Specifications 0000Hex 0001Hex 2000Hex 2001Hex FFFDHex 0000CH 0001CH D00000 D00001 E32765 0C000Hex 0C001Hex 10000Hex 10001Hex FFFFFHex 0000CH 0001CH D00000 D00001 EC_32767 S IR1 10001Hex D S...

Page 1217: ... hex 0A00 to 0AFF hex or 0D00 to 0E3F hex Data Registers DR0 to DR15 Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 Area S D Name Label Operation Error Flag ER ON if S specifies one of the following PLC memory addresses that do not exist in the CS CJ series Temporary Relay TR Area 09FF hex CPU Bus Link...

Page 1218: ...e addressing CS CJ series program Equivalent program In this case the value in D00000 is 0200 hex The corresponding data area address is CIO 0512 so 1234 is transferred to CIO 0512 Word address D00000 Word address CIO 0512 MOV 021 CS CJ series PLC memory address CS CJ series PLC memory address In this case the value in D00000 is 0200 hex The corresponding CV series data area address is CIO 0512 Th...

Page 1219: ...0000 FRMCV 0200 IR0 S D 0200Hex 0200 IR0 000C200 IR CV series program Program using PLC memory addresses stored directly in IR CS CJ series program Equivalent program In this case the PLC memory address 0200 hex is stored in Index Register IR0 In this case the CV series PLC memory address 0200 hex corresponds to CIO 0512 The CS CJ series PLC memory address for CIO 0512 is 0000C200 hex so this valu...

Page 1220: ...emory address is output to D The following example shows TOCV 285 used to convert the CS CJ series PLC memory address for D00001 Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK TOCV IR1 D00100 10001 Hex IR1 2001 Hex D00001 D00001 10001 Hex D00100 2001 Hex 1 The CS CJ series PLC memory address is converted to its equivalent CS CJ series data area address CS CJ series ...

Page 1221: ...000 D00001 EC_32767 D Specify the CS CJ series PLC memory address in S In this case 10001 hex is the PLC memory address of D00001 Data area address PLC memory address Convert Corresponding data area address CS CJ series The corresponding CV series PLC memory address is stored in D In this case data area address D00001 is converted to PLC memory address 2001 hex and stored Convert CV series Area S ...

Page 1222: ...dress in the CV series program Index Registers IR0 to IR15 Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 Area S D Area or addresses PLC memory addresses Task Flag Area 0000 B800 to 0000 B801 hex A512 to A959 0000 BA40 to 0000 BBFF hex CIO 2556 to CIO 6143 0000 C9FC to 0000 D7FF hex T1024 to T4095 0000 BE40 to 0000 BEFF hex and 0...

Page 1223: ...rea address corresponding to PLC memory address 10001 hex is D00001 so 1234 is transferred to D00001 CV series PLC memory address CS CJ series data area CS CJ series data area address Transfer contents of D00200 to CV series CV series program In this case IR0 contains 10001 hex Since the data area address corresponding to CS CJ series PLC memory address 10001 hex is D00001 TOCV 285 stores the CV s...

Page 1224: ...tions IOSP 287 cannot be executed in an interrupt task An error will occur and the Error Flag will be turned ON if IOSP 287 is executed in an interrupt task IOSP 287 cannot disable peripheral servicing in more than one task If it is necessary to disable peripheral servicing in more than one task program IOSP 287 separately in each task IOSP IORS Disables execution of peripheral servicing Execution...

Page 1225: ... condition IORS 288 cannot be executed in an interrupt task An error will occur and the Error Flag will be turned ON if IORS 288 is executed in an interrupt task Flags IOSP IORS W00000 When the PLC is in Parallel Processing Mode peripheral servicing is executed in parallel When W00000 is ON execution of peripheral servicing is disabled between IOSP 287 and IORS 288 Enables execution of peripheral ...

Page 1226: ...er in one block program Each block is started by one execution condition in the ladder diagram and all instructions within the block are written in mnemonic form The block program is thus a combination of ladder and mnemonic instructions Block programs enable programming operations that can be difficult to pro gram with ladder diagrams such as conditional branches and step progres sions Instructio...

Page 1227: ... used with block programs unless inten tionally programmed with IF 802 WAIT 805 EXIT 806 IEND 810 or other instructions Also there are some instructions that cannot be used within block programs such as those that detect upward and downward differentia tion Block programs can be used either within cyclic tasks or interrupt tasks Each block program number from 0 to 127 can be used only once and can...

Page 1228: ...HW 815 or TMHWX 817 is used If execution is to wait until for a specified count has been reached e g for step progressions with counters then CNTW 814 CNTWX 818 is used If execution is to be repeated within part of a block program until a condition is met then LOOP 809 and LEND 810 are used If execution of the block program is to be ended in the middle based on an execution condition the EXIT 806 ...

Page 1229: ...Instruction type Instruction name Mnemonic Block programming instructions IF NOT IF 802 NOT ONE CYCLE AND WAIT NOT WAIT 805 NOT EXIT EXIT 806 NOT LOOP END LEND 810 NOT Ladder diagram instructions CONDITIONAL JUMP CJP 510 CONDITIONAL JUMP NOT CJPN 511 Mnemonic Name LD LD NOT LOAD LOAD NOT AND AND NOT AND AND NOT OR OR NOT OR OR NOT UP DOWN CONDITION ON CONDITION OFF S L Symbol Comparison Instructio...

Page 1230: ...540 and TIM HHX 552 ONE MS TIMER TIMU 541 and TIMUX 556 TENTH MS TIMER CJ1 H R CPU Units only TIMUH 544 and TIMUHX 557 HUNDREDTH MS TIMER CJ1 H R CPU Units only TTIM 087 and TTIMX 555 ACCUMULATIVE TIMER TIML 542 and TIMLX 553 LONG TIMER MTIM 543 and MTIMX 554 MULTI OUTPUT TIMER CNT and CNTX 546 COUNTER CNTR 012 and CNTRX 548 REVERSIBLE COUNTER Subroutine Instructions SBN 092 and RET 093 SUBROUTINE...

Page 1231: ...ations BPRG 096 BPRG 096 N N Block program number Variations Executed Each Cycle for ON Condition BPRG 096 Executed Once for Upward Differentiation Not supported Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Variations Always Executed in Block Program Block program areas Step program areas Subroutines Interrupt tasks See note OK OK OK Are...

Page 1232: ...thin another block program even if the execution condition for BPRG 096 is ON Flags BPRG 096 BEND 801 Precautions Each block program number can be used only once within the entire user pro gram Block programs cannot be nested If the block program is in an interlocked program section and the execution condition for IL 002 is OFF the block program will not be executed Block program Executed when the...

Page 1233: ...than once Examples When CIO 000000 turns ON in the following example block program 0 will be executed When CIO 000000 is OFF the block program will not be executed The two program sections shown below both execute MOV 021 B 594 and SET for the same execution condition i e when CIO 000000 turns ON 3 32 3 BLOCK PROGRAM PAUSE RESTART BPPS 811 BPRS 812 Purpose Pause and restart the specified block pro...

Page 1234: ...RS 812 restarts the block program specified by N the block program num ber Once restarted the block program will be executed as long as the BPRG 096 for the block program has an ON execution condition Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area N CIO Area Work Area Holding Bit Area Auxiliary Bit Area Timer Area Counter Area DM Area EM Area without bank EM Ar...

Page 1235: ...k program appears before BPPS 811 it will be paused starting the next cycle If CIO 000000 is ON the following program pauses execution of either block program 1 or block program 2 depending on the status of CIO 000001 The block program that was paused is then restarted after 10 seconds Name Label Operation Error Flag ER ON if BPPS 811 or BPRS 812 is not in a block program ON if N is not between 0 ...

Page 1236: ...gram Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area B CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary Bit Area A00000 to A44715 A44800 to A95915 Timer Area T0000 to T4095 Counter Area C0000 to C4095 Task Flags TK0000 to TK0031 Condition Flags ER CY N OF UF ON OFF AER Clock Pulses 0 02 s 0 1 s 0 2 s 1 s 1 ...

Page 1237: ...r IF NOT 802 If the operand bit is ON the instructions between IF 802 and ELSE 803 will be executed If the operand bit is OFF the instructions between ELSE 803 and IEND 804 will be executed For IF NOT 802 the instructions between IF 802 and ELSE 803 will be executed and if the operand bit is ON the instructions be ELSE 803 and IEND 804 will be executed is the operand bit is OFF If the ELSE 803 ins...

Page 1238: ...00 and CIO 000002 The first block executes one of two additions depending on the status of CIO 000001 This block is executed when CIO 000000 is ON If CIO 000001 is ON 0001 is added to the contents of CIO 0001 If CIO 000001 is OFF 0002 is added to the contents of CIO 0001 In either case the result is placed in D00000 The second block is executed when CIO 000002 is ON and shows nesting two levels If...

Page 1239: ...ddress Instruction Operands 000000 LD 000000 000001 BPRG 096 00 000002 IF 802 000001 000003 B 404 0001 0001 D00000 000004 ELSE 803 000005 B 404 0001 0002 D00000 000006 IEND 804 000007 BEND 801 000008 LD 000002 000009 BPRG 096 1 000010 LD 000003 000011 AND 000004 000012 IF 802 000013 B 404 1200 0002 D00010 000014 IF 802 A50004 000015 MOV 030 0001 D00011 000016 IEND 804 000017 ELSE 803 000018 SET 01...

Page 1240: ...ot be executed Variations Always Executed in Block Program EXIT 806 EXIT 806 B EXIT NOT 806 B Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area B CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary Bit Area A00000 to A44715 A44800 to A95915 Timer Area T0000 to T4095 Counter Area C0000 to C4095 Task Flags TK0000 ...

Page 1241: ...IO 000000 is OFF the block program is executed If CIO 000001 is ON A is executed and then B is skipped and program control jumps to BEND 801 Section B of the program will continue to be skipped until CIO 000001 turns OFF again Although EXIT NOT 806 is similar to IF IEND programming execution time is normally shorter for EXIT NOT 806 because the instructions from EXIT NOT 806 to the end of the bloc...

Page 1242: ...tions CIO 000001 ON CIO 000004 ON CIO 000001 OFF CIO 000004 OFF 0 2 Block ended Block ended CIO 000003 and CIO 000003 or WAIT 805 WAIT 805 WAIT 805 NOT B B B Bit operand Variations Always Executed in Block Program Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK Area B CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxil...

Page 1243: ...cution condition for WAIT 805 When the execution condition goes ON the instruction from WAIT 805 to the end of the program will be executed DM Area EM Area without bank EM Area with bank Indirect DM EM addresses in binary Indirect DM EM addresses in BCD Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 I...

Page 1244: ...s are recorded in memory to enable execu tion to be continued based on the execution condition bit operand If online editing performed from a Peripheral Device however the WAIT status will be cleared and the block program will again be executed from the beginning Examples When CIO 000000 is ON in the following example block program 00 will be executed Execution would proceed as follows 1 2 3 1 If ...

Page 1245: ...IT 805 will be cleared and the block program will be exe cuted again from the beginning CIO 000 001 OFF 0 CIO 00000 1 ON and CIO 00000 2 OFF CIO 000001 CIO 00002 and CIO 000003 ON CIO 00000 1 ON CIO 00000 2 ON and CIO 00000 3 OFF Operand bits Program execution CIO 000001 CIO 000002 CIO 000003 First cycle CIO 000000 is ON Next cycle Following cycles OFF Any status Any status Nothing executed Nothin...

Page 1246: ...Binary 0 to 65535 decimal 0000 to FFFF hex Operand Specifications TIMW 813 N SV N Timer number SV Set value TIMWX 816 N SV N Timer number SV Set value Variations Always Executed in Block Program Block program areas Step program areas Subroutines Interrupt tasks OK OK OK Not allowed Area N SV CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 ...

Page 1247: ... will be executed to update the timer When the timer times out the Completion Flag will turn ON and the rest of the block program will be executed Once the entire block program has been executed the process will be repeated TIMW 813 TIMWX 816 can be thought of as a WAIT instruction with a timer for the execution condition and it can thus be used for timed step progres sions Flags Constants BCD 000...

Page 1248: ...e timers is ever operating at the same time An error will occur in the program check if the same timer number is used in more than one timer instruction An error will occur and the Error Flag will turn ON if an indirect IR designation is used for N in BCD mode and the address is not for a timer present value or if SV is not BCD The timer will not operate correctly if the cycle time is 100 ms or lo...

Page 1249: ...r counts out Ladder Symbol PV Refresh Method BCD PV Refresh Method Binary Variations Applicable Program Areas Note CNTW 814 CNTWX 818 must be used in block programming regions even within subroutines and interrupt tasks Operands N Counter Number BCD 0 to 4095 decimal Binary 0 to 4095 decimal S Set Value BCD 0000 to 9999 BCD Binary 0 to 65535 decimal 0000 to FFFF hex 1 2 3 4 CNTW 814 N SV I N Count...

Page 1250: ...5 A44800 to A95915 Timer Area T0000 to T4095 T0000 to T4095 Counter Area C0000 to C4095 C0000 to C4095 C0000 to C4095 Task Flags TK0000 to TK0031 Condition Flags ER CY N OF UF ON OFF AER Clock Pulses 0 02 s 0 1 s 0 2 s 1 s 1 min DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 t...

Page 1251: ...unter is force set If the Completion Flag for the counter is force reset the only CNTW 814 CNTWX 818 will be executed in the block program until the force reset status is cleared The counter numbers are also used by the other counter instructions Opera tion will not be predictable if the same counter number is used for more than one counter instruction Use each counter number only once The only wa...

Page 1252: ...3 32 9 TEN MS TIMER WAIT TMHW 815 and TMHWX 817 Purpose Delays execution of the rest of the block program until the specified time has elapsed Execution will be continued from the next instruction after TMHW 815 TMHWX 817 when the timer times out Ladder Symbol PV Refresh Method BCD PV Refresh Method Binary Address Instruction Operand 000200 LD 000000 000201 BPRG 0 A 000210 CNTW 0005 7000 000100 B ...

Page 1253: ...00 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 Timer Area 0000 to 4095 T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D0000...

Page 1254: ...struction with a timer for the execution condition and it can thus be used for timed step pro gressions Flags Precautions The rest of the block program following TMHW 815 TMHWX 817 will be exe cuted if the Completion Flag for the timer is force set If the Completion Flag for the timer is force reset the only TMHW 815 TMHWX 817 will be executed in the block program until the force reset status is c...

Page 1255: ... 20 seconds after A whenever CIO 000000 is ON 3 32 10 Loop Control LOOP 809 LEND 810 LEND 810 NOT Purpose Create a loop that is repeatedly executed until an execution condition turns ON or OFF or until an execution condition turns ON Ladder Symbol Variations Applicable Program Areas Note LOOP 809 LEND 810 and LEND 810 NOT must be used in block pro gramming regions even within subroutines and inter...

Page 1256: ... turns ON Area B CIO Area CIO 000000 to CIO 614315 Work Area W00000 to W51115 Holding Bit Area H00000 to H51115 Auxiliary Bit Area A00000 to A44715 A44800 to A95915 Timer Area T0000 to T4095 Counter Area C0000 to C4095 Task Flags TK0000 to TK0031 Condition Flags ER CY N OF UF ON OFF AER Clock Pulses 0 02 s 0 1 s 0 2 s 1 s 1 min DM Area EM Area without bank EM Area with bank Indirect DM EM addresse...

Page 1257: ...F for LEND 810 or ON for LEND 810 NOT exe cution of the loop is repeated starting with the next instruction after LOOP 809 If the operand bit is ON for LEND 810 or OFF for LEND 810 NOT the loop is ended and execution continues to the next instruction after LEND 810 or LEND 810 NOT Note 1 Execution inside a loop does not refresh I O data If I O data must be re freshed during the loop use IORF 184 2...

Page 1258: ...02 IEND 804 IEND 804 IEND 804 LEND 810 LEND 810 IEND 804 NOP processing will be performed if LOOP 809 is not executed An error will occur and the Error Flag will turn ON if a Loop Control Instruction is not in a block program Examples When CIO 000000 is ON in the following example the block program is exe cuted After A is executed B and the IORF 184 after it will be executed repeatedly until CIO 0...

Page 1259: ...tions Section 3 32 Address Instruction Operand 000220 LD 000000 000201 BPRG 0 A 000210 LOOP B 000220 IORF 0000 0000 000221 LEND 000001 C 000220 BEND 0 Execution condition ON Execution condition OFF Execution condition OFF Repeating ...

Page 1260: ...diagram a text string can be specified by simply designating the first word of that string The text string data up until the next NUL code 00 hex will then be handled as a single block of ASCII data Text string processing instructions can be used to execute at a PLC the vari ous kinds of text string processing product data and so on that used to be executed at the host computer Instruction Mnemoni...

Page 1261: ... PLC thereby reduc ing the data processing load at the host computer ASCII Characters The ASCII characters that can be handled by text string processing instruc tions are shown in the following table 3 33 2 MOV STRING MOV 664 Purpose Transfers a text string Ladder Symbol PLC Text string processing Text string Host computer Host computer Text string processing S P Four leftmost bits Four rightmost ...

Page 1262: ...on Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 0 S to Text string data 4 095 characters max NUL S maximum 2 047 words 15 0 D to Text string data 4 095 characters max NUL D maximum 2 047 words Area S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer ...

Page 1263: ...xample In this example MOV 664 is used to transfer the text string ABCDEF 3 33 3 CONCATENATE STRING 656 Purpose Links one text string to another text string Ladder Symbol Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 to IR15 IR0 to IR15 Area S D Name Label Operation Error Flag ER ON if more than 4 095 charact...

Page 1264: ...on 656 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 0 S1 to Text string data 4 095 characters max NUL S1 maximum 2 047 words 15 0 S2 to Text string data 4 095 characters max NUL S2 maximum 2 047 words 15 0 D to Text string data 4 095 characters max NUL D ma...

Page 1265: ...e generated and the Error Flag will turn ON If 0000 hex is transferred to D the Equals Flag will turn ON Do not overlap the beginning word designated by D with the character data area for S2 If they overlap the instruction cannot be executed properly Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E...

Page 1266: ...he maximum 2 047 words must be in the same area 2 The data from S1 to S1 the maximum 2 047 words and from D to D the maximum 2 047 words can overlap LEFT 652 S1 S2 D S1 Text string first word S2 Number of characters D First destination word Variations Executed Each Cycle for ON Condition LEFT 652 Executed Once for Upward Differentiation LEFT 652 Executed Once for Downward Differentiation Not suppo...

Page 1267: ... to the SYSMAC CS CJ NSJ Series PLC Programming Manual W394 for details Area S1 S2 D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect ...

Page 1268: ...ated by S1 ON if more than 4 095 characters 0FFF hex are desig nated by S2 ON if the Communications Port Enabled Flag for the com munications port number specified as the Com Port num ber for Background Execution is OFF when background processing is specified OFF in all other cases Equals Flag ON if 0000 hex is output to D OFF in all other cases S1 43 44 D S2 D00200 D D00300 Text string ABCDE Text...

Page 1269: ...1 S2 D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_327...

Page 1270: ...more than that are designated an error will be gener ated and the Error Flag will turn ON If 0000 hex is output to D the Equals Flag will turn ON Example In this example RGHT 653 is used to read four characters 3 33 6 GET STRING MIDDLE MID 654 Purpose Reads a designated number of characters from any position in the middle of a text string Ladder Symbol Name Label Operation Error Flag ER ON if more...

Page 1271: ...MID 654 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 0 S1 to Text string data 4 095 characters max NUL S1 maximum 2 047 words 15 0 D to Text string data 4 095 characters max NUL D maximum 2 047 words Area S1 S2 S3 D CIO Area CIO 0000 to CIO 6143 Work Area W...

Page 1272: ...ange an error will be generated and the Error Flag will turn ON Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to 0FFF binary or 0 to 4095 0001 to 0FFF binary or 1 to 4095 Data Registers DR0 to DR15 Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0 to 2048 to 2047 IR15 DR0 to DR15 IR0 to IR15 IR0 t...

Page 1273: ...ymbol Variations Applicable Program Areas Operands S1 Source Text String S2 Found Text String S1 S3 D D00300 S2 D00200 S3 D00400 Text string ABCDEFGHIJ Three characters read From 5th character leftmost byte in D00102 Text string EFG FIND 660 S1 S2 D S1 Source text string first word S2 Found text string first word D First destination word Variations Executed Each Cycle for ON Condition FIND 660 Exe...

Page 1274: ...PLC Programming Manual W394 for details Area S1 S2 D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000...

Page 1275: ...n 4 095 characters are designated by S1 or S2 ON if the Communications Port Enabled Flag for the com munications port number specified as the Com Port num ber for Background Execution is OFF when background processing is specified OFF in all other cases Equals Flag ON if 0000 hex is output to D OFF in all other cases S1 D00100 S2 D00200 D D00300 Text string C Text string ABCDEF LEN 650 S D S Text ...

Page 1276: ...PLC Programming Manual W394 for details Area S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to ...

Page 1277: ...f the calculated result comes to more than 4 095 characters ON if the Communications Port Enabled Flag for the com munications port number specified as the Com Port num ber for Background Execution is OFF when background processing is specified OFF in all other cases Equals Flag ON if the calculated result is 0 OFF in all other cases S 41 43 45 42 44 00 D D00200 Text string ABCDE RPLC 661 S1 S2 S3...

Page 1278: ... 0 S1 to Text string data 4 095 characters max NUL S1 maximum 2 047 words 15 0 S2 to Text string data 4 095 characters max NUL S2 maximum 2 047 words 15 0 D to Text string data 4 095 characters max NUL S2 maximum 2 047 words Area S1 S2 S3 S4 D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T000...

Page 1279: ... 661 can be processed in the background Refer to the SYSMAC CS CJ NSJ Series PLC Programming Manual W394 for details Flags Precautions The maximum number of characters for S1 or S2 is 4 095 0FFF hex If there are more than that i e if there is no NUL before the 4 096th character an error will be generated and the Error Flag will turn ON Constants 0000 to 0FFF binary or 0 to 4095 0001 to 0FFF binary...

Page 1280: ...ple In this example RPLC 654 is used to read three characters 3 33 10 DELETE STRING DEL 658 Purpose Deletes a designated text string from the middle of a text string Ladder Symbol Variations Applicable Program Areas Operands S1 Text String S1 D S3 D00300 D2 D00200 D4 D00500 Text string ABCDHI From 5th byte Three characters replaced Text string ABCDEFGHI Text string M DEL 658 S1 S2 S3 D S1 Text str...

Page 1281: ...0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect...

Page 1282: ...ror Flag will turn ON If the number of characters to be deleted extends beyond the end of the S1 text string all of the characters up to the end will be deleted If all of the char acters from the beginning of S1 to the end are designated to be deleted then 000 hex will be output to D Example In this example DEL 658 is used to read three characters 3 33 11 EXCHANGE STRING XCHG 665 Purpose Replaces ...

Page 1283: ... for ON Condition XCHG 665 Executed Once for Upward Differentiation XCHG 665 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 0 Ex1 to Text string data 4 095 characters max NUL Ex1 maximum 2 047 words 15 0 to Ex2 Text string data 4 095 characters max NUL Ex2 ma...

Page 1284: ... be generated and the Error Flag will turn ON Example In this example XCHG 665 is used to exchange two text strings Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to...

Page 1285: ...ing first word Variations Executed Each Cycle for ON Condition CLR 666 Executed Once for Upward Differentiation CLR 666 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 0 S to Text string data 4 095 characters max NUL S maximum 2 047 words Area S CIO Area CIO 0...

Page 1286: ...S 657 Purpose Deletes a designated text string from the middle of a text string Ladder Symbol Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers Index Registers Indirect addressing using Index Registers IR0 to IR15 2048 to 2047 IR0...

Page 1287: ...ap The data from S1 to S1 the maximum 2 047 words and from S2 to S2 the maximum 2 047 words can also overlap INS 657 S1 S2 S3 D S1 Base text string first word S2 Inserted text string first word S3 Beginning position D First destination word Variations Executed Each Cycle for ON Condition INS 657 Executed Once for Upward Differentiation INS 657 Executed Once for Downward Differentiation Not support...

Page 1288: ...NS 657 can be processed in the background Refer to the SYSMAC CS CJ NSJ Series PLC Programming Manual W394 for details Area S1 S2 S3 D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area...

Page 1289: ...not overlap the destination words designated by D with the text string data designated by S2 If these overlap the operation will not be executed properly Example In this example INS 657 is used to insert two characters Name Label Operation Error Flag ER ON if more than 4 095 characters are designated by S1 or S2 ON if S3 exceeds 4 095 0FFF hex ON if the Communications Port Enabled Flag for the com...

Page 1290: ...iations Applicable Program Areas Operands S1 Text String 1 S1 S2 S1 S2 S1 S2 Symbol Symbol Symbol LD Load AND Series Connection OR Parallel Connection S1 Text string 1 S2 Text string 2 S1 Text string 1 S2 Text string 2 S1 Text string 1 S2 Text string 2 Variations Creates ON Each Cycle Com parison is True String comparison instructions Immediate Refreshing Specification Not supported Block program ...

Page 1291: ...n ics listed below LD AND and OR do not appear in the ladder diagram LD AND OR LD AND OR LD AND OR 15 0 S2 to Text string data 4 095 characters max NUL S2 maximum 2 047 words Area S1 S2 CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A447 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area...

Page 1292: ... to fill in the difference and the compar ison will be made on that basis Comparison Examples AD 414400 hex and BC 424300 hex AD BC because at the beginning of the text strings 41 hex is less than 42 hex Mnemonic including function code Name Function LD 670 LOAD STRING EQUALS True when S1 text string equals S2 text string AND 670 AND STRING EQUALS OR 670 OR STRING EQUALS LD 671 LOAD STRING NOT EQU...

Page 1293: ...struction after these instructions The String Compari son Instructions cannot appear on the right side of the ladder diagram These instructions cannot be used on the last rung of a logic block The maximum number of characters that can be compared is 4 095 0FFF hex If that number is exceeded i e if there is no NUL before the 4 096th character an error will occur and the Error Flag will turn ON When...

Page 1294: ...0 is higher in ASCII order than the one beginning with D00200 then the position of the two text strings will be reversed Two text strings beginning with D00200 and D00300 are compared in ASCII order from lower to higher If the text string beginning with D00200 is higher in ASCII order than the one beginning with D00300 then the position of the two text strings will be reversed Juice The juice and ...

Page 1295: ...clic tasks CS1 H CJ1 H CJ1M and CS1D CPU Units only N must be a constant between 8000 and 8255 decimal Values 8000 to 8255 specify extra cyclic tasks 0 to 255 Operand Specifications Instruction Mnemonic Function code Page TASK ON TKON 820 1255 TASK OFF TKOF 821 1258 N TKON 820 N Task number Variations Executed Each Cycle for ON Condition TKON 820 Executed Once for Upward Differentiation TKON 820 E...

Page 1296: ...local task is specified A task in executable status can be put in standby status with TKOF 821 the CX Programmer or a FINS command The terms executable and executing are not interchangeable Executable tasks are executed in order of their task numbers during cyclic program exe cution An executable task will not be executed if it is put in standby status before program execution reaches its task num...

Page 1297: ...task is executed in task number order Flags Examples Specifying a Later Task When CIO 000000 is ON in the following example task number 3 is made executable in task number 1 Task number 3 will be executed in the same cycle when program execution reaches task number 3 Name Label Operation Error Flag ER ON if N is not a constant between 00 and 31 or between 8000 and 8255 CS1 H CJ1 H and CJ1M CPU Uni...

Page 1298: ...N Task number The allowed range for N depends on the kind of task being specified Cyclic tasks N must be a constant between 0 and 31 decimal Values 0 to 31 specify cyclic tasks 0 to 31 Extra cyclic tasks CS1 H CJ1 H CJ1M and CS1D CPU Units only N must be a constant between 8000 and 8255 decimal Values 8000 to 8255 specify extra cyclic tasks 0 to 255 Task number 1 is executed in the next cycle Task...

Page 1299: ...X Programmer s General Properties Tab for each task has a setting the Operation start box that specifies whether the cyclic task will be exe cutable at startup When the Operation start box has been checked the corresponding cyclic task will be put in executable status automatically when the PLC begins operation All other cyclic tasks will be in non exe cutable status If the memory all clear operat...

Page 1300: ...his instruction can be placed in interrupt tasks as well as in cyclic tasks Flags The specified task s task number is higher than the local task s task number m n The specified task s task number is lower than the local task s task number m n Task m Task n In standby status that cycle Task n Task m In standby status the next cycle Name Label Operation Error Flag ER ON if N is not a constant betwee...

Page 1301: ...tatus in task number 3 Task number 1 will be not be executed in the next cycle when program execution reaches task number 1 3 35 Model Conversion Instructions Unit Ver 3 0 or Later This section describes instructions used when changing PLC models 03 Task number 3 is in standby status in the same cycle i e it is not executed in the current or following cycles Task 1 Task 3 01 Task number 1 is in st...

Page 1302: ...ting device type to CS CJ with CX Programmer Ver 4 0 or lower When converting device type to CS CJ with CX Programmer Ver 5 0 or higher Mnemonic function code Mnemonic function code C200H C1000H or C2000H C200HS C2000HX HG HE Z CQM1 CQM1H CPM1 CPM1A CPM2C or SRM1 BLOCK TRANSFER XFERC 565 XFER 70 Same Same Converted to XFER If a word address is specified for the first operand number of words to tra...

Page 1303: ...ecutive words Ladder Symbol Name Model conversion instruction Unit Ver 3 0 or later Corresponding C series instruction Differences from previous CS CJ series instructions Mnemonic function code Mnemonic function code BLOCK TRANSFER XFERC 565 XFER 70 The data type for the first operand number of words to transfer is BCD 0000 to 9999 instead of binary 0000 to FFFF hex SINGLE WORD DISTRIBUTE DISTC 56...

Page 1304: ...orted Immediate Refreshing Specification Not supported Block program areas Step program areas Subroutines Interrupt tasks OK OK OK OK 15 0 S S N 1 to to 15 0 D D N 1 to to Area N S D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area wi...

Page 1305: ...on words D to D N 1 do not exceed the end of the data area Some time will be required to complete XFERC 565 when a large number of words is being transferred In this case the XFERC 565 transfer might not be completed if a power interruption occurs during execution of the instruction The content of N must be BCD If N is not BCD an error will occur and the Error Flag will be turned ON Example When C...

Page 1306: ... Operation 9000 to 9999 BCD When the leftmost digit of Of is 9 the rightmost 3 digits of Of specify the number of words in the stack The offset can be any value from 9000 to 9999 BCD Operand Specifications DISTC 566 S S Source word Bs Destination base address Of Offset Bs Of Variations Executed Each Cycle for ON Condition DISTC 566 Executed Once for Upward Differentiation DISTC 566 Executed Once f...

Page 1307: ...tent of Bs 1 to address Bs The same DISTC 566 instruction can be used to distribute the source word to various words in the data area by changing the value of Of EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 ...

Page 1308: ...a Distribution Operation The leftmost byte of D00300 is 0 so DISTC 566 performs the Data Distribu tion Operation When CIO 000000 is ON in the following example the contents of D00100 will be copied to D00210 D00200 10 if the content of D00300 is 0010 BCD The content of D00100 can be copied to other words by changing the offset in D00300 Stack Push Operation The leftmost byte of Of is 9 so DISTC 56...

Page 1309: ...same data area LIFO Stack Read Operation Of 8000 to 8999 BCD If the leftmost digit of Of is 8 COLLC 567 will operate as a LIFO stack instruction The stack begins at Bs with a length specified in the rightmost 3 digits of Of S D00100 Bs D00200 D00201 D00209 Stack area Stack pointer Stack data area S DISTC Bs Of D00100 D00260 9010 0 0 0 F Stack area Stack area Allocated stack Stack Push After 1st ex...

Page 1310: ...rce words in the data area by changing the value of Of Area Bs Of D CIO Area CIO 0000 to CIO 6143 Work Area W000 to W511 Holding Bit Area H000 to H511 Auxiliary Bit Area A000 to A959 A448 to A959 Timer Area T0000 to T4095 Counter Area C0000 to C4095 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D000...

Page 1311: ...orded in the stack to D The source word is Bs 1 After the data is copied the stack pointer is decre mented by 1 Note Use DISTC 566 to write stack data to the stack area Flags Note In C series PLCs the DATA COLLECT COLL instruction will cause the Error Flag to go ON if the content of an indirectly addressed DM word DM is not BCD or the DM area boundary is exceeded COLLC 567 will not cause the Error...

Page 1312: ... is 9 so COLLC 567 performs the FIFO Stack Opera tion When CIO 000000 is ON in the following example COLLC 567 allocates a 10 word stack area since the rightmost 3 digits of Of are 010 between D00100 and D00109 At the same time the contents of D00101 Bs 1 are copied to D00300 Finally the stack pointer is decremented by 1 LIFO Stack Operation The leftmost byte of Of is 8 so COLLC 567 performs the L...

Page 1313: ...0 0 0 0 LIFO Read 5 6 7 8 1 2 3 4 0 0 0 2 D00102 D00300 5 6 7 8 1 2 3 4 S C D MOVBC 568 S Source word or data C Control word D Destination word Variations Executed Each Cycle for ON Condition MOVBC 568 Executed Once for Upward Differentiation MOVBC 568 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported Block program areas Step program areas Su...

Page 1314: ...not cause the Error Flag to go ON in these cases EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0000 to FFFF binary Specified values only Data Registers DR0 to DR15 Index Registers Indirect addr...

Page 1315: ...must be 0001 to 9999 BCD S First source word S and S N 1 must be in the same data area Operand Specifications 1 2 0 5 BCNTC 621 N S R N Number of words S First source word R Result word Variations Executed Each Cycle for ON Condition BCNTC 621 Executed Once for Upward Differentiation BCNTC 621 Executed Once for Downward Differentiation Not supported Immediate Refreshing Specification Not supported...

Page 1316: ...10 words from CIO 0100 through CIO 0109 and writes the result to D00100 DM Area D00000 to D32767 EM Area without bank E00000 to E32767 EM Area with bank En_00000 to En_32767 n 0 to C Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants 0001 to 9999...

Page 1317: ...ss of the source data in 4 digit hexadecimal Operand Specifications R D00100 000000 0010 D100 D00100 N S R BCNTC to to Counts the number of ON bits 35 0035 BCD 3 5 GETID 286 S D1 D2 S Source data D1 Variable code D2 Word address Variations Executed Each Cycle for ON Condition GETID 286 Executed Once for Upward Differentiation GETID 286 Executed Once for Downward Differentiation Not supported Immed...

Page 1318: ...area that variable s address must be set In this case GETID 286 can be used to retrieve the variable s data area address Flags Indirect DM EM addresses in binary D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Indirect DM EM addresses in BCD D00000 to D32767 E00000 to E32767 En_00000 to En_32767 n 0 to C Constants Data Registers DR0 to DR15 Index Registers Indirect addressing using...

Page 1319: ...rea Indirect specifica tion The starting address of the extended parameter set tings area is specified by the FINS command variable type data area code and word address In this exam ple 0082 specifies the DM Area and 100 specifies a 100 word offset from the beginning of the area DM Area allocated to Motion Control Unit Extended parameter settings area Variable A D00200 Data Variable A s data area ...

Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...

Page 1321: ...Processing Instructions 1301 4 1 16 Data Control Instructions 1302 4 1 17 Subroutine Instructions 1303 4 1 18 Interrupt Control Instructions 1303 4 1 19 Step Instructions 1303 4 1 20 Basic I O Unit Instructions 1304 4 1 21 Serial Communications Instructions 1305 4 1 22 Network Instructions 1305 4 1 23 File Memory Instructions 1306 4 1 24 Display Instructions 1306 4 1 25 Clock Instructions 1307 4 1...

Page 1322: ...sic I O Unit Instructions 1338 4 2 22 Serial Communications Instructions 1339 4 2 23 Network Instructions 1340 4 2 24 File Memory Instructions 1341 4 2 25 Display Instructions 1341 4 2 26 Clock Instructions 1341 4 2 27 Debugging Instructions 1342 4 2 28 Failure Diagnosis Instructions 1342 4 2 29 Other Instructions 1343 4 2 30 Block Programming Instructions 1343 4 2 31 Text String Processing Instru...

Page 1323: ...n the user program area for each of the CS series instructions varies from 1 to 7 steps depending upon the instruction and the operands used with it The number of steps in a pro gram is not the same as the number of instructions Note 1 Program capacity for CS series PLCs is measured in steps whereas pro gram capacity for previous OMRON PLCs such as the C series and CV series PLCs was measured in w...

Page 1324: ... 45 1 45 1 45 1 Increase for C200H AND NOT AND NOT 1 0 02 0 04 0 04 0 08 AND NOT 2 21 14 21 16 21 16 21 16 Increase for CS Series 45 1 45 1 45 1 45 1 Increase for C200H OR OR 1 0 02 0 04 0 04 0 08 OR 2 21 14 21 16 21 16 21 16 Increase for CS Series 45 1 45 1 45 1 45 1 Increase for C200H OR NOT OR NOT 1 0 02 0 04 0 04 0 08 OR NOT 2 21 14 21 16 21 16 21 16 Increase for CS Series 45 1 45 1 45 1 45 1 ...

Page 1325: ... for C200H KEEP KEEP 011 1 0 06 0 08 0 25 0 29 DIFFERENTI ATE UP DIFU 013 2 0 24 0 40 0 46 0 54 DIFFERENTI ATE DOWN DIFD 014 2 0 24 0 40 0 46 0 54 SET SET 1 0 02 0 06 0 17 0 21 SET 2 21 37 21 37 21 37 21 37 Increase for CS Series 49 3 49 3 49 3 49 3 Increase for C200H RESET RSET 1 0 02 0 06 0 17 0 21 Word specified RSET 2 21 37 21 37 21 37 21 37 Increase for CS Series 49 3 49 3 49 3 49 3 Increase ...

Page 1326: ...ck not set 8 9 9 7 Not during inter lock and inter lock set MULTI INTERLOCK DIFFEREN TIATION RELEASE See note 2 MILR 518 3 6 1 6 5 During interlock 7 5 7 9 Not during inter lock and inter lock not set 8 9 9 7 Not during inter lock and inter lock set MULTI INTERLOCK CLEAR See note 2 MILC 519 2 5 0 5 6 Interlock not cleared 5 7 6 2 Interlock cleared JUMP JMP 004 2 0 38 0 48 8 1 8 1 JUMP END JME 005 ...

Page 1327: ... 16 1 17 0 21 4 21 4 10 9 11 4 14 8 14 8 When resetting 8 5 8 7 10 7 10 7 When interlock ing TTIMX 555 3 16 1 17 0 10 9 11 4 When resetting 8 5 8 7 When interlock ing LONG TIMER TIML 542 4 7 6 10 0 12 8 12 8 6 2 6 5 7 8 7 8 When interlock ing TIMLX 553 4 7 6 10 0 6 2 6 5 When interlock ing MULTI OUT PUT TIMER MTIM 543 4 20 9 23 3 26 0 26 0 5 6 5 8 7 8 7 8 When resetting MTIMX 554 4 20 9 23 3 5 6 5...

Page 1328: ... OR 315 LD AND OR 320 LD AND OR 325 Input Compari son Instruc tions double unsigned LD AND OR L 301 4 0 10 0 16 0 29 0 54 LD AND OR L 306 LD AND OR L 311 LD AND OR L 316 LD AND OR L 321 LD AND OR L 326 Input Compari son Instruc tions signed LD AND OR S 302 4 0 10 0 16 6 50 6 50 LD AND OR S 307 LD AND OR S 312 LD AND OR 317 LD AND OR S 322 LD AND OR S 327 Input Compari son Instruc tions double sign...

Page 1329: ...PARE CMP 020 3 0 04 0 04 0 17 0 29 CMP 020 7 42 1 42 1 42 4 42 4 Increase for CS Series 90 4 90 4 90 5 90 5 Increase for C200H DOUBLE COMPARE CMPL 060 3 0 08 0 08 0 25 0 46 SIGNED BINARY COM PARE CPS 114 3 0 08 0 08 6 50 6 50 CPS 114 7 35 9 35 9 42 4 42 4 Increase for CS Series 84 1 84 1 90 5 90 5 Increase for C200H DOUBLE SIGNED BINARY COM PARE CPSL 115 3 0 08 0 08 6 50 6 50 TABLE COM PARE TCMP 0...

Page 1330: ...E MOVE NOT MVNL 499 3 0 32 0 34 0 42 0 50 MOVE BIT MOVB 082 4 0 24 0 34 7 5 7 5 MOVE DIGIT MOVD 083 4 0 24 0 34 7 3 7 3 MULTIPLE BIT TRANS FER XFRB 062 4 10 1 10 8 13 6 13 6 Transferring 1 bit 186 4 189 8 269 2 269 2 Transferring 255 bits BLOCK TRANSFER XFER 070 4 0 36 0 44 11 2 11 2 Transferring 1 word 300 1 380 1 633 5 633 5 Transferring 1 000 words BLOCK SET BSET 071 4 0 26 0 28 8 5 8 5 Setting...

Page 1331: ...DOUBLE SHIFT LEFT ASLL 570 2 0 40 0 56 0 50 0 67 ARITHMETIC SHIFT RIGHT ASR 026 2 0 22 0 32 0 29 0 37 DOUBLE SHIFT RIGHT ASRL 571 2 0 40 0 56 0 50 0 67 ROTATE LEFT ROL 027 2 0 22 0 32 0 29 0 37 DOUBLE ROTATE LEFT ROLL 572 2 0 40 0 56 0 50 0 67 ROTATE LEFT WITHOUT CARRY RLNC 574 2 0 22 0 32 0 29 0 37 DOUBLE ROTATE LEFT WITHOUT CARRY RLNL 576 2 0 40 0 56 0 50 0 67 ROTATE RIGHT ROR 028 2 0 22 0 32 0 ...

Page 1332: ...FT NSLL 582 3 0 40 0 56 0 50 0 67 SHIFT N BITS RIGHT NASR 581 3 0 22 0 32 0 29 0 37 DOUBLE SHIFT N BITS RIGHT NSRL 583 3 0 40 0 56 0 50 0 67 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 INCREMENT BINARY 590 2 0 22 0 32 0 29 0 37 DOUBLE INCREMENT BINARY L 591 2 0 40 0 56 0 50 0 67 DECREMENT BINARY 592 2 0 22 0 32 0 29 0 37 DOUBLE DEC RE...

Page 1333: ...Y C 402 4 0 18 0 20 0 25 0 37 DOUBLE SIGNED BINARY ADD WITH CARRY CL 403 4 0 32 0 34 0 42 0 54 BCD ADD WITHOUT CARRY B 404 4 8 2 8 4 14 0 14 0 DOUBLE BCD ADD WITHOUT CARRY BL 405 4 13 3 14 5 19 0 19 0 BCD ADD WITH CARRY BC 406 4 8 9 9 1 14 5 14 5 DOUBLE BCD ADD WITH CARRY BCL 407 4 13 8 15 0 19 6 19 6 SIGNED BINARY SUBTRACT WITHOUT CARRY 410 4 0 18 0 20 0 25 0 37 DOUBLE SIGNED BINARY SUBTRACT WITH...

Page 1334: ... 58 DOUBLE SIGNED BINARY MULTIPLY L 421 4 7 23 8 45 11 19 11 19 UNSIGNED BINARY MULTIPLY U 422 4 0 38 0 40 0 50 0 58 DOUBLE UNSIGNED BINARY MULTIPLY UL 423 4 7 1 8 3 10 63 10 63 BCD MULTI PLY B 424 4 9 0 9 2 12 8 12 8 DOUBLE BCD MULTI PLY BL 425 4 23 0 24 2 35 2 35 2 SIGNED BINARY DIVIDE 430 4 0 40 0 42 0 75 0 83 DOUBLE SIGNED BINARY DIVIDE L 431 4 7 2 8 4 9 8 9 8 UNSIGNED BINARY DIVIDE U 432 4 0 ...

Page 1335: ...NED BINARY SIGN 600 3 0 32 0 34 0 42 0 50 DATA DECODER MLPX 076 4 0 32 0 42 8 8 8 8 Decoding 1 digit 4 to 16 0 98 1 20 12 8 12 8 Decoding 4 dig its 4 to 16 3 30 4 00 20 3 20 3 Decoding 1 digit 8 to 256 6 50 7 90 33 4 33 4 Decoding 2 dig its 8 to 256 DATA ENCODER DMPX 077 4 7 5 7 9 10 4 10 4 Encoding 1 digit 16 to 4 49 6 50 2 59 1 59 1 Encoding 4 dig its 16 to 4 18 2 18 6 23 6 23 6 Encoding 1 digit...

Page 1336: ...ng No 1 6 8 7 1 10 9 10 9 Data format set ting No 2 7 2 7 5 11 5 11 5 Data format set ting No 3 DOUBLE SIGNED BINARY TO BCD BDSL 473 4 8 1 8 4 11 6 11 6 Data format set ting No 0 8 2 8 6 11 8 11 8 Data format set ting No 1 8 3 8 7 12 0 12 0 Data format set ting No 2 8 8 9 2 12 5 12 5 Data format set ting No 3 GRAY CODE CON VERSION See note 2 GRY 474 4 46 9 72 1 8 bit binary 49 6 75 2 8 bit BCD 57 ...

Page 1337: ... NUM16 606 3 52 31 78 25 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 LOGICAL AND ANDW 034 4 0 18 0 20 0 25 0 37 DOUBLE LOGICAL AND ANDL 610 4 0 32 0 34 0 42 0 54 LOGICAL OR ORW 035 4 0 22 0 32 0 25 0 37 DOUBLE LOGICAL OR ORWL 61...

Page 1338: ...7 4 0 3 0 38 22 1 22 1 Counting 1 word Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 FLOATING TO 16 BIT FIX 450 3 10 6 10 8 14 5 14 5 FLOATING TO 32 BIT FIXL 451 3 10 8 11 0 14 6 14 6 16 BIT TO FLOATING FLT 452 3 8 3 8 5 11 1 11 1 32 BIT TO FLOATING FLTL 453 3 8 3 8 5 10 8 10 8 FLOATING POINT ADD F 454 4 8 0 9 2 10 2 10 2 FLOATING POINT...

Page 1339: ...D OR F 329 3 6 6 8 3 LD AND OR F 330 LD AND OR F 331 LD AND OR F 332 LD AND OR F 333 LD AND OR F 334 FLOATING POINT TO ASCII FSTR 448 4 48 5 48 9 ASCII TO FLOATING POINT FVAL 449 3 21 1 21 3 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 DOUBLE SYMBOL COMPARI SON LD AND OR D 335 3 8 5 10 3 LD AND OR D 336 LD AND OR D 337 LD AND OR D 338 ...

Page 1340: ...DOUBLE FLOATING POINT DIVIDE D 848 4 23 5 24 2 DOUBLE DEGREESTO RADIANS RADD 849 3 27 4 27 8 DOUBLE RADIANS TO DEGREES DEGD 850 3 11 2 11 9 DOUBLE SINE SIND 851 3 45 4 45 8 DOUBLE COSINE COSD 852 3 43 0 43 4 DOUBLE TANGENT TAND 853 3 20 1 20 5 DOUBLE ARC SINE ASIND 854 3 21 5 21 9 DOUBLE ARC COSINE ACOSD 855 3 24 7 25 1 DOUBLE ARC TANGENT ATAND 856 3 19 3 19 7 DOUBLE SQUARE ROOT SQRTD 857 3 47 4 4...

Page 1341: ...5 4 5 9 7 0 7 0 GET RECORD NUMBER GETR 636 4 7 8 8 4 11 0 11 0 DATA SEARCH SRCH 181 4 15 5 19 5 19 5 19 5 Searching for 1 word 2 42 ms 3 34 ms 3 34 ms 3 34 ms Searching for 1 000 words SWAP BYTES SWAP 637 3 12 2 13 6 13 6 13 6 Swapping 1 word 1 94 ms 2 82 ms 2 82 ms 2 82 ms Swapping 1 000 words FIND MAXI MUM MAX 182 4 19 2 24 9 24 9 24 9 Searching for 1 word 2 39 ms 3 36 ms 3 36 ms 3 36 ms Searchi...

Page 1342: ...L BAND 681 4 17 0 22 5 22 5 22 5 DEAD ZONE CON TROL ZONE 682 4 15 4 20 5 20 5 20 5 TIME PRO POR TIONAL OUTPUT See note 2 TPO 685 4 10 4 14 8 OFF execution time 54 5 82 0 ON execution time with duty designation or displayed out put limit 61 0 91 9 ON execution time with manip ulated variable designation and output limit enabled SCALING SCL 194 4 37 1 53 0 56 8 56 8 SCALING 2 SCL2 486 4 28 5 40 2 50...

Page 1343: ...Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 SUBROUTINE CALL SBS 091 2 1 26 1 96 17 0 17 0 SUBROUTINE ENTRY SBN 092 2 SUBROUTINE RETURN RET 093 1 0 86 1 60 20 60 20 60 MACRO MCRO 099 4 23 3 23 3 23 3 23 3 GLOBAL SUBROU TINE CALL GSBN 751 2 GLOBAL SUBROU TINE ENTRY GRET 752 1 1 26 1 96 GLOBAL SUBROU TINE RETURN GSBS 750 2 0 86 1 60 Instruction Mnemonic Code Length steps See note ON execution time µs Cond...

Page 1344: ...asic I O Units 319 9 320 7 377 5 377 6 60 word refresh IN for CS series Basic I O Units 358 00 354 40 460 1 460 1 60 word refresh OUT for CS series Basic I O Units CPU BUS I O REFRESH DLNK 226 4 287 8 315 5 Allocated 1 word 7 SEGMENT DECODER SDEC 078 4 6 5 6 9 14 1 14 1 DIGITAL SWITCH INPUT See note 2 DSW 210 6 50 7 73 5 4 digits data input value 0 51 5 73 4 4 digits data input value F 51 3 73 5 8...

Page 1345: ... Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 PROTOCOL MACRO PMCR 260 5 100 1 142 1 276 8 276 8 Sending 0 words receiv ing 0 words 134 2 189 6 305 9 305 9 Sending 1 word receiving 1 word TRANSMIT TXD 236 4 68 5 98 8 98 8 98 8 Sending 1 byte 734 3 1 10 ms 1 10 ms 1 10 ms Sending 256 bytes RECEIVE RXD 235 4 89 6 131 1 131 1 131 1 Storing 1 byte 724 2 1 11 ms...

Page 1346: ...RITE See note 2 ECHWR 724 4 106 0 158 3 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 READ DATA FILE FREAD 700 5 391 4 632 4 684 1 684 1 2 character directory file name in binary 836 1 1 33 ms 1 35 ms 1 35 ms 73 character director...

Page 1347: ...BTRACT CSUB 731 4 38 6 170 4 184 1 184 1 HOURS TO SECONDS SEC 065 3 21 4 29 3 35 8 35 8 SECONDS TO HOURS HMS 066 3 22 2 30 9 42 1 42 1 CLOCK ADJUSTMENT DATE 735 2 60 5 87 4 95 9 95 9 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 Trace Mem ory Sam pling TRSM 045 1 80 4 120 0 120 0 120 0 Sampling 1 bit and 0 words 848 1 1 06 ms 1 06 ms 1 ...

Page 1348: ... 19 7 19 7 SAVE CON DITION FLAGS CCS 282 1 8 6 12 5 LOAD CON DITION FLAGS CCL 283 1 9 8 13 9 CONVERT ADDRESS FROM CV FRMCV 284 3 13 6 19 9 CONVERT ADDRESS TO CV TOCV 285 3 11 9 17 2 DISABLE PERIPH ERAL SER VICING IOSP 287 13 9 19 8 ENABLE PERIPH ERAL SER VICING IORS 288 63 6 92 3 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 BLOCK PROGR...

Page 1349: ...5 1 12 6 13 7 16 7 16 7 WAIT condition satisfied 3 9 4 1 6 3 6 3 WAIT condition not satisfied ONE CYCLEAND WAIT WAIT relay number 805 2 12 0 13 4 16 5 16 5 WAIT condition satisfied 6 1 6 5 9 6 9 6 WAIT condition not satisfied ONE CYCLEAND WAIT NOT WAIT NOT relay num ber 805 2 12 2 13 8 17 0 17 0 WAIT condition satisfied 6 4 6 9 10 1 10 1 WAIT condition not satisfied COUNTER WAIT CNTW 814 4 17 9 22...

Page 1350: ... 66 0 84 3 84 3 Transferring 1 character CONCATE NATE STRING 656 4 86 5 126 0 167 8 167 8 1 character 1 character GET STRING LEFT LEFT 652 4 53 0 77 4 94 3 94 3 Retrieving 1 character from 2 characters GET STRING RIGHT RGHT 653 4 52 2 76 3 94 2 94 2 Retrieving 1 character from 2 characters GET STRING MIDDLE MID 654 5 56 5 84 6 230 2 230 2 Retrieving 1 character from 3 characters FIND IN STRING FIN...

Page 1351: ...ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 TASK ON TKON 820 2 19 5 26 3 26 3 26 3 TASK OFF TKOF 821 2 13 3 19 0 26 3 26 3 Instruction Mnemonic Code Length steps See note ON execution time µs Conditions CPU 6 H CPU 4 H CPU 6 CPU 4 BLOCK TRANSFER XFERC 565 4 6 4 6 5 Transferring 1 word 481 6 791 6 Transferring 1 000 words SINGLE WORD DIS TRIBUTE DISTC 566 4 3 4 3 5 Data distribute 5...

Page 1352: ...that of the CS series PLC would be 7 4 3 steps 4 2 CJ series Instruction Execution Times and Number of Steps The following table lists the execution times for all instructions that are avail able for CJ PLCs The total execution time of instructions within one whole user program is the process time for program execution when calculating the cycle time See note Note User programs are allocated tasks...

Page 1353: ... ever is different for some of the CJ series instructions and inaccuracies will occur if the capacity of a user program for another PLC is converted for a CJ series PLC based on the assumption that 1 word is 1 step Refer to the information at the end of 4 1 CS series Instruction Execution Times and Number of Steps for guidelines on converting program capacities from previous OMRON PLCs 2 Most inst...

Page 1354: ... TION OFF DOWN 522 4 0 24 0 3 0 42 0 54 0 50 0 50 LOAD BIT TEST LD TST 350 4 0 11 0 14 0 24 0 37 0 35 0 35 LOAD BIT TEST NOT LD TSTN 351 4 0 11 0 14 0 24 0 37 0 35 0 35 AND BIT TEST NOT AND TSTN 351 4 0 11 0 14 0 24 0 37 0 35 0 35 OR BIT TEST OR TST 350 4 0 11 0 14 0 24 0 37 0 35 0 35 OR BIT TEST NOT OR TSTN 351 4 0 11 0 14 0 24 0 37 0 35 0 35 Instruction Mne monic Code Length steps See note ON ex...

Page 1355: ...0 34 0 5 0 5 RSTB 3 21 44 21 44 21 54 23 31 23 31 SINGLEBIT OUTPUT OUTB 534 2 0 19 0 22 0 32 0 45 0 45 OUTB 3 21 42 21 42 21 52 23 22 23 22 Instruction Mne monic Code Length steps See note 1 ON execution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 END END 001 1 5 5 5 5 6 0 4 0 7 9 7 9 NO OPER ATION NOP 000 1 0 016 0 02 0 04 0 12 0 05 0 05 INTER LOCK IL 002...

Page 1356: ...0 06 0 12 0 15 0 15 FOR LOOP FOR 512 2 0 18 0 21 0 21 0 21 1 00 1 00 Designating a constant BREAK LOOP BREAK 514 1 0 048 0 12 0 12 0 12 0 15 0 15 NEXT LOOP NEXT 513 1 0 14 0 18 0 18 0 18 0 45 0 45 When loop is contin ued 0 18 0 22 0 22 0 22 0 55 0 55 When loop is ended Instruction Mne monic Code Length steps See note 1 ON execution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU...

Page 1357: ... 0 16 3 6 2 6 2 6 5 13 8 When interlocking MULTI OUT PUT TIMER MTIM 543 4 20 9 20 9 23 3 26 0 38 55 43 3 5 6 5 6 5 8 7 8 12 9 13 73 When resetting MTIMX 554 20 9 20 9 23 3 38 55 5 6 5 6 5 8 12 9 When resetting COUNTER CNT 3 0 51 0 56 0 88 0 42 1 30 1 30 CNTX 546 0 51 REVERSIBLE COUNTER CNTR 012 3 16 9 16 9 19 0 20 9 31 8 27 2 CNTRX 548 RESET TIMER COUNTER CNR 545 3 9 9 9 9 10 6 13 9 14 7 17 93 Whe...

Page 1358: ...structions unsigned LD AND OR 300 4 0 08 0 10 0 16 0 37 0 35 0 35 LD AND OR 305 LD AND OR 310 LD AND OR 315 LD AND OR 320 LD AND OR 325 Input Com parison Instructions double unsigned LD AND OR L 301 4 0 08 0 10 0 16 0 54 0 35 0 35 LD AND OR L 306 LD AND OR L 311 LD AND OR L 316 LD AND OR L 321 LD AND OR L 326 Input Com parison Instructions signed LD AND OR S 302 4 0 08 0 10 0 16 6 50 0 35 0 35 LD ...

Page 1359: ...36 4 45 6 41 1 LD AND OR DT 346 4 25 2 25 2 36 4 18 8 39 6 COMPARE CMP 20 3 0 032 0 04 0 04 0 29 0 10 0 10 CMP 20 7 42 1 42 1 42 1 42 4 45 2 45 2 Increase for immediate refresh DOUBLE COMPARE CMPL 60 3 0 064 0 08 0 08 0 46 0 50 0 50 SIGNED BINARY COMPARE CPS 114 3 0 064 0 08 0 08 6 50 0 30 0 30 CPS 114 7 35 9 35 9 35 9 42 4 45 2 45 2 Increase for immediate refresh DOUBLE SIGNED BINARY COMPARE CPSL...

Page 1360: ...Length steps See note ON execution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 MOVE MOV 21 3 0 14 0 18 0 20 0 29 0 30 0 30 MOV 21 7 21 38 21 38 21 40 42 36 35 1 43 0 Increase for immediate refresh DOUBLE MOVE MOVL 498 3 0 26 0 32 0 34 0 50 0 60 0 60 MOVE NOT MVN 22 3 0 14 0 18 0 20 0 29 0 35 0 35 DOUBLE MOVE NOT MVNL 499 3 0 26 0 32 0 34 0 50 0 60 0 60 MOV...

Page 1361: ... 4 10 4 10 4 11 9 15 3 Shifting 1 word 187 3 433 2 488 0 763 1 1 39 ms 1 43 ms Shifting 1 000 words REVERS IBLE SHIFT REGISTER SFTR 84 4 6 9 6 9 7 2 9 6 11 4 15 5 Shifting 1 word 399 3 615 3 680 2 859 6 1 43 ms 1 55 ms Shifting 1 000 words ASYN CHRO NOUS SHIFT REG ISTER ASFT 17 4 6 2 6 2 6 4 7 7 13 4 14 2 Shifting 1 word 1 22 ms 1 22 ms 1 22 ms 2 01 ms 2 75 ms 2 99 ms Shifting 1 000 words WORD SHI...

Page 1362: ...HIFT LEFT SLD 74 3 5 9 5 9 6 1 8 2 7 6 12 95 Shifting 1 word 561 1 561 1 626 3 760 7 1 15 ms 1 27 ms Shifting 1 000 words ONE DIGIT SHIFT RIGHT SRD 75 3 6 9 6 9 7 1 8 7 8 6 15 00 Shifting 1 word 760 5 760 5 895 5 1 07 ms 1 72 ms 1 82 ms Shifting 1 000 words SHIFTN BIT DATA LEFT NSFL 578 4 7 5 7 5 8 3 10 5 14 8 16 0 Shifting 1 bit 34 5 40 3 45 4 55 5 86 7 91 3 Shifting 1 000 bits SHIFTN BIT DATA RI...

Page 1363: ...5 0 45 DOUBLE DECREMENT BINARY L 593 2 0 18 0 40 0 56 0 67 0 80 0 80 INCREMENT BCD B 594 2 5 7 6 4 4 5 7 4 12 3 14 7 DOUBLE INCREMENT BCD BL 595 2 5 6 5 6 4 9 6 1 9 24 10 8 DECREMENT BCD B 596 2 5 7 6 3 4 6 7 2 11 9 14 9 DOUBLE DECREMENT BCD BL 597 2 5 3 5 3 4 7 7 1 9 0 10 7 Instruction Mne monic Code Length steps See note ON execution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing...

Page 1364: ...2 0 34 0 54 0 60 0 60 BCD SUB TRACT WITH OUT CARRY B 414 4 7 4 8 0 8 2 13 1 18 1 20 5 DOUBLE BCD SUBTRACT WITHOUT CARRY BL 415 4 8 9 12 8 14 0 18 2 23 2 26 7 BCD SUB TRACT WITH CARRY BC 416 4 7 9 8 5 8 6 13 8 19 1 21 6 DOUBLE BCD SUBTRACT WITH CARRY BCL 417 4 9 4 13 4 14 7 18 8 24 3 27 7 SIGNED BINARY MUL TIPLY 420 4 0 26 0 38 0 40 0 58 0 65 0 65 DOUBLE SIGNED BINARY MUL TIPLY L 421 4 5 93 7 23 8 ...

Page 1365: ...BCD DIVIDE BL 435 4 13 1 17 7 18 9 26 2 27 1 34 7 Instruction Mne monic Code Length steps See note ON execution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 BCD TO BINARY BIN 023 3 0 18 0 22 0 24 0 29 0 40 0 40 DOUBLE BCD TO DOUBLE BINARY BINL 058 3 6 1 6 5 6 8 9 1 12 3 13 7 BINARY TO BCD BCD 024 3 0 19 0 24 0 26 8 3 7 62 9 78 DOUBLE BINARY TO DOUBLE BCD BC...

Page 1366: ...MN TO LINE LINE 063 4 16 6 19 0 23 1 29 1 37 0 40 3 LINE TO COLUMN COLM 064 4 18 4 23 2 27 5 37 3 45 7 48 2 SIGNED BCD TO BINARY BINS 470 4 6 8 8 0 8 3 12 1 16 2 17 0 Data format setting No 0 6 8 8 0 8 3 12 1 16 2 17 1 Data format setting No 1 7 1 8 3 8 6 12 7 16 5 17 7 Data format setting No 2 7 4 8 5 8 8 13 0 16 5 17 6 Data format setting No 3 DOUBLE SIGNED BCD TO BINARY BISL 472 4 6 9 9 2 9 6 1...

Page 1367: ...95 9 86 4 8 bit angle 61 8 61 8 96 7 104 5 91 6 15 bit binary 64 5 64 5 99 6 107 5 96 1 15 bit BCD 72 8 72 8 112 4 120 4 107 3 15 bit angle 52 3 52 3 87 2 88 7 82 4 360 binary 55 1 55 1 90 4 91 7 86 8 360 BCD 64 8 64 8 98 5 107 3 98 1 360 angle FOUR DIGIT NUM BER TO ASCII STR4 601 3 13 79 13 79 20 24 22 16 19 88 EIGHT DIGIT NUM BER TO ASCII STR8 602 3 18 82 18 82 27 44 29 55 26 70 SIXTEEN DIGIT NU...

Page 1368: ... 34 0 54 0 60 0 60 EXCLUSIVE OR XORW 036 4 0 18 0 22 0 32 0 37 0 45 0 45 DOUBLE EXCLUSIVE OR XORL 612 4 0 26 0 32 0 34 0 54 0 60 0 60 EXCLUSIVE NOR XNRW 037 4 0 18 0 22 0 32 0 37 0 45 0 45 DOUBLE EXCLUSIVE NOR XNRL 613 4 0 26 0 32 0 34 0 54 0 60 0 60 COMPLE MENT COM 029 2 0 18 0 22 0 32 0 37 0 45 0 45 DOUBLE COMPLE MENT COML 614 2 0 32 0 40 0 56 0 67 0 80 0 80 Instruction Mne monic Code Length ste...

Page 1369: ...8 7 9 9 12 0 14 0 17 6 FLOATING POINT MULTI PLY F 456 4 0 24 8 0 9 2 10 5 13 2 15 8 DEGREES TO RADIANS RAD 458 3 8 1 10 1 10 2 14 9 15 9 20 6 RADIANS TO DEGREES DEG 459 3 8 0 9 9 10 1 14 8 15 7 20 4 SINE SIN 460 3 42 0 42 0 42 2 61 1 47 9 70 9 HIGH SPEED SINE See note 2 SINQ 475 8 0 59 COSINE COS 461 3 31 5 31 5 31 8 44 1 41 8 51 0 HIGH SPEED COSINE See note 2 COSQ 476 8 0 59 TANGENT TAN 462 3 16 ...

Page 1370: ...D AND OR F 329 3 0 13 6 6 8 3 12 6 15 37 LD AND OR F 330 LD AND OR F 331 LD AND OR F 332 LD AND OR F 333 LD AND OR F 334 FLOATING POINT TO ASCII FSTR 448 4 48 5 48 5 48 9 58 4 85 7 ASCII TO FLOATING POINT FVAL 449 3 21 1 21 1 21 3 31 1 43 773 MOVE FLOAT ING POINT SINGLE See note 2 MOVF 469 3 0 18 Instruction Mne monic Code Length steps See note ON execution time µs Conditions CPU6 H R CPU6 H CPU4 ...

Page 1371: ...6 1 21 6 DOUBLE FLOATING TO 32 BIT BINARY FIXLD 842 3 10 2 11 6 12 1 16 4 21 7 16 BIT BINARY TO DOUBLE FLOATING DBL 843 3 9 9 9 9 10 0 14 3 16 5 32 BIT BINARY TO DOUBLE FLOATING DBLL 844 3 9 8 9 8 10 0 16 0 17 7 DOUBLE FLOATING POINT ADD D 845 4 11 2 11 2 11 9 18 3 23 6 DOUBLE FLOATING POINT SUB TRACT D 846 4 11 2 11 2 11 9 18 3 23 6 DOUBLE FLOATING POINT MULTI PLY D 847 4 12 0 12 0 12 7 19 0 25 0...

Page 1372: ... Mne monic Code Length steps See note ON execution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 SET STACK SSET 630 3 8 0 8 0 8 3 8 5 14 2 20 3 Designating 5 words in stack area 231 6 231 6 251 8 276 8 426 5 435 3 Designating 1 000 words in stack area PUSH ONTO STACK PUSH 632 3 6 5 6 5 8 6 9 1 15 7 16 4 FIRST IN FIRST OUT FIFO 633 3 6 9 6 9 8 9 10 6 15 8 16 ...

Page 1373: ...rching for 1 word 2 39 ms 2 39 ms 3 33 ms 3 33 ms 4 39 ms 3 58 ms Searching for 1 000 words SUM SUM 184 4 28 2 28 2 38 5 38 3 49 5 44 1 Adding 1 word 14 2 ms 1 42 ms 1 95 ms 1 95 ms 2 33 ms 2 11 ms Adding 1 000 words FRAME CHECKSUM FCS 180 4 20 0 20 0 28 3 28 3 34 8 31 5 For 1 word table length 1 65 ms 1 65 ms 2 48 ms 2 48 ms 3 11 ms 2 77 ms For 1 000 word table length STACK SIZE READ SNUM 638 3 6...

Page 1374: ... CONTROL ZONE 682 4 15 4 15 4 20 5 20 5 28 0 26 4 TIME PRO PORTIONAL OUTPUT See note 2 TPO 685 4 10 6 10 6 14 8 20 2 19 8 OFF execution time 54 5 54 5 82 0 92 7 85 1 ON execution time with duty designation or displayed output limit 61 0 61 0 91 9 102 5 95 3 ON execution time with manip ulated variable designation and output limit enabled SCALING SCL 194 4 13 9 13 9 14 3 56 8 25 0 32 8 SCALING 2 SC...

Page 1375: ... 1 96 17 0 2 04 2 04 SUBROUTINE ENTRY SBN 92 2 SUBROUTINE RETURN RET 93 1 0 43 0 86 1 60 20 60 1 80 1 80 MACRO MCRO 99 4 23 3 23 3 23 3 23 3 47 9 50 3 GLOBAL SUBROU TINE CALL GSBN 751 2 GLOBAL SUBROU TINE ENTRY GRET 752 1 0 90 1 26 1 96 2 04 2 04 GLOBAL SUBROU TINE RETURN GSBS 750 2 0 43 0 86 1 60 1 80 1 80 Instruction Mne monic Code Length steps See note ON execution time µs Condi tions CPU6 H R ...

Page 1376: ... 48 8 Changing pulse output PV 51 80 50 8 Changing high speed counter PV 31 83 28 5 Changing PV of counter in inter rupt input mode 45 33 49 8 Stopping pulse output 36 73 30 5 Stopping PWM 891 out put HIGH SPEED COUNTER PV READ PRV 881 4 42 40 43 9 Reading pulse output PV 53 40 65 9 Reading high speed counter PV 33 60 30 5 Reading PV of counter in inter rupt input mode 38 80 40 0 Reading pulse out...

Page 1377: ...s 9 61 ms Only registering target value table for 48 target val ues 259 0 239 0 Only registering range table COUNTER FREQUENCY CONVERT PRV2 883 4 23 03 22 39 SPEED OUT PUT SPED 885 4 56 00 89 3 Continuous mode 62 47 94 9 Independent mode SET PULSES PULS 886 4 26 20 32 9 PULSE OUT PUT PLS2 887 5 100 80 107 5 ACCELERA TION CON TROL ACC 888 4 90 80 114 8 Continuous mode 80 00 122 1 Independent mode O...

Page 1378: ...4 1 word refresh IN for Basic I O Units 17 20 17 20 18 40 25 6 29 7 35 0 1 word refresh OUT for Basic I O Units 319 9 319 9 320 7 377 6 291 0 100 0 60 word refresh IN for Basic I O Units 358 00 358 00 354 40 460 1 325 0 134 7 60 word refresh OUT for Basic I O Units SPECIAL I O UNIT I O REFRESH See note 4 FIORF 225 2 See note 3 CPU BUS I O REFRESH DLNK 226 4 287 8 287 8 315 5 321 3 458 7 Allocated ...

Page 1379: ...busy 223 0 215 3 At end INTELLIGENTI O WRITE IOWR 223 4 See note 3 See note 3 See note 3 See note 3 245 3 219 7 First execution 231 0 225 7 When busy 244 0 218 7 At end Instruction Mne monic Code Length steps See note ON execution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 Instruction Mne monic Code Length steps See note ON execution time µs Conditions CP...

Page 1380: ...ution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 NETWORK SEND SEND 090 4 84 4 84 4 123 9 123 9 141 6 195 0 NETWORK RECEIVE RECV 098 4 85 4 85 4 124 7 124 7 142 3 196 7 DELIVER COM MAND CMND 490 4 106 8 106 8 136 8 136 8 167 7 226 7 EXPLICIT MES SAGE SEND See note 2 EXPLT 720 4 127 6 127 6 190 0 217 0 238 0 EXPLICIT GET ATTRIBUTE See note 2 EGATR 721 4 123...

Page 1381: ... 5 387 8 387 8 627 0 684 7 650 7 637 3 2 character direc tory file name in binary 833 3 833 3 1 32 ms 1 36 ms 1 44 ms 1 16 ms 73 character directory file name in binary WRITE TEXT FILE TWRIT 704 5 390 1 390 1 619 1 555 3 489 0 Instruction Mne monic Code Length steps See note ON execution time µs Conditions CPU6 H CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 DISPLAY MES SAGE MSG 046 3 ...

Page 1382: ... SAM PLING TRSM 045 1 80 4 80 4 120 0 120 0 207 0 218 3 Sampling 1 bit and 0 words 848 1 848 1 1 06 ms 1 06 ms 1 16 ms 1 10 ms Sampling 31 bits and 6 words Instruc tion Mne monic Code Length steps See note ON execution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 FAILURE ALARM FAL 006 3 15 4 15 4 16 7 16 7 26 1 24 47 Recording errors 179 8 179 8 244 8 244 8...

Page 1383: ...ROM CV FRMCV 284 3 13 6 13 6 19 9 23 1 31 8 CONVERT ADDRESS TO CV TOCV 285 3 11 9 11 9 17 2 22 5 31 4 DISABLE PERIPH ERAL SERVICING IOSP 287 13 9 13 9 19 8 21 5 21 5 ENABLE PERIPH ERAL SERVICING IORS 288 63 6 63 6 92 3 22 2 22 2 Instruction Mne monic Code Length steps See note ON execution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 BLOCK PRO GRAM BEGIN BP...

Page 1384: ...d ONE CYCLE AND WAIT WAIT relay number 805 2 12 0 12 0 13 4 16 5 27 2 30 0 WAIT condi tion satisfied 6 1 6 1 6 5 9 6 10 0 11 4 WAIT condi tion not satis fied ONE CYCLE AND WAIT NOT WAIT NOT relay number 805 2 12 2 12 2 13 8 17 0 27 8 30 6 WAIT condi tion satisfied 6 4 6 4 6 9 10 1 10 5 11 8 WAIT condi tion not satis fied COUNTER WAIT CNTW 814 4 17 9 17 9 22 6 27 4 41 0 43 5 First execution 19 1 19...

Page 1385: ... H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 MOV STRING MOV 664 3 45 6 45 6 66 0 84 3 79 3 72 7 Transferring 1 char acter CONCATE NATE STRING 656 4 86 5 86 5 126 0 167 8 152 0 137 0 1 character 1 character GET STRING LEFT LEFT 652 4 53 0 53 0 77 4 94 3 93 6 84 8 Retrieving 1 charac ter from 2 charac ters GET STRING RIGHT RGHT 653 4 52 2 52 2 76 3 94 2 92 1 83 3 Retrieving 1 charac ter fro...

Page 1386: ... LD AND OR 670 4 48 5 48 5 69 8 86 2 79 9 68 5 Comparing 1 char acter with 1 charac ter LD AND OR 671 LD AND OR 672 LD AND OR 674 LD AND OR 675 Instruction Mne monic Code Length steps See note ON execution time µs Conditions CPU6 H R CPU6 H CPU4 H CPU4 CJ1M exclud ing CPU11 21 CJ1M CPU11 21 TASK ON TKON 820 2 19 5 19 5 26 3 26 3 33 1 32 5 TASK OFF TKOF 821 2 13 3 13 3 19 0 26 3 19 7 20 2 Instructi...

Page 1387: ...LE WORD DIS TRIBUTE DISTC 566 4 3 4 3 4 3 5 19 18 1 Data distribute 5 9 5 9 7 3 39 5 38 5 Stack operation DATA COL LECT COLL C 567 4 3 5 3 5 3 85 24 9 29 7 Data distribute 8 8 9 1 22 1 25 3 Stack operation 8 3 8 3 9 6 25 5 31 Stack operation 1 word FIFO Read 2 052 3 2 052 3 2 097 5 8 310 1 7 821 1 Stack operation 1 000 word FIFO Read MOVE BIT MOVB C 568 4 4 5 4 5 4 88 28 1 22 1 BIT COUNTER BCNT C ...

Page 1388: ...e 2 words per instruction and that of the CJ series PLC would be 1 2 1 step per instruction Contents CS CJ series CPU Units with unit version 3 0 or later m Call part 57 steps n I O parameter transfer part The data type is shown in parenthe ses 1 bit I O variable BOOL 6 steps 1 word I O variable INT UINT WORD 6 steps 2 word I O variable DINT UDINT DWORD REAL 6 steps 4 word I O variable LINT ULINT ...

Page 1389: ...n 10 µs Execution time for 1 instance 3 3 µs 3 2 0 19 µs 10 µs 14 25 µs Note The execution time is increased according to the number of multiple instances when the same function block definition has been copied to multiple locations Effect of Instance Execution on Cycle Time Startup time A I O parameter transfer processing time B Execution time of instructions in function block definition C Operat...

Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...

Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...

Page 1392: ...1352 ASCII Code Table Appendix A ...

Page 1393: ...1305 1339 network instruction execution times 1305 1340 receiving from RS 232C port 993 serial communications instructions 92 972 1025 transmitting from RS 232C port 983 comparing tables 878 comparison 878 comparison instructions execution times 1289 1318 1320 Condition Flags loading status 1173 saving status 1171 control bits Sampling Start Bit 1138 Trace Start Bit 1138 conversion instructions ex...

Page 1394: ...nents 631 688 extra cyclic tasks 1255 1258 F G failure diagnosis instructions execution times 1307 1342 fatal operating errors generating and clearing 1148 file memory file memory instructions 96 1095 1098 instruction execution times 1306 1341 file memory instructions execution times 1306 1341 FINS commands 1056 sending commands to local CPU Unit 1063 flags AER Flag 13 CY clearing 1166 ER Flag 13 ...

Page 1395: ...428 430 471 B 434 479 BL 435 481 D 848 669 F 457 607 L 431 473 U 432 475 UL 433 477 ACC 888 896 ACOS 464 625 682 ACOSD 855 682 AND 165 AND LD 172 AND NOT 167 ANDL 610 550 ANDW 034 548 APR 069 571 ASC 086 504 ASIN 463 623 680 ASIND 854 680 ATAN 465 627 684 ATAND 856 684 AVG 195 807 B 414 451 B 596 421 BAND 681 781 BC 416 456 BCD 024 487 BCDL 059 489 BCDS 471 523 BCL 417 457 BCMP 068 320 BCNT 067 58...

Page 1396: ...2 597 660 FLTL 453 599 661 FOR 512 238 FREAD 700 1099 FRMCV 284 1174 FSTR 448 640 FVAL 449 645 649 FWRIT 701 1106 GETR 636 720 GRET 752 835 GSBN 751 832 GSBS 750 824 HEX 162 508 HMS 066 1131 IEND 804 1196 IF 802 1196 1202 IL 002 210 228 ILC 003 210 228 INI 880 864 INS 657 1246 IORD 222 962 IORF 097 926 IORS 288 1185 IOSP 287 1183 IOWR 223 967 JME 005 228 JME0 516 236 JMP 004 228 JMP0 515 236 KEEP ...

Page 1397: ...36 SINS 641 750 SNUM 638 742 SNXT 009 909 SPED 885 882 SQRT 466 629 686 SQRTD 857 686 SRCH 181 722 SREAD 639 744 SSET 630 703 STEP 008 909 STR16 603 539 STR4 601 534 STR8 602 537 STUP 237 1021 SUM 184 735 SWAP 637 725 742 744 747 750 753 SWRIT 640 747 TAN 462 619 621 TAND 853 678 TCMP 085 317 testing bit status 182 TIM 245 TIMH 015 249 TIMHWX 817 1212 TIMHX 551 249 TIML 542 266 TIMLX 553 266 TIMW ...

Page 1398: ...h instructions 51 425 482 table data processing instructions 71 75 697 741 1299 1331 task control instructions 111 113 1255 1261 text string processing instructions 108 1220 1254 timer instructions 34 242 290 interlocks 210 228 internal I O memory address setting a timer counter PV address in an index register 358 setting a word bit address in an index register 356 interrupt control instructions e...

Page 1399: ...mparison 326 329 881 refreshing differentiated refreshing instructions 177 immediate refreshing instructions 177 with IORF 097 926 resetting bits 201 RS 232C port receiving from RS 232C port 993 transmitting from RS 232C port 983 S safety precautions See also precautions searching instructions 697 self maintaining bits using KEEP 011 190 sequence control instructions execution times 1286 1315 seri...

Page 1400: ...ext strings instruction execution times 1311 1346 text string processing instructions 108 1220 1254 time converting time notation 1129 1131 timers 242 290 block program delay timer 1212 example applications 284 execution times 1287 1316 resetting with CNR 545 282 tracing flags and control bits 1138 trigonometric functions arc cosine 625 682 arc sine 623 680 arc tangent 627 684 converting degrees t...

Page 1401: ...s as follows Pages 169 and 170 Precaution related to the cycle time deleted Pages 176 180 183 186 196 199 743 746 and 749 Timer number counter number and set value indications corrected Pages 189 and 192 PV and SV range indications corrected Pages 209 and 210 Ladder program modified and caution deleted Page 342 Description about the CLEAR CARRY instruction deleted from precautions Page 395 ON cond...

Page 1402: ...03 Pages 10 and 11 Note with examples added on instructions executable when input con ditions are OFF Page 24 Table updated and note added for instructions not supported by CS1D CPU Units and CS1 CPU Units with V1 suffix Pages 26 to 28 Table updated and note added for instructions not supported by CS1D CPU Units Pages 36 and 37 Table updated and note added for instructions not supported by CS1D CP...

Page 1403: ...information added to note on timer numbers Page 254 Information added to note on timer numbers Page 255 Third paragraph of Precautions and last paragraph on page changed Page 256 Information added on timer numbers Page 342 Description of Control Word corrected including callouts Page 575 Signed corrected to unsigned in note in top figure Page 578 Third precaution corrected Page 579 Figure added Pa...

Page 1404: ...1364 Revision History ...

Page 1405: ...388 OMRON ELECTRONICS LLC One Commerce Drive Schaumburg IL 60173 5302 U S A Tel 1 847 843 7900 Fax 1 847 843 7787 OMRON ASIA PACIFIC PTE LTD No 438A Alexandra Road 05 05 08 Lobby 2 Alexandra Technopark Singapore 119967 Tel 65 6835 3011 Fax 65 6835 2711 OMRON CHINA CO LTD Room 2211 Bank of China Tower 200 Yin Cheng Zhong Road PuDong New Area Shanghai 200120 China Tel 86 21 5037 2222 Fax 86 21 5037 ...

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Summary of Contents for SYSMAC CS Series

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Omron SYSMAC CS Series, Reference Manual, Page: 1385 / 1405

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Summary of Contents for SYSMAC CS Series

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