
554
Logic Instructions
Section 3-13
Description
ORWL(611) takes the logical OR of data specified in I
1
and I
2
as double-word
data and outputs the result to R, R+1.
• When any of the corresponding bits in I
1,
I
1
+1, I
2,
and
I
2
+1are 1, a 1 will
be output to the corresponding bit it R+1. When any of them are 0, a 0 will
be output to the corresponding bit in R+1.
(I
1,
I
1
+1) + (I
2,
I
2
+1)
→
(R, R+1)
Flags
Precautions
When ORWL(611) is executed, the Error Flag will turn OFF.
If as a result of the OR, the content of R, R+1 is 00000000 hex, the Equals
Flag will turn ON.
If as a result of the OR, the leftmost bit of R+1 is 1, the Negative Flag will turn
ON.
EM Area with bank
En_00000 to En_32766
(n = 0 to C)
Indirect DM/EM
addresses in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
#00000000 to #FFFFFFFF
(binary)
---
Data Registers
---
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Area
I
1
I
2
R
I
1,
I
1
+1
I
2,
I
2
+1
R, R+1
1
1
1
1
0
1
0
1
1
0
0
0
Name
Label
Operation
Error Flag
ER
OFF
Equals Flag
=
ON when the result is 0.
OFF in all other cases.
Negative Flag
N
ON when the leftmost bit of R is 1.
OFF in all other cases.
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...