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394
Data Shift Instructions
Section 3-9
Note All words in the shift register must be in the same area.
Operand Specifications
Description
NSFL(578) shifts the specified number of bits by the shift data length (N) from
the beginning bit (C) in the rightmost word, as designated by D one bit to the
left (towards the leftmost word and the leftmost bit). “0” is place into the begin-
ning bit and the contents of the leftmost bit in the shift area are shifted to the
Carry Flag (CY).
Area
D
C
N
CIO Area
CIO 0000 to CIO 6143
Work Area
W000 to W511
Holding Bit Area
H000 to H511
Auxiliary Bit Area
A448 to A959
A000 to A959
Timer Area
T0000 to T4095
Counter Area
C0000 to C4095
DM Area
D00000 to D32767
EM Area without bank
E00000 to E32767
EM Area with bank
En_00000 to En_32767
(n = 0 to C)
Indirect DM/EM
addresses in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
---
#0000 to #000F
(binary) or &0 to
&15
#0000 to #FFFF
(binary) or &0 to
&65535
Data Registers
---
DR0 to DR15
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Shifts one bit to the left
N
−
1 bit
N
−
1 bit
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...