
694
Double-precision Floating-point Instructions (CS1-H, CJ1-H, CJ1M, or CS1D Only)
Section 3-16
Precautions
The base data (B to B+3) and the exponent data (E to E+3) must be in
IEEE754 floating-point data format.
3-16-21 Double-precision Floating-point Input Instructions
Purpose
These input comparison instructions compare two double-precision floating
point values (64-bit IEEE754 format) and create an ON execution condition
when the comparison condition is true.
These instructions are supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU
Units only.
Note Refer to
3-7-1 Input Comparison Instructions (300 to 328)
for details on the
signed and unsigned binary input comparison instructions and
3-15-24 Sin-
gle-precision Floating-point Comparison Instructions
for details on single-pre-
cision floating-point input comparison instructions.
Ladder Symbol
Variations
Applicable Program Areas
Operand Specifications
Underflow Flag
UF
ON if the absolute value of the result is too small to be
expressed as a double-precision floating-point value.
Negative Flag
N
ON if the result is negative.
OFF in all other cases.
Name
Label
Operation
S
1
S
2
S
1
: Comparison data 1
S
2
: Comparison data 2
Symbol & options
Variations
Creates ON Each Cycle Comparison is True
Input compari-
son instruction
Immediate Refreshing Specification
Not supported
Block program areas
Step program areas
Subroutines
Interrupt tasks
OK
OK
OK
OK
Area
S
1
S
2
CIO Area
CIO 0000 to CIO 6140
Work Area
W000 to W508
Holding Bit Area
H000 to H508
Auxiliary Bit Area
A000 to A956
Timer Area
T0000 to T4092
Counter Area
C0000 to C4092
DM Area
D00000 to D32764
EM Area without bank
E00000 to E32764
EM Area with bank
En_00000 to En_32767 (n = 0 to C)
Indirect DM/EM
addresses in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...