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1207
Block Programming Instructions
Section 3-32
Description
TIMW(813)/TIMWX(816) creates an ON-delay countdown timer (100-ms timer
set in SV) between execution of the block program instruction preceding it and
the instructions following. TIMW(813) can time from 0 to 999.9 s with a timer
accuracy of 0 to 0.01 s. TIMWX(816) can time from 0 to 6,553.5 s with a timer
accuracy of 0 to 0.01 s.
Note The timer accuracy for CS1D CPU Units is 10 ms + the cycle time.
The first part of the block program is executed the first time the block program
is entered. When TIMW(813)/TIMWX(816) is reached, the Completion Flag is
reset to OFF, the timer is preset to the SV, and execution of the rest of the
block program will wait until SV has expired.
While the timer is timing down, only TIMW(813)/TIMWX(816) will be executed
to update the timer. When the timer times out, the Completion Flag will turn
ON and the rest of the block program will be executed. Once the entire block
program has been executed, the process will be repeated.
TIMW(813)/TIMWX(816) can be thought of as a WAIT instruction with a timer
for the execution condition and it can thus be used for timed step progres-
sions.
Flags
Constants
---
BCD:
#0000 to 9999 (BCD)
“&” cannot be used.
Binary:
&0 to &65535 (decimal)
#0000 to #FFFF (hex)
Data Registers
---
DR0 to DR15
Index Registers
---
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Area
N
SV
Time elapsed.
"A"
executed
and SV
preset.
"B" executed.
"C" executed.
Name
Label
Operation
Error Flag
ER
ON if TIMW(813)/TIMWX(816) is not in a block program.
ON if an indirect IR designation is used for N in BCD
mode and the address is not for a timer present value.
ON if in BCD mode and SV is not BCD.
OFF in all other cases.
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...