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808
Data Control Instructions
Section 3-18
Note R to R+N+1 must be in the same area.
Operand Specifications
Description
For the first N–1 cycles when the execution condition is ON, AVG(195) writes
the values of S in order to words starting with R+2. The Previous Value
Pointer (bits 00 to 07 of R+1) is incremented each time a value is written. Until
the Nth value is written, the contents of S will be output unchanged to R and
the Average Value Flag (bit 15 of R+1) will remain OFF.
When the Nth value is written to R+N+1, the average of all the values that
have been stored will be computed, the average will be output to R as an
unsigned binary value, and the Average Value Flag (bit 15 of R+1) will be
R+1
R+2:
15
0
14
R+N+1:
Used by system.
Previous value #1
Previous value #N
R: Average
R+1: Processing information
Average Valid Flag
OFF: Not valid (AVG(195) has not yet been executed the specified number of cycles.)
ON: Valid.
Area
S
N
R
CIO Area
CIO 0000 to CIO 6143
Work Area
W000 to W511
Holding Bit Area
H000 to H511
Auxiliary Bit Area
A000 to A959
A448 to A959
Timer Area
T0000 to T4095
Counter Area
C0000 to C4095
DM Area
D00000 to D32767
EM Area without bank
E00000 to E32767
EM Area with bank
En_00000 to En_32767
(n = 0 to C)
Indirect DM/EM
addresses in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants
#0000 to #FFFF
(binary)
#0001 to #0040
(binary)
---
Data Registers
DR0 to DR15
---
Index Registers
---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...