45
Instruction Functions
Section 2-2
DOUBLE DATA
EXCHANGE
XCGL
@XCGL
562
Output
Required
350
SINGLE WORD
DISTRIBUTE
DIST
@DIST
080
Output
Required
352
DATA COLLECT
COLL
@COLL
081
Output
Required
354
MOVE TO REGIS-
TER
MOVR
@MOVR
560
Output
Required
356
MOVE TIMER/
COUNTER PV TO
REGISTER
MOVRW
@MOVRW
561
Output
Required
358
Instruction
Mnemonic
Code
Symbol/Operand
Function
Location
Execution
condition
Page
XCGL(562)
E1
E2
E2
:
Second
exchange word
E1
:
1st exchange
word
E2
E1
E1+1
E2+1
Exchanges the contents of a pair of consecutive words with another
pair of consecutive words.
DIST(080)
S
Bs
Of
S
:
Source word
Bs
:
Destination
base address
Of
:
Offset
s
S
B
Bs+n
Of
Transfers the source word to a destination word calculated by adding
an offset value to the base address.
COLL(081)
Bs
Of
D
Bs
:
Source base
address
Of
:
Offset
D
:
Destination
word
Bs
Bs+n
Of
Transfers the source word (calculated by adding an offset value to the
base address) to the destination word.
MOVR(560)
S
D
S: Source
(desired word or
bit)
D: Destination
(Index Register)
Sets the internal I/O memory address of the specified word, bit, or
timer/counter Completion Flag in the specified Index Register. (Use
MOVRW(561) to set the internal I/O memory address of a
timer/counter PV in an Index Register.)
I/O memory address of S
Index Register
MOVRW(561)
S
D
S: Source
(desired TC
number)
D: Destination
(Index Register)
Sets the internal I/O memory address of the specified timer or
counter's PV in the specified Index Register. (Use MOVR(560) to set
the internal I/O memory address of a word, bit, or timer/counter
Completion Flag in an Index Register.)
I/O memory address of S
Timer/counter PV only
Index Register
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...