866
High-speed Counter/Pulse Output Instructions
Section 3-21
Operand Specifications
Description
INI(880) performs the operation specified in C for the port specified in P. The
possible combinations of operations and ports are shown in the following
table.
S
S+1
0
15
For Pulse Output or High-speed Counter Input:
0000 0000 to FFFF FFFF hex
For Interrupt Input in Counter Mode:
0000 0000 to 0000 FFFF hex
Lower word of new PV
Upper word of new PV
Area
P
C
NV
CIO Area
---
---
CIO 0000 to CIO 6142
Work Area
---
---
W000 to W510
Holding Bit Area
---
---
H000 to H510
Auxiliary Bit Area
---
---
A448 to A958
Timer Area
---
---
T0000 to T4094
Counter Area
---
---
C0000 to C4094
DM Area
---
---
D00000 to D32766
EM Area without bank
---
---
---
EM Area with bank
---
---
---
Indirect DM/EM
addresses in binary
---
---
@ D00000 to @ D32767
Indirect DM/EM
addresses in BCD
---
---
*D00000 to *D32767
Constants
See descrip-
tion of oper-
and.
See descrip-
tion of oper-
and.
---
Data Registers
---
---
---
Index Registers
---
---
---
Indirect addressing
using Index Registers
---
---
,IR0 to ,IR15
–2048 to +2047 ,IR0 to
–2048 to +2047 ,IR15
DR0 to DR15, IR0 to
IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
P: Port specifier
C: Control data
0000 hex:
Start
comparison
0001 hex:
Stop
comparison
0002 hex:
Change PV
0003 hex:
Stop pulse
output
0000 or 0001 hex:
Pulse output
Not allowed.
Not allowed.
OK
OK
0010 or 0011 hex:
High-speed counter
input
OK
OK
OK
Not allowed.
0100, 0101, 0102, or
0103 hex: Interrupt
input in counter mode
Not allowed.
Not allowed.
OK
Not allowed.
1000 or 1001 hex:
PWM (891) output
Not allowed.
Not allowed.
Not allowed.
OK
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...