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112
Instruction Functions
Section 2-2
2-2-33 Model Conversion Instructions (CPU Unit Ver. 3.0 or Later Only)
Instruction
Mnemonic
Code
Symbol/Operand
Function
Location
Execution
condition
Page
BLOCK
TRANSFER
XFERC
@XFERC
565
Output
Required
1263
SINGLE WORD
DISTRIBUTE
DISTC
@DISTC
566
Output
Required
1266
DATA COLLECT
COLLC
@COLLC
567
Output
Required
1269
MOVE BIT
MOVBC
@MOVBC
568
Output
Required
1273
BIT COUNTER
BCNTC
@BCNTC
621
Output
Required
1275
XFERC(565)
N
S
D
N: Number of
words
S: 1st source
word
D: 1st destination
word
S+(N
−
1)
D+(N
−
1)
to
to
N words
Transfers the specified number of consecutive words.
DISTC(566)
S
Bs
Of
S: Source word
Bs: Destination
base address
Of: Offset
s
S
B
Bs+n
Of
Transfers the source word to a destination word calculated by adding
an offset value to the base address. Can also write to a stack (Stack
Push Operation).
COLLC(567)
Bs
Of
D
Bs: Source base
address
Of: Offset
D: Destination
word
Bs
Bs+n
Of
Transfers the source word (calculated by adding an offset value to the
base address) to the destination word. Can also read data from a
stack in FIFO or LIFO order (Stack Read Operation).
S
C
D
MOVBC(568)
S: Source word or
data
C: Control word
D: Destination
word
Transfers the specified bit.
BCNTC(621)
N
S
R
N: Number of
words (BCD)
S: 1st source
word
R: Result word
S+(N
−
1)
R
to
Counts the total number of ON bits in the specified word(s).
N words
Counts the number
of ON bits.
BCD result
Summary of Contents for SYSMAC CS Series
Page 2: ......
Page 4: ...iv ...
Page 30: ...xxx ...
Page 186: ...146 List of Instructions by Function Code Section 2 4 ...
Page 1320: ...1280 Model Conversion Instructions Unit Ver 3 0 or Later Section 3 35 ...
Page 1390: ...1350 CJ series Instruction Execution Times and Number of Steps Section 4 2 ...
Page 1391: ...1351 Appendix A ASCII Code Table ASCII SP Four leftmost bits Four rightmost bits ...
Page 1392: ...1352 ASCII Code Table Appendix A ...
Page 1404: ...1364 Revision History ...