7
- 7
7.3 Cyclic Transmission Delay Time
7.3.1 Cyclic Transmission Delay Time
7
PROCESSING TIME
(2) In the case of a multi-network system
The following shows the cyclic transmission delay time for the case where link device
data are transferred to another network with the interlink transfer function.
* 1 Total for the number of mounted network modules.
Transmission delay time (For other than Universal model QCPUs) =
(ST + T) + (LS
T
×
1
) + MR + KM + MT + (LS
R
×
1
) + (SR ×
2
) + R [ms]
Transmission delay time (For Universal model QCPU) =
(ST + T) + (LS
T
×
1) + MR + MT + (LS
R
×
1) + (SR
×
2) + R [ms]
ST: Sequence scan time on sending side (excluding link refresh time)
SR: Sequence scan time on receiving side (excluding link refresh time)
T: Link refresh time on sending side
*1
MT: Time for link refresh between relay station and sending side (for transfer)
*1
MR: Time for link refresh between relay station and receiving side (for transfer)
*1
R: Link refresh time on receiving side
*1
LS
T
: Link scan time on sending side
LS
R
: Link scan time on receiving side
KM: Transmission processing time of CPU module on relay station (
Refer to the following.)
LB: Total of transfer source LB points that are set with interlink transmission parameters.
(
Section 6.7 Interlink Transmission Parameters)
LW: Total of transfer source LW points that are set with interlink transmission parameters.
(
Section 6.7 Interlink Transmission Parameters)
KM6: Constant
KM7: 4.5 (Worst value: 60)
Table 7.11 Interlink transfer constant (KM6)
Module location
KM6 (× 10
-3
)
Transfer source module
Transfer target module
Main base unit
Main base unit
6.7
Main base unit
Extension base unit
10.00
Extension base unit
Main base unit
10.00
Extension base unit
Extension base unit
12.00
1000 KM7
[ms]
KM KM6
LB
16
LW
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