Memory
MCF51CN128 Reference Manual, Rev. 6
4-20
Freescale Semiconductor
0x(FF)FF_E174
FEC
FEC_X_READ
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
X_READ[9:8]
X_READ[7:2]
0
0
0x(FF)FF_E180
FEC
FEC_E_RDSR
R_DES_START[31:24]
R_DES_START[23:16]
R_DES_START[15:8]
R_DES_START[15:2]
0
0
0x(FF)FF_E184
FEC
FEC_E_TDSR
X_DES_START[31:24]
X_DES_START[23:16]
X_DES_START[15:8]
X_DES_START[15:2]
0
0
0x(FF)FF_E188
FEC
FEC_EMRBR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R_BUF_SIZE[6:4]
R_BUF_SIZE[3:0]
0
0
0
0
0x(FF)FF_E18C
-
0x(FF)FF_E7FF
FEC
RESERVED
—
—
Address
Peripheral
Register
Bit
31/23/15/7
30/22/14/
6
29/21/13/
5
28/20/12/
4
27/19/11/
3
26/18/10/
2
25/17/9/1
Bit
24/16/8/0
0x(FF)FF_E800
MB
MBCSAR0
BA[31:24]
BA[23:16]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x(FF)FF_E804
MB
MBCSMR0
BAM[31:24]
BAM[23:16]
0
0
0
0
0
0
0
WP
0
0
0
0
0
0
0
V
0x(FF)FF_E808
MB
MBCSCR0
0
0
0
0
0
0
0
0
0
0
ASET
RDAH
WRAH
WS
MUX
AA
PS
0
0
0
0
0
0
0x(FF)FF_E80C
MB
MBCSAR1
BA[31:24]
BA[23:16]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0x(FF)FF_E810
MB
MBCSMR1
BAM[31:24]
BAM[23:16]
Table 4-3. Detailed Peripheral Memory Map (continued)