NXP Semiconductors freescale semiconductor ColdFire MCF51CN128 Series, Reference Manual

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Pins and Connections
MCF51CN128 Reference Manual, Rev. 6
2-8 Freescale Semiconductor
Keyboard interface functions associated with GPIO Ports E and G can be used whenever those pins are
programmed for use as GPIO OR any other digital function.
GPIO input functions can be used when a pad is enabled for any digital function. This can be used to
implement software-based debounce for KBI and IRQ functions.
Drive strength, pull-up enable
1
, slew rate and input filter settings in the GPIO apply to any digital use of
the associated pin.
2.2.1 Peripheral Pinout Summary
The following tables break out pin options on a peripheral by peripheral basis.
66 54 42 PTD7RGPIO7 — SPSCK2 ADP3 RGPIO_ENB selects
between standard GPIO
and RGPIO
67 55 43 PTE0 KBI2P0 MISO2 ADP2 —
68 56 44 PTE1 KBI2P1 MOSI2 ADP1 —
69 57 45 PTE2 KBI2P2 SS2 ADP0 —
70 58 46 PTE3 KBI2P3 — TPM1CH0 —
71 59 47 PTE4 KBI2P4 CLKOUT TPM1CH1 —
72 60 48 PTE5 KBI2P5 IRQ TPM1CH2 —
73 61 — PTE6 KBI2P6 FB_D0 TXD3 —
74 62 — PTE7 KBI2P7 FB_CS0 RXD3 —
75 63 — PTJ0 FB_ALE FB_CS1 — —
76 64 — PTJ1 — FB_A4/FB_AD4 — —
77 — — PTJ2 — FB_A3/FB_AD3 — —
78 — — PTJ3 — FB_A2/FB_AD2 — —
79 — — PTJ4 — FB_A1/FB_AD1 — —
80 — — PTJ5 — FB_A0/FB_AD0 — —
1. There is one special case with regard to pull-up enable functions. PTC4 or PTE5 can be programmed to operate as IRQ. When
in that mode, the pullup enable is controlled via IRQSC[IRQPDD].
Table 2-2. Power/Ground Pinout Summary
80-Pin 64-Pin 48-Pin Signals
1 1 1 VDD1
21 17 13 VDD2
41 33 25 VDD3
Table 2-1. MC51CN128 Package Pin Assignments (continued)
80-Pin 64-Pin 48-Pin Default Function Alt 1 Alt 2 Alt 3 Comment