Multipurpose Clock Generator (MCG)
MCF51CN128 Reference Manual, Rev. 6
Freescale Semiconductor
6-29
Figure 6-12. Trim Procedure
In this particular case, the MCU has been attached to a PCB and the entire assembly is undergoing final
test with automated test equipment. A separate signal or message is provided to the MCU operating under
user provided software control. The MCU initiates a trim procedure as outlined in
while the
tester supplies a precision reference signal.
If the intended bus frequency is near the maximum allowed for the device, it is recommended to trim using
a reference divider value (RDIV setting) of twice the final value. After the trim procedure is complete, the
reference divider can be restored. This prevents accidental overshoot of the maximum clock frequency.
Initial conditions:
1) Clock supplied from ATE has 500
μ
sec duty period
2) MCG configured for internal reference with 8MHz bus
START TRIM PROCEDURE
CONTINUE
CASE STATEMENT
COUNT > EXPECTED = 500
.
MEASURE
INCOMING CLOCK WIDTH
TRMVAL = 0x100
COUNT < EXPECTED = 50
0
COUNT = EXPECTED = 500
TRMVAL =
TRMVAL =
TRMVAL - 256/ (2**n)
256/ (2**n)
n = n + 1
(COUNT = # OF BUS CLOCKS / 8)
(DECREASING TRMVAL
INCREASES THE FREQUENCY)
(INCREASING TRMVAL
DECREASES THE FREQUENCY)
NO
YES
IS n > 9?
(RUNNING TOO SLOW)
(RUNNING TOO FAST)
n=1
STORE MCGTRM AND
FTRIM VALUES IN
NON-VOLATILE MEMORY
