NXP Semiconductors freescale semiconductor ColdFire MCF51CN128 Series, Reference Manual

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Mini-FlexBus
Freescale Semiconductor 11-8
MCF51CN128 Reference Manual, Rev. 6
connect its address lines to the appropriate FB_AD bits from FB_AD0 upward. Its data bus must be
connected to FB_AD[7:0] in non-multiplexed mode (CSCR[MUX] = 0) or FB_AD0 to FB_ADn in
multiplexed mode (CSCR[MUX] = 1) where n = 15 if CSCR[PS] = 1x or n = 7 if CSCR[PS] = 01. No bit
ordering is required when connecting address and data lines to the FB_AD bus. For example, a full 16-bit
address/16-bit data device connects its addr[15:0] to FB_AD[16:1] and data[15:0] to FB_AD[15:0]. See
Figure 11-4 for a graphical connection.
11.4.2 Data Transfer Operation
Data transfers between the chip and other devices involve these signals:
The address, write data, FB_ALE, FB_CS n, and all attribute signals change on the rising edge of the
Mini-FlexBus clock (FB_CLK). Read data is latched into the device on the rising edge of the clock.
The Mini-FlexBus supports byte-, word-, longword-, and 16-byte (line) operand transfers and allows
accesses to 8- and 16-bit data ports.Transfer parameters (address setup and hold, port size, the number of
wait states for the external device being accessed, automatic internal transfer termination enable or
disable) are programmed in the chip-select control registers (CSCRs). See
Section 11.3.3, “Chip-Select
Control Registers (CSCR0 – CSCR1) .”
11.4.3 Data Byte Alignment and Physical Connections
The device aligns data transfers in Mini-FlexBus byte lanes with the number of lanes depending on the
data port width.
Figure 11-4 shows the byte lanes that external memory connects to and the sequential
transfers of a longword transfer for the supported port sizes . For example, an 8-bit memory connects to
the single lane FB_AD[7:0]. A longword transfer through this 8-bit port takes four transfers, starting with
the MSB to the LSB.
Figure 11-4. Connections for External Memory Port Sizes
• Address/data bus (FB_AD[19:0])
• Control signals (FB_ALE, FB_CS n , FB_OE)
• Attribute signals (FB_R/W)
Data Bus
Byte 0
8-Bit Port
16-Bit Port
Byte 1
Byte 2
Byte 3
Byte 1 Byte 0
Byte 3 Byte 2
External
Memory
Memory
Driven with
address
values
FB_AD[7:0] FB_AD[15:8]
Multiplexed Mode
Data Bus
Byte 0
8-Bit Port
Byte 1
Byte 2
Byte 3
External
Memory
FB_D[7:0]
Non-multiplexed Mode