Resets, Interrupts, and General System Control
MCF51CN128 Reference Manual, Rev. 6
Freescale Semiconductor
5-17
Additional configuration information about the ColdFire core and memory system is loaded into the 32-bit
D0 (core) and D1 (memory) registers at reset. This information can be stored into memory by the system
startup code for later use by configuration-sensitive application code. See
5.7.7
System Power Management Status and Control 1 Register
(SPMSC1)
This register contains status and control bits to support the low voltage detect function, and to enable the
bandgap voltage reference for the ADC module. This register must be written during the reset initialization
program to set the desired controls even if the desired settings are the same as the reset settings.
7
6
5
4
3
2
1
0
R
REV
1
1
The reset value of 4-bit REV is 0000 for 1.0 Silicon and 0001 for 1.1 Silicon.
ID11
ID10
ID9
ID8
W
Reset:
–
–
–
–
1
1
0
0
Figure 5-6. System Device Identification Register — High (SDIDH)
Table 5-10. SDIDH Register Field Descriptions
Field
Description
7–4
REV
Revision Number —
This field indicates the chip revision number.
3–0
ID[11:8]
Part Identification Number
— Each derivative in the ColdFire family has a unique identification number. The
MCF51CN128 series microcontrollers have these bits hard coded to the value 0xC. See also ID bits in
. The overall device ID is 0xC2F.
7
6
5
4
3
2
1
0
R
ID7
ID6
ID5
ID4
ID3
ID2
ID1
ID0
W
Reset:
0
0
1
0
1
1
1
1
Figure 5-7. System Device Identification Register — Low (SDIDL)
Table 5-11. SDIDL Register Field Descriptions
Field
Description
7–0
ID[7:0]
Part Identification Number
— Each derivative in the ColdFire family has a unique identification number. The
MCF51CN128 series microcontrollers have these bits hard coded to the value 0x2F
.
The overall device ID is
0xC2F.