NXP Semiconductors freescale semiconductor ColdFire MCF51CN128 Series, Reference Manual

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Version 1 ColdFire Debug (CF1_DEBUG)
MCF51CN128 Reference Manual, Rev. 6
Freescale Semiconductor 20-11
DRc: 0x01 (XCSR) Access: Supervisor write-only
BDM read/write
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R CPU
HALT
CPU
STOP
CSTAT
CLK
SW
SEC
EN
BDM
0 0 0 0 0 0 0 0
W ESEQC ERASE
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R 0 0 0 0 0 0 0 0 0 0 0 0 0
APCSC
APC
ENB
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 20-4. Extended Configuration/Status Register (XCSR)
Table 20-7. XCSR Field Descriptions
Field Description
31
CPUHALT
Indicates that the CPU is in the halt state. The CPU state may be running, stopped, or halted, which is determined
by the CPUHALT and CPUSTOP bits as shown below.
30
CPUSTOP
Indicates that the CPU is in the stop state. The CPU state may be running, stopped, or halted, which is determined
by the CPUHALT and CPUSTOP bits as shown in the CPUHALT bit description.
XCSR
[CPUHALT]
XCSR
[CPUSTOP]
CPU State
0 0 Running
0 1 Stopped
1 0 Halted