Version 1 ColdFire Debug (CF1_DEBUG)
MCF51CN128 Reference Manual
,
Rev. 6
20-50
Freescale Semiconductor
20.4.1.5.21
WRITE_Rn
If the processor is halted, this command writes the 32-bit operand to the selected CPU general-purpose
register (An, Dn). See
for the CRN details when CRG is 01.
If the processor is not halted, this command is rejected as an illegal operation and no operation is
performed.
20.4.1.5.22
WRITE_XCSR_BYTE
Write the special status byte of XCSR (XCSR[31–24]). This command can be executed in any mode.
20.4.1.5.23
WRITE_CSR2_BYTE
Write the most significant byte of CSR2 (CSR2[31
–
24]). This command can be executed in any mode.
20.4.1.5.24
WRITE_CSR3_BYTE
Write the most significant byte of CSR3 (CSR3[31
–
24]). This command can be executed in any mode.
Write general-purpose CPU register
Active Background
0x40+CRN
Rn data
[31–24]
Rn data
[23–16]
Rn data
[15–8]
Rn data
[7–0]
host
→
target
host
→
target
host
→
target
host
→
target
host
→
target
D
L
Y
Write XCSR Status Byte
Always Available
0x0D
XCSR Data
[31–24]
host
→
target
host
→
target
Write CSR2 Status Byte
Always Available
0x0E
CSR2 Data
[31–24]
host
→
target
host
→
target
Write CSR3 Status Byte
Always Available
0x0F
CSR3 Data
[31–24]
host
→
target
host
→
target
