Inter-Integrated Circuit (IIC)
MCF51CN128 Reference Manual, Rev. 6
Freescale Semiconductor
17-3
17.1.3
Block Diagram
is a block diagram of the IIC.
Figure 17-1. IIC Functional Block Diagram
17.2
External Signal Description
This section describes each user-accessible pin signal.
17.2.1
SCL — Serial Clock Line
The bidirectional SCL is the serial clock line of the IIC system.
17.2.2
SDA — Serial Data Line
The bidirectional SDA is the serial data line of the IIC system.
INPUT FILTER
SYNC
IN/OUT
DATA
SHIFT
REGISTER
ADDRESS
COMPARE
INTERRUPT
CLOCK
CONTROL
START
STOP
ARBITRATION
ACK/NACK
CTRL_REG
FREQ_REG
ADDR_REG
STATUS_REG
DATA_REG
ADDR_DECODE
DATA_MUX
DATA BUS
SCL
SDA
ADDRESS
CONTROL
TIMEOUTS