Rapid GPIO (RGPIO)
10-4
Freescale Semiconductor
MCF51CN128 Reference Manual, Rev. 6
10.3
Memory Map/Register Definition
The RGPIO module provides a compact 16-byte programming model based at a system memory address
of 0x(00)C0_0000 (noted as RGPIO_BASE throughout the chapter). As previously noted, the
programming model views are different between reads and writes as this enables simplified software for
manipulation of the RGPIO pins.
Additionally, the RGPIO programming model is defined with a 32-bit organization. The basic size of each
program-visible register is 16 bits, but the programming model may be referenced using byte (8-bit), word
(16-bit) or longword (32-bit) accesses. Performance is typically maximized using 32-bit accesses.
NOTE
Writes to the two-byte fields at RGPI 0x8 and
RGPI 0xC are allowed, but do not affect any program-visible
register within the RGPIO module.
Table 10-3. RGPIO
Write
Memory Map
Offset
Address
Register
Width
(bits)
Access
Reset Value
Section/Page
0x00
RGPIO Data Direction Register (RGPIO_DIR)
16
W
0x0000
0x02
RGPIO Write Data Register (RGPIO_DATA)
16
W
0x0000
0x04
RGPIO Pin Enable Register (RGPIO_ENB)
16
W
0x0000
0x06
RGPIO Write Data Clear Register (RGPIO_CLR)
16
W
N/A
0x0A
RGPIO Write Data Set Register (RGPIO_SET)
16
W
N/A
0x0E
RGPIO Write Data Toggle Register (RGPIO_TOG)
16
W
N/A
Table 10-4. RGPIO
Read
Memory Map
Offset
Address
Register
Width
(bits)
Access
Reset Value
Section/Page
0x00
RGPIO Data Direction Register (RGPIO_DIR)
16
R
0x0000
0x02
RGPIO Write Data Register (RGPIO_DATA)
16
R
0x0000
0x04
RGPIO Pin Enable Register (RGPIO_ENB)
16
R
0x0000
0x06
RGPIO Write Data Register (RGPIO_DATA)
16
R
0x0000
0x08
RGPIO Data Direction Register (RGPIO_DIR)
16
R
0x0000
0x0A
RGPIO Write Data Register (RGPIO_DATA)
16
R
0x0000
0x0C
RGPIO Data Direction Register (RGPIO_DIR)
16
R
0x0000
0x0E
RGPIO Write Data Register (RGPIO_DATA)
16
R
0x0000